ITER, SIKSHA ‘O’ ANUSANDHAN (Deemed to be University) Assignment
Computer Science Engineering (AIML, CS, DS,
Branch Program [Link]
IOT)
Course Name Modern Computing Systems Design Semester 3rd
Course Code CSE2221 Academic Year 2025-26/ODD
Topics: Processor Elements, Computer System
Assignment-2 GP-1
Components
Learning Level L1: Remembering L3: Applying L5: Evaluating
(LL) L2: Understanding L4: Analysing L6: Creating
Q’s Questions COs LL
1 List and briefly define different functional unit of a simple processor. CO1 L1
Differentiate between
i) RISC and CISC
ii) SRAM and DRAM
2 CO1 L1
iii) Memory-mapped I/O and Port-mapped I/O
iv) MOSFET AND JFET
With suitable diagram, explain the function of ALU unit in 6502 processor to
3 perform addition and subtraction operation. CO1 L1
4 Explain the flag manipulation instruction set of 6502 processor. CO3 L2
Explain instructions that are used to handle pushing and pulling of data to and
5 from the stack in 6502 processor. CO3
List and define different types of Addressing mode in 6502 processor with a
6 suitable example for each addressing mode. CO3 L2
7 Define an Interrupt. Compare different types of Interrupts of 6502 processor. CO1 L2
Write the exact sequence of operations performed during interrupt handling by
8 IRQ (Interrupt Request). CO1 L1
Write the exact sequence of operations performed during interrupt handling by
9 NMI (Non-Maskable Interrupt). CO1 L1
10 Explain any 5 characteristics of magnetic-core memory. CO1 L2
Explain the construction of n-channel and p-channel MOSFET with suitable
L2
11 diagram. CO1
12 Explain the operation of n-channel MOSFET with suitable diagram. CO1 L2
Create a circuit implementation of a NOT gate using CMOS transistor.
13 CO1 L2
Explain the reading and writing operation of DRAM bit cell with suitable
14 diagram. CO1 L2
A 16-gigabit DRAM integrated circuit has two bank group selection inputs, two
15 bank selection inputs, and 17 row address inputs. How many bits are in each CO1 L2
row of a bank in this device?
A main memory unit with a capacity4MB is built using 1Mx 1-bit DRAM chips.
Each DRAM chip has 1K rows of cells with 1K cell in each row. The time
16 required for a refresh operation is 100nanosecs. The time required to perform CO1 L4
one refresh operation on all the cells in the memory unit is ______
Describe the sequence of operations that take place during the instruction cycle
17 of a CPU? CO4 L2
With a neat diagram, explain how the CPU fetches, decodes, and executes an
18 instruction. CO4 L3
Explain the function of the following register
i) MAR/MDR
19 CO4 L2
ii) PC
iii) IR
Write the output of the code.
memory = {'COUNT': 0, 'LIMIT': 5, 'ONE': 1}
ACC = 0
PC = 0
instructions = [
('LOAD', 'COUNT'),
('ADD', 'ONE'),
('STORE', 'COUNT'),
('CMP', 'LIMIT'),
('JLT', 'LOOP'),
('HLT', None)
]
labels = {'LOOP': 0}
CMP = 0
20 while PC < len(instructions): CO6 L4
instr, operand = instructions[PC]
if instr == 'LOAD':
ACC = memory[operand]
elif instr == 'ADD':
ACC += memory[operand]
elif instr == 'STORE':
memory[operand] = ACC
elif instr == 'CMP':
CMP = memory[operand]
elif instr == 'JLT':
if ACC < CMP:
PC = labels[operand]
continue
elif instr == 'HLT':
break
PC += 1
print("Final COUNT =", memory['COUNT'])
Assignment 2 Topics: Processor Elements, Computer Date of Assignment 1: Date of Submission:
System Components 18.12.2025 26.12.2026
Note:
1. Assignment carries a weightage of 20 marks out of 100
2. Course outcomes CO1, and CO6 were covered.
Explain the fundamental principles of modern computer architecture, including
CO1 instruction sets, memory hierarchy, input/output systems, finite state machines,
instruction execution, dataflow, the Von Neumann model and performance metrics.
Apply knowledge of digital logic and micro architecture to understand how
CO2
instructions are executed at the hardware level.
Compare different instruction set architectures (e.g, RISC vs. CISC, x86 vs. ARM
CO3
Course [Link]-V) and evaluate their trade-offs in real-world systems
Outcomes Apply the knowledge of Python programming constructs (lists, functions, dictionar
CO4
ies, control structures) to simulate computer systems and instruction execution.
Design and implement simple computer simulators (e.g.,TC1) and extend them with
CO5
new instructions, addressing modes, and features.
Integrate theoretical concepts with practical skills by experimenting with simulators
CO6 and ARM code on the Raspberry Pi to bridge high-level programming and, low-
level architecture.