Hybrid Integration of VCSEL and 3-μm Silicon Waveguide

Based on a Monolithic Lens System

Citation for published version (APA):
Li, C., Bhat, S., Stabile, R., Song, Y., Neumeyr, C., & Raz, O. (2022). Hybrid Integration of VCSEL and 3-μm
Silicon Waveguide Based on a Monolithic Lens System. IEEE Transactions on Components, Packaging and
Manufacturing Technology, 12(5), 883-886. Article 9736950. [Link]

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10.1109/TCPMT.2022.3160149

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IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY, VOL. 12, NO. 5, MAY 2022 883

Letters
Hybrid Integration of VCSEL and 3-µm Silicon Waveguide Based on a
Monolithic Lens System
Chenhui Li , Srivathsa Bhat , Ripalta Stabile, Yuchen Song, Christian Neumeyr, and Oded Raz
Abstract— We design an optical interface system for vertical coupling
between vertical-cavity surface-emitting lasers (VCSELs) and 3-µm
silicon waveguides. The system includes a photoresist lens and a total
internal reflection mirror, which allows for passive alignment and flip-
chip bonding (FCB) of VCSELs. The simulated coupling loss is 0.7 dB,
in optimal conditions, which increases to 1 dB when 3- and 20-µm
alignment tolerances are considered in lateral and longitudinal directions,
respectively. The system is built by post-processing lens and metallic
wiring on the backside of a 3-µm silicon photonic platform. After FCB
and embedding of the VCSELs, the system performance is characterized,
and VCSEL-to-waveguide coupling efficiency of −7.5 dB is obtained. Fig. 1. Design of hybrid integration of VCSELs with the 3-µm silicon
Index Terms— Flip-chip bonding (FCB), microlens, silicon photonic photonic platform.
waveguide, vertical-cavity surface-emitting laser (VCSEL).
be vertically placed, which leads to complex packaging processes [4].
I. I NTRODUCTION As an alternative, surface coupling may offer a better solution since

S ILICON photonics research has been conducted for several

decades and has become a mature technology for optical
interconnect applications because of well-developed semiconductor
VCSELs can be integrated on top of the silicon photonic dies using
grating couplers. However, grating couplers operate in narrow bands
and require light to arrive at an angle. To allow for such assembly,
processing technologies and large wafer sizes [1]. However, the tilting VCSELs [6] or gratings couplers [7] have been proposed.
diamond-cubic silicon crystal has an indirect bandgap, and, as a Polymer prisms have also been used to tilt the incidence beam [8].
result, the silicon photonic integration platform is still limited by The difficulty in achieving the exact degree of assembly, as well as
a lack of an efficient light source. Hybrid integration is a solution the inherent modal mismatch between VCSEL and grating couplers,
to complete the system, which combines the III–V material or has resulted in high coupling losses and small displacement tolerance
semiconductor lasers with silicon photonic circuits [2]. In order to in previous demonstrations.
maximize the advantages of silicon photonic platforms, a low-cost Previously, we demonstrated, the 2.5-D and 3-D packaging of
and highly efficient coupling method is required. VCSELs on silicon interposers [9], [10], where the VCSELs can
Similar to the light coupling between fiber and silicon photonic be embedded, and high-speed transmission lines can be patterned
chips, light from a semiconductor laser source can be integrated from on the interposer surface, allowing for flip-chip bonding (FCB) of
the chip edges or surface. In the edge coupling scheme, a spot size VCSEL and driving CMOS electronics. This letter proposes a novel
converter (SSC) is required due to the modal mismatch between lasers integration approach for VCSELs based on a 3-µm-thick silicon-on-
and silicon waveguides. Both distributed feedback (DFB) lasers [3] insulator (SOI) photonic platform [11]. The light coupling system
and vertical cavity surface-emitting lasers (VCSELs) [4] have been is fabricated on the SOI wafers, including 45◦ downward mirrors
assembled using the edge coupling method. To integrate the DFB, on the photonic circuit side, as well as cavities and lenses on the
SSCs are designed on both waveguides, and a particular cavity is substrate side. In this approach, the Gaussian beam from a VCSEL
also fabricated on a silicon photonic chip to accommodate the laser can be modified to match the mode in silicon photonic waveguide to
die. These occupy a large area on the chip. VCSELs are attractive achieve minimum coupling losses over a wide wavelength range (e.g.,
for optical interconnects due to their low power dissipation, low cost, 1.2–4 µm). Furthermore, multiple inputs and outputs can be placed
and suitability for dense integration. Recently developed single-mode arbitrarily in the 2-D plane for sophisticated WDM system designs.
VCSELs are working in the C-band (1530–1560 nm), which can Simulations have been conducted to define the parameters of the
extend the applications of the VCSELs [5]. However, to assemble coupling system yielding an optimal coupling efficiency of −0.7 dB
the VCSELs with waveguides from the edges, one of the dies must and alignment tolerance of ± 1.5 µm in the lateral and ± 10 µm in the
longitudinal directions for −1-dB coupling efficiency. The assembly
Manuscript received October 4, 2021; revised December 15, 2021, concept, working in the broadband and polarization independence,
February 11, 2022, and March 12, 2022; accepted March 13, 2022. Date of
publication March 16, 2022; date of current version May 25, 2022. This work is then demonstrated by processing an SOI PIC sample. Finally, the
was supported by the European Union’s Horizon 2020 Research and Inno- optical performance of the system is measured by FCB VCSELs from
vation Program under Grant Agreement PASSION 780326. Recommended the bottom side of the wafer and measuring the light output through
for publication by Associate Editor C. Zhang upon evaluation of reviewers’ the silicon waveguides.
comments. (Corresponding author: Chenhui Li.)
Chenhui Li, Ripalta Stabile, Yuchen Song, and Oded Raz are with the II. D ESIGN AND S IMULATION
Department of Electrical Engineering, Institute for Photonic Integration,
Eindhoven University of Technology, 5600 Eindhoven, The Netherlands The proposed integration scheme is shown in Fig. 1. The photonic
(e-mail: [Link]@[Link]). circuits are patterned on the 3-µm-thick silicon layer with 45◦
Srivathsa Bhat is with the VTT Technical Research Centre of Finland, mirrors at the ends of the waveguides. On the same SOI wafer, two
02044 Espoo, Finland. cavities are formed from the substrate side to embed a VCSEL and
Christian Neumeyr is with Vertilas GmbH, 85748 Garching, Germany.
Color versions of one or more figures in this article are available at
a photoresist lens, respectively. Due to the layout of the VCSEL,
[Link] the opening size of the lens cavity is limited to 70 µm × 70 µm
Digital Object Identifier 10.1109/TCPMT.2022.3160149 square, which further limits the lens design, and the two cavities are
2156-3950 © 2022 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See [Link] for more information.

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884 IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY, VOL. 12, NO. 5, MAY 2022

Fig. 3. Schematic drawing (left) and SEM photograph of the waveguide and
the TIR mirror (right). The yellow arrows indicate the light path.

Fig. 2. (a) Zemax simulation model and the tolerance calculation results in
x-, y- directions (b), and z- direction (c). The optimal coupling loss is 0.7 dB.
combined to accommodate the microlens system. The microlens is
fabricated in the cavity on a wafer level. Silicon nitride, as the anti-
reflection coating for the C-band laser, is deposited between the lens
and VCSEL. After fabrication, FCB is used to integrate the VCSEL.
The refractive index of the baked photoresist is tested. First, a
thin layer of positive photoresist (AZ® 4562) is spun on a bare Fig. 4. SEM photographs before removing the plating seed layer: fabricated
silicon wafer with 4000 rpm and baked in the same condition with cavities for the single VCSEL (left). Zoom-in photograph of small cavity and
the lens fabrication, at 300 ◦ C. We fabricate the lens at such a lens and pads for VCSELs (right).
high temperature to make the lens compatible with the following
FCB process, which is processed at 280 ◦ C. Then, an ellipsometer
(M-2000, J. A. Woollam) is used to obtain the refractive index, which
is 1.62 over the C-band range.
The micro-optical system is designed in Zemax OpticStudio with
the Gaussian beam propagation method. The calculation model is
shown in Fig. 2, including the VCSEL aperture, an air gap, a spherical
photoresist lens, a silicon layer, and a buried oxide (BOX) layer.
In the lens model, the Gaussian beam (5.5-µm beam diameter,
10.2◦ beam divergence) from the VCSEL is collimated by a spherical
photoresist lens, with the optimum radius of curvature (ROC) of
7.5 µm. The optimal image distance is defined by 3-µm BOX layer
and remaining silicon layer is calculated to be 15 µm.
The mode fields in 3-µm SOI waveguides are tightly confined in
the waveguide (3 µm × 3 µm), and the field distributions are almost Fig. 5. Calculated cylinder height for the aimed ROC.
the same for both TE and TM polarizations. The beam waists are 1.34
and 1.26 µm in x- and y-directions, respectively. With this layer are shown in the photographs of the scanning electron microscope
arrangement, the best coupling loss is calculated to be −0.7 dB. (SEM) with the plating seed layer, as shown in Fig. 4.
In addition, we also simulate the placement tolerances. An extra We creatively fabricate the microlens in etched cavities with
−1-dB coupling loss is recorded for ± 1.5-µm displacement in the standard lithography processes. During the reflow of the photoresist,
x- and y-directions [see Fig. 2(b)] and ± 10-µm variation in the the cylinder transforms to the spherical lens [12], and the height of
thickness of silicon between the lens and the SOI waveguide [see the cylinder (thickness of the photoresist T ) can be calculated from
Fig. 2(c)]. aimed ROC(R), lens height (h), and radius (r )
h2
III. FABRICATION T = (3R − h) .
3r 2
With the aiming parameters, the fabrication starts on a 6-in- and In our process, the volume loss and dark erosion need to be consid-
3-µm-thick SOI wafer. First, the waveguides are defined, and then, ered. The volume loss of the photoresist during the reflow process
the slot openings with 20 µm in length are patterned at the ends of (300 ◦ C) is tested to be 30%. Dark erosion due to the gap between
the waveguides to form the wide mirrors. The tetramethylammonium the lithographic mask and the photoresist in contact lithography is
hydroxide (TMAH) solution is used as the etchant for wet etching optimized to be 1 µm. After considering all effects that impact the
of total internal reflection (TIR) mirrors till the BOX layer. The volume of the patterned cylinder, the relation between the height
schematic drawing and fabrication results are shown in Fig. 3. The of the cylinder and ROC is plotted in Fig. 5. From the calculation,
SEM photograph demonstrates a smooth mirror that is formed by 7.5-µm ROC after reflow can be achieved when the PR cylinder’s
etching along a silicon crystal plane (110). thickness and diameter are 4.8 and 14 µm, respectively. To control
After the fabrication of photonic circuits, the wafer is diced into the thickness of the photoresist, we use the small etched cavity, which
40 mm × 40 mm samples for the process on the bottom side of the works on a wafer level. The variation of the photoresist thickness in
wafer. The cavities for VCSELs and lens embedding are patterned the small cavity is within 1 µm.
and formed by wet etching of silicon as well. A photoresist cylinder Three-dimensional mapping of the small cavity and microlens is
is patterned, inside the small cavity, by double-side lithography obtained with a profilometer (DektakXT) with a scanning step of
to achieve the best alignment accuracy. The lens is formed by 1.0 µm and height resolution of 8.0 nm. The measurement results
reflowing the photoresist at 300 ◦ C. Electronic circuits and bumps are shown in Fig. 6. We see that the small cavity is 11.9-µm deep and
are patterned and plated along the etched facets. The process results that the height of the microlens is measured to be 4.5 µm in both

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IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY, VOL. 12, NO. 5, MAY 2022 885

Fig. 8. IV curve of the VCSEL before and after bonding.

Fig. 6. Measured 3-D map for the lens in the small cavity, both x- and
y-profiles indicate that the height of the microlens is 4.5 µm and the radius
of curvature is 11.3 µm.

Fig. 7. Calibration measurement in the VCSEL tuning range by using two

lensed fibers. Inset: test scheme shows two vertically aligned lensed fibers
and mirrors on both sides of the straight waveguide.
Fig. 9. (a) Testing setup with electronic probes at the VCSEL side and
the x- and y-directions, which are indicated in the 3-D map. The vertically aligned fiber at the output side. (b) Spectra measurement results
ROC of the lens can be calculated to be 11.3 µm, which is 3.8 µm after VCSEL bonding and the calculated power loss of the lens system.
larger than the design. The fabricated lens has a larger radius than
the design due to the large gap between the mask and the photoresist FCB. The measurement result indicates that the VCSEL is well
in the lithography step. More photoresist has been developed away. connected with the electronic circuits.
Therefore, a defocusing compensation needs to be considered in the Finally, the coupling performance is tested, and the test setup
following process, and the volume can be increased by a thicker is shown in Fig. 9(a). First, the spectra of the VCSEL are mea-
photoresist layer in the small cavity. We calculate the coupling loss sured with changing current to identify the laser wavelength [13].
to be −2.1 dB by building the model with the fabricated cavity and As shown in Fig. 9, from 6 to 9 mA, the wavelength shifts from
lens dimensions. 1544.26 to 1546.24 nm, and power increases from 1 to 3.3 dBm.
By deducting the insertion loss of the fiber, the calculated lens
IV. C HARACTERIZATION system loss is shown in Fig. 9. The highest coupling efficiency is
−7.5 dB. The reason for the extra losses is the alignment shift in the
The 45◦ TIR mirrors are fabricated at both the input and output of a high-temperature bonding process. We use the updated lens model
straight 3-µm waveguide to characterize the photonic circuit design. to determine the shift to be 3.5 µm. Therefore, low-temperature
Two lensed fibers, with a 2-µm mode field diameter (MFD) at a bonding or local heating techniques will be employed in the
focus distance of 12 µm, are placed vertically on top of the etched future.
cavities, which are the locations of the 45◦ TIR mirrors. However,
because of the thin layer of silicon (kept in place to ensure the correct V. C ONCLUSION
imaging distance between the VCSEL and mirror), the fiber cannot In this letter, we have designed and demonstrated an integrated lens
be placed at the optimal distance from the TIR mirror, leading to system capable of allowing the integration of VCSELs with silicon
high coupling loss shown in Fig. 7 (inset). The coupling loss is waveguides on one SOI wafer. The system is designed to have a high
wavelength-dependent, and the lowest coupling loss of fiber to mirror coupling efficiency (−0.7 dB) with improved bonding tolerance and
is −8.2 dB. Here, we assume there is no loss on the 3-mm-long can be utilized over a broadband wavelength range. The 45◦ TIR
waveguide [11]. In future designs, the input and output will be mirrors and photoresist microlens can be fabricated at any location
patterned separately, such that the silicon layer at the output mirror on a wafer level to combine with any photonic circuits. The bottom
will be further etched. Alternatively, a lens can also be designed and side of the SOI wafer is utilized to make the high-speed electronic
fabricated in the same reflow for the fiber coupling. connections and the microlens.
After characterizing the straight waveguides and mirrors, the In the future, the coupling efficiency (−7.5 dB) will be fur-
single-mode VCSEL, working in the C-band, is passively aligned ther improved by a better bonding technique. This platform and
between the VCSEL apertures and photoresist lens and then flip- the integrated laser system will be used for many applications,
chip bonded with thermal compression bonding. The current–voltage including creating dense wavelength-division multiplexing (DWDM)
curves of the VCSEL are compared in Fig. 8, before and after the transceivers and Lidar systems.

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886 IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY, VOL. 12, NO. 5, MAY 2022

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