Microprocessor Sheet 1
Midterm (2021)
Question 3:
In the MIPS computer there are three different types of instructions requiring different number
of steps (CPU clock cycles) to implement:
o Type A: Conditional branch and unconditional jump: 3 steps;
o Type B: ALU instructions: 4 steps;
o Type C: Memory read/write: 5 steps.
A C program is translated by two different compilers designed for the same MIPS processor into
two assembly programs to be executed by the processor, and they contain different number of
the three types of instructions as shown in the table in msec:
Instruction type A B C
1st compiler 450 600 250
2nd compiler 500 700 300
(a) Answer the following questions for each of the two compilers:
i. With 2 GHz clock rate, what is execution time? (2 marks)
ii. What is the average cycle per instruction (CPI)? (2 marks)
iii. As far as this program is concerned, which of the two compilers is better and why? (1 mark)
Micro Final 2021
Question 2
(a) Consider two different implementations P1 and P2 of the same instruction set. There are five classes
of instructions (A, B, C, D, and E) in the instruction set. P1 has a clock rate of 4GHz. P2 has a clock
rate of 6GHz. The average CPI for each instruction class for P1 and P2 are shown in Table 3. If the
number of instructions executed in a certain program is divided equally among the instruction
classes except for class A which occurs twice as often as each of the others.
Class CPI on P1 CPI on P2
A 1 2
B 2 2
Table 3
C 3 2
D 4 4
E 5 4
1
Microprocessor Sheet 1
(i) (4 marks) Which program implementation is faster? By what factor?
(ii) (3 marks) If it was possible to use two instructions from class B to do the same function of class
E, explain the effect of using class B instructions to replace the class E on the performance of
each implementation P1 and P2.
Micro 2 (Final 2007)
Problem 3:
(a) What is the difference between clock cycle time, CPU execution time, and the clock cycles per
instruction for a program? Explain how each of them can be calculated/measured.
(b) Consider two different implementations P1 and P2 of the same instruction set. There are five
classes of instructions (A, B, C, D, and E) in the instruction set. P1 has a clock rate of 4GHz. P2
has a clock rate of 6GHz. The average number of instructions for each instruction class for P1
and P2 are shown in Table 2. If the number of instructions executed in a certain program is
divided equally among the instruction classes except for class A which occurs twice as often as
each of the others. Which program implementation is faster? By what factor?
Class CPI on P1 CPI on P2
A 1 2
B 2 2
C 3 2
D 4 4
E 5 4
Table 2
(c) Suppose we want to run a program P with 7.5 x109 instructions on a 5GHz machine with a CPI of
0.8. What is the expected CPU execution time?
(d) When we run program P in part (c) it takes 3 seconds of wall clock time to complete. Explain the
difference between the CPU execution time calculated and the measured wall clock time. What
is the percentage of the CPU time P received?
2
Microprocessor Sheet 1
Micro 1 (Final 2015)
Question 2 (20 marks)
(a) What is the difference between throughput and latency? Give an example on how to improve each
of them.
(c) Suppose we have a processor that has CPI for different kinds of instructions as given in Table 4.
Customers execute two types of operating systems that have the instruction mix given in Table 5.
We can afford to make one of these two possible changes in the next generation of the processor:
• Reduce the number of cycles needed by memory instructions from 4 to 2, or
• Reduce the number of cycles needed by conditional branches from 2 to 1.
Which change should we make? Give a quantitative justification to your decision.
Instruction type CPI
OS %Memory %ALU % branch % jump memory 4
Loonix 30 25 15 30 ALU 1
Playdows 20 30 25 25 branch 2
jump 1
Table 4
Table 5