SOUTHCHIP SEMICONDUCTOR SC89171 DATASHEET DRAFT

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High Efficiency, Synchronous Buck Charger for 1-4 cell Li-ion Battery with
PowerPath management

1 DESCRIPTION 2 FEATURES
The SC89171 is a highly integrated switch-mode buck charger • Wide input voltage: 4V~24V, 30V sustainable
for 1-4 cells Li-ion battery applications. It supports 4-24V input,
• Integrated low-Rdson synchronous buck charger,
up to 5A charging current and provide battery charge
efficiency up to 97%
management functions including trickle charge, constant
current charge, constant voltage charge, charge termination, • Charging Management (Trickle Charge / Constant
auto recharge and charging status indication. Current Charge / Constant Voltage Charge / Charge
Termination/Auto-Recharge)
SC89171 also integrates NMOS driver and PMOS driver for
• Adjustable Input Current Limit and Charging Current
Powerpath management, it is easy to support dynamic power
management for charging and system power. • Adjustable Constant Voltage by External Resistor setting
◼ FB version: 2.1V for 1 to 4 cells battery
The SC89171 supports flexible charge current and input
• Powerpath management for System Power Selector
current option, and the user can program the current freely
through external resistor for different applications. • Battery Detection
• Adjustable Charge Safety Timer
The SC89171 supports input current limit, input over voltage
• NTC supporting JEITA Standard for Battery temperature
and under voltage protections, internal cycle by cycle current
Protection
limit, battery short circuit protection, and battery over voltage
protection. It also offers charging safety timer and battery • Charging Status Indication
temperature protection to ensure safety under different • Adjustable Input Over Voltage and Under Voltage
abnormal conditions. Protection
Besides, SC89171 keeps monitoring IC temperature and • Battery Over Voltage Protection
automatically decreases charging current to ensure IC working • Battery Short Circuit Protection
in normal temperature range. • Charging Over Current and Under Current Protection
The SC89171 is available in QFN-3.5*5.5 package. • Thermal Regulation and Shutdown
• QFN 3.5*5.5 footprint

3 APPLICATIONS 4 DEVICE INFORMATION

Part Number Package Dimension
• Blue-tooth speaker charger
SC89171QDNR 24 pin QFN 3.5mm x 5.5mm
• Portable Media Players
• Notebook, Tablet
• POS machine

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5 Typical Application Circuit

10mR VSYS
VBUS
Adapter

Q1 Q2 Q5
ACP ACN PMID
/BATDRV
Q3
CMSRC 10mR VBAT
SW
ACDRV +
battery
VREF
Q4 BT
VREF
ISET

IACSET
SC89171
VCC
AVCC
PGND

OVPSET
SRP
VREF
TTC
SRN

NTC

FB
VREF

STAT

Figure 1. SC89171 with powerpath application

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10mR VSYS
VBUS
Adapter

Q2
ACP ACN PMID
/BATDRV
Q3
CMSRC 10mR VBAT
SW
ACDRV +
battery
VREF
Q4 BT
VREF
ISET

IACSET
SC89171
VCC
AVCC
PGND

OVPSET
SRP
VREF
TTC
SRN

NTC

FB
VREF

STAT

Figure 2. SC89171 without power path application

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6 Terminal Configurations and Functions

QFN 3.5x 5.5

SW

SW
1 24

PMID 2 23 PGND

PMID 3 22 PGND

AVCC 4 21 BT

ACN 5 20 VCC

ACP 6 19 /BATDRV
EPAD
CMSRC 7 18 OVPSET

ACDRV 8 17 ACSET

STAT 9 16 SRP

TS 10 15 SRN

TTC 11 14 FB
12 13
VREF

ISET

I/O DESCRIPTION
SC89171 NAME
1, 24 SW I/O Switching node of the boost converter. Connect to external inductor.
Input of buck charger to charge the battery cells. Connected to the drain of the reverse
2, 3 PMID I
blocking MOSFET.
IC power positive supply. Place a 1-µF ceramic capacitor from AVCC to AGND and place
4 AVCC I
it as close as possible to IC.
5 ACN I Adapter input current sense resistor negative input.
6 ACP I Adapter input current sense resistor positive input.
7 CMSRC O Connect to common source of ACFET and reverse blocking FET.
8 ACDRV O Blocking FET driver output. Connect to the gate of blocking FET.
9 STAT O Charge status indication. Open drain output. Connect it to pull-up,
Temperature sense pin. Connect to the Negative Temperature Coefficient (NTC)
10 TS I thermistor inside the battery cells to sense the battery cells temperature for protection.
Short this pin to ground to disable this function.
Safety Timer and termination control.
11 TTC I Low: disable both safety timer and charge termination
High: only disable safety timer
3.3-V reference voltage output. Place a 1-μF ceramic capacitor from VREF to AGND pin
12 VREF O
close to the IC.
13 ISET I Charging current setting pin.
14 FB I Battery charge voltage feedback pin, internal reference is 2.1V.
15 SRN I Charging current sense resistor negative input.
16 SRP I Charging current sense resistor positive input.
17 IACSET I Adapter input current limit setting pin.
18 OVPSET I Adapter input voltage setting pin. Connected with a resistor divider from VBUS to AGND

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to set charger working range.

19 /BATDRV O BATFET gate driver output.
20 VCC O Internal LDO output. Connect a 1uF capacitor with it.
Bootstrap pin. Connect a 100nF ceramic capacitor between BT pin and SW pin to provide
21 BT O
bias voltage for internal driver circuit.
22, 23 PGND O power ground.
25 AGND I/O Exposed thermal pad. Connected with power ground through vias.

7 Specification

7.1 Absolute Maximum Rating

Over operating free-air temperature range (unless otherwise noted)(1)

Min. Max. Unit

AVCC, ACP, ACN, ACDRV, CMSRC, STAT -0.3 30 V

SRP, SRN, PMID, FB, /BATDRV -0.3 25 V

BT -0.3 31 V
Voltage(2)
SW -2(10ns) 25 V

VCC -0.3 6.5 V

OVPSET, NTC, TTC, VREF, ISET, IACSET -0.3 6.5 V

TJ Operating junction temperature -40 155 °C

Tstg Storage temperature -65 155 °C

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device.
(2) All voltages are with respect to network ground terminal.

7.2 Thermal Information(TBD)

THERMAL RESISTANCE(1) QFN (3.5mmX5.5mm) Unit

θJA Junction to ambient thermal resistance 36 °C/W

θJC Junction to case resistance 7 °C/W

(1) Measured on JESD51-7, 4-layer PCB.

7.3 ESD Ratings

Min. Max. Unit

Human-body Model (HBM) (2) All pins -2 2 kV

VESD(1)
Charged-device Model (CDM) (3) -750 750 V

(1) Electrostatic discharge (ESD) to measure device sensitivity and immunity to damage caused by assembly line electrostatic discharges
into the device.
(2) Level listed above is the passing level per ANSI, ESDA, and JEDEC JS-001. JEDEC document JEP155 states that 500-V HBM allows
safe manufacturing with a standard ESD control process.
(3) Level listed above is the passing level per EIA-JEDEC JESD22-C101. JEDEC document JEP157 states that 250-V CDM allows safe
manufacturing with a standard ESD control process.

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7.4 Recommended Operation Conditions

MIN TYP MAX UNIT

VBUS VBUS voltage range 4 24 V

VPMID PMID voltage range 24 V

VBAT VBAT voltage range 17.6 V

L Inductance 2.2 3.3 µH

RS1 Input current sense resistor 5 10 mΩ

RS2 Charging current sense resistor 5 10 mΩ

TA Operating ambient temperature -40 85 C

TJ Operating junction temperature -40 125 C

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8 Function Block Diagram

ACDRV CMSRC

SRN+190mV

ACN CHARGE PUMP

+1.6V
ACOV ACDRV-BATFET CONTROL

ACUV BATFET DRIVER /BATDRV

SLEEP
OVPSET

+0.5V
PMID

VCC

VREF VBATOVP BT
VREF LDO
SRN

HSFET
Tshut

+3.6V Tj
UVLO BTST

AVCC BTST_UV PWM COTROLLER

EN_VREF
SW
IL_PEAK
LSFET
SLEEP IL

VSRN+220mV
+5mV

SRP-SRN

PGND
VCC VCC LDO

+120mV
LOOP COMP
EN_VCC

ISET

VNTC_COLD
SRP

timer fault
X20
IFAULT SRN VNTC_COOL

SRN BAT_SHORT

BATOVP OR
BAT DETECTION STATE MACHINE
SRN
VNTC_WARM
IDISCHARGE TS
BATLOWV

VNTC_HOT
SRN
ACSET
VRECH

VNTC_DISABLE
ACN
X20

ACP
Tj TIMER COUNT

+120°C

DIS_TERM TTC
+0.4V

STAT
+2.1V

FB AGND

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9 Electrical Characteristics (TBD)

4.5V≤ (PVCC, AVCC) ≤24V, –40°C<TJ< +125°C, typical values are at TA= 25°C, TA= 25°C unless otherwise noted.

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

SUPPLY VOLTAGE

input under-voltage lockout Rising edge 3.6 V

VAVCC_UVLO
threshold Hysteresis 200 mV

VAVCC>VUVLO, VAVCC > VSRN, VISET<

40mV, VBAT=16.8V, charger 45 100 μA
disabled

VAVCC > VUVLO, VAVCC > VSRN, VISET

IQ_AVCC Quiescent current into AVCC > 120mV, charger enabled, no 2 mA
switching

VAVCC > VUVLO, VAVCC > VSRN,

VISET>120 mV, charger enabled, 5 mA
switching

VAVCC > VUVLO, VSRN > VAVCC

(sleep mode), VBAT=16.8V, 15 μA
4cells

VAVCC > VUVLO, VAVCC> VSRN, VISET

IQ_VBAT Quiescent current into SRN < 40mV, VBAT=16.8V, Charge 15 μA
disabled

VAVCC > VUVLO, VAVCC> VSRN, VISET

> 120mV, VBAT=16.8V, 4cells, 17 25 μA
charge termination

POWERPATH

VAVCC – VSRN falling 160 mV

VSLEEP Sleep mode threshold
VAVCC – VSRN rising 220 mV

Threshold to turn on BATFET VACN – VSRN falling 190 mV

VACN-SRN Hysteresis threshold to turn off
VACN – VSRN rising 280 mV
BATFET

POWER STAGE

Rdson_HS Rdson resistance of high side FET 22 mΩ

Rdson_LS Rdson resistance of low side FET 35 mΩ

Fsw Switching frequency 1200 kHz

Bootstrap refresh comparator

VBT_REFRESH 3 V
threshold voltage

VREF

VREF VREF output voltage VAVCC > VAVCC_UVLO, No load 3.267 3.3 3.333 V

IVREF VREF current limit VREF = 0 V, VAVCC > VUVLO 60 80 mA

VCC DRIVER

VCC VCC output voltage VAVCC= 12V, IVCC = 1~70mA 4.9 5.0 5.1 V

VREGN = 0 V, VAVCC > 10V,

IVCC VCC current limit 120 mA
ISET > 120 mV

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ACDRV DRIVER

IACFET ACDRV charge pump current limit VACDRV - VCMSRC = 2 V 60 μA

VACDRV - VCMSRC when

VACFET Gate drive voltage on ACFET 4.8 V
VAVCC > VUVLO

BATFET DRIVER

RDS_BAT_OFF BATFET turnoff resistance 50 Ω

RDS_BAT_ON BATFET turn-on resistance 16 kΩ

VBATDRV= VACN - VBATDRV

VBATDRV BATFET drive voltage when VAVCC > 9V and BATFET 6 V
is on

INPUT CURRENT LIMIT

KIDPM input current limit factor RS1 = 10mΩ 5 A/V

RS1* IBUS=80mV -2 2 %

RS1* IBUS=40mV -3 3 %

RS1* IBUS=20mV -5 5 %
IBUS Input current accuracy
RS1* IBUS=10mV -5 5 %

RS1* IBUS=5mV -10 10 %

RS1* IBUS=2.5mV -25 25 %

IACSET_LEAK Leakage current into ACSET pin 10 nA

CHARGER FUNCTION

Charge disable threshold ISET falling 40 50 mV

VCHG
Charge enable threshold ISET rising 100 120 mV

KICHG Charge current limit factor RS2 = 10mΩ 5 A/V

RS2* IBUS=40mV -3 3 %

RS2* IBUS=20mV -5 5 %
ICHG Charge constant current accuracy
RS2* IBUS=10mV -5 5 %

RS2* IBUS=5mV -10 10 %

IISET_LEAK Leakage current into ISET pin 10 nA

Trickle charging current ratio,

KITRK 10%
respect to ICHG

RS2* ICHG=4mV -15 15 %

ITRK Trickle charging current accuracy
RS2* ICHG=2mV -25 25 %

Termination charging current ratio,

KITERM 10%
respect to ICHG

Termination charging current RS2* ICHG=4mV -15 15 %

ITERM
accuracy RS2* ICHG=2mV -40 40 %

VBAT_TRGT VBAT target voltage FB voltage 2.089 2.1 2.111 V

Recharge threshold over VBAT

VBAT_RECH FB voltage 50 mV
target voltage

tRECH_dgl Recharge deglitch time 10 ms

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Rising edge 1.45 V

VBAT_TRK Trickle charge threshold
Falling hysteresis 100 mV

Trickle charge to CC charge

tTRK_CC 25 ms
deglitch

Falling, Measure on SRN 2 V

VBAT_SHORT Battery short threshold
Rising hysteresis 200 mV

ISHORT VBAT<VBAT_SHORT 100 mA

tBATSHORT_dgl Deglitch on both edges 1 us

Safety timer

KTimer_TRK Trickle charge timer factor 0.3 min/nF

tTRK Trickle charge timer CTTC=100nF 30 min

Ktimer_CC Trickle charge timer factor 6 min/nF

tCC Trickle charge timer CTTC=100nF 10 H

VTTC_LOW TTC pin low threshold 0.4 V

ITTC TTC source/sink current 5 μA

Battery Detection

tWAKE Wake timer Max time charge is enabled 500 ms

IWAKE Wake current RS2 = 10mΩ 50 125 200 mA

Max time discharge current is

tDischarge Discharge timer 1 s
applied

IDischage Discharge current 10 mA

IFAULT Charge current after a time-out fault 2 mA

Wake threshold to trigger battery

VWake Measure on FB 2.05 V
detection

Discharge threshold to detect

VDISCH Measure on FB 1.5 V
battery absent

Protection

Overvoltage rising threshold to turn OVPSET rising 1.6 V

VACOV
off ACFET Falling hysteresis 50 mV

Rising edge 120 ns

tACOV_dgl Overvoltage rising deglitch
Falling edge 30 ms

Undervoltage falling threshold to OVPSET falling 0.5 V

VACUV
turn off ACFET Rising hysteresis 50 mV

Falling edge 40 ns
tACOV_dgl Undervoltage falling deglitch
Rising edge 30 ms

ILIM_PK Peak current limit 9 A

Rising edge, over VBAT target 104 %

VBATOVP VBAT over voltage protection
Hysteresis, over VBAT target 2 %

VBAT over voltage discharge

IBATOVP_DSG VBAT=4.6V 5 mA
current

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NTC

NTC cold temp threshold, refer to Rising 70.3 70.8 71.3 %

VCOLD
VREF Falling hysteresis 0.6 %

NTC cool temp threshold, refer to Rising 68.1 68.6 69.1 %

VCOOL
VREF Falling hysteresis 0.6 %

NTC warm temp threshold, refer to Falling 55.6 56.1 56.6 %

VWARM
VREF Falling hysteresis 0.9 %

NTC hot temp threshold, refer to Falling 47.6 48.1 48.6 %

VHOT
VREF Rising hysteresis 0.9 %

Disable NTC threshold, refer to

VDISNTC Falling 5 %
VREF

for NTC enter hot and cold 64 ms

tNTC_dgl NTC status deglitch time
quit hot or cold 4 ms

STAT

STATLO STAT output low saturation voltage Sink current = 5 mA 0.5 V

STARTUP

tD Input delay time 5 μs

tDEBOUNCE Input debounce time 1.5 s

THERMAL REGULATION AND SHUTDOWN

Thermal loop regulation

TREG 120 °C
temperature

Rising edge 150 °C

TSD Thermal shutdown temperature
Hysteresis 20 °C

tSD_dgl Thermal shutdown rising deglitch Rising edge 100 μs

Thermal shutdown falling deglitch Hysteresis 10 ms

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10 Feature Description Termination voltage

Recharge-threshold

CC (constant
current) charge

10.1 Power Up
CC charge
threshold

SC89171 is powered up when AVCC is above VUVLO PG: end of

charge indication
threshold. AVCC is supplied by adapter or battery internally. Trickle charge current
Termination current
IC will start charging cycle if IC exits sleep mode. VBAT short current

CC (constant CV (constant End of

VBAT short Trickle charge Recharge
current) charge voltage) charge charge
10.2 Sleep Mode
Figure 3. Typical charge profile
if VAVCC is above VUVLO but VAVCC<VSRN+160mV, SC89171
enters sleep mode to minimize current drain from the battery. Charger cycle starts when following conditions is satisfied:
In sleep mode, VREF is disabled and charger is disabled, the (1) ISET pin above 120 mV.
STAT pin goes to high impedance. (2) Not in UVLO mode (VAVCC> VUVLO).
(3) Not in SLEEP mode (VAVCC > VSRN).
10.3 VREF LDO (4) Not in ACOV or ACUV mode. (0.5 V< VOVPSET <1.6 V)
(5) 1.5s delay is complete after initial power up.
SC89171 integrates a 3.3V VREF LDO to provide reference
(6) VCC LDO and VREF LDO voltages are at correct
voltage for input current limit and charge current setting.
levels.
When AVCC is above UVLO and IC is not into sleep mode,
(7) Thermal shut down is not valid.
the VREF LDO is initialed.
(8) TS fault is not detected.
(9) ACFET turns on
10.4 VCC driver
(10) No safety timer is triggered
SC89171 integrates 5V VCC LDO to provider power for
switching MOSFET driver. VCC is initiated when 10.6.1 Battery Detection
VISET>120mV and AVCC is powered up.
When AVCC power on or VBAT falls down <VRECH (battery
SC89171 enters standby mode when VISET<120mV, VCC is recharge voltage), IC initials a battery detection flow.
disabled, charger is disabled.
Step1: POR and VBAT < recharge voltage is triggered.

10.5 Powerpath management Step2: 8mA discharge current from SRN to GND and 1s
timer starts. If VBAT > VLOWV and 1s timer expires, battery is
System power is switched from adapter or battery present and IC start charging. Otherwise battery is absent,
automatically. During sleep mode such as only battery then go to next step.
exists, the BATFET is turned on to provide power from
battery. Step3: 125mA charging current to VBAT and 500ms timer
starts. If VBAT < VLOWV and lasting for 500ms, battery is
When adapter plugs in, SC89171 exits sleep mode, present and IC start charging. Otherwise battery is absent,
BATFET switches off and ACFET is turned on to provide STAT pin is blinking, then repeat the battery detection cycle.
power path from adapter to system.
10.6.2 Trickle current Charge
When adapter is removed or an OV adapter plug-in, ACFET
is turned off, then BATFET is turned on to supply system When VBAT is lower than VTRK (trickle charge threshold),
from battery. the SC89171 charges the battery cells in trickle charge
mode. In this mode, the charge current is regulated at 1/10
10.6 Charge management of the constant charge current programmed by ICHG pin
resistor.
The SC89171 provides charge management functions for 1-
4 cell Li-ion battery. The typical charge profile is shown in If the 1/10 of the CC current is lower than 120mA, the trickle
Figure 3. charge current will be clamped to 120mA. the trickle charge
current is set as 10% of the fast charge rate set by ICHG
voltage.
VISET
ITRKLE =
200 ×RS2

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10.6.3 Constant Current (CC) Charge In EOC phase, the IC stops charging, ACFET is still turned
on to provide power from adapter to system.
When VBAT voltage is charged above VTRK, the SC89171
enters into constant charge (CC) mode.
10.6.6 Recharge
In this mode, the IC regulates VBAT sense current, and
After EOC, the SC89171 still monitors VBAT voltage. Once
control the charging current at ICHG decided by ICHG pin.
it detects the battery voltage falls below 96% of
Use a voltage divider from VREF to ICHG to AGND to set
VBAT_TRGT, it turns on charger and returns to CC mode
the fast charge current:
with soft start again.
VISET
ICC =
20 ×RS2 10.7 Charging Status Indication
The charger is disabled when ICHG pin voltage is below 40 When the SC89171 charges the battery in trickle charge/CC
mV and enabled when ICHG pin voltage is above 120 mV. charge/CV charge mode, the STAT pin outputs logic high,
ICHG can be used as chip enable pin. so the LED connected at STAT pin is turned on, indicating
the charging is in process.
10.6.4 Constant Voltage (CV) Charge
After the EOC conditions are met, the STAT pin outputs high
The SC89171 operates in constant voltage (CV) mode after impedance, indicating the battery cells are fully charged.
VBAT exceeds 98% of the termination voltage target
VBAT_TRGT. In CV mode, the battery voltage is regulated If the battery voltage drops below the recharge threshold
at VBAT_TRGT. The charge current automatically drops VRECH, the LED will be turned on again.
until the battery is fully charged.
When fault happens，the STAT outputs high and low at
The battery target voltage can be configured through FB pin 0.5Hz frequency.
voltage. Below table shows the relationship between the FB
setting and the VBAT target voltage. The charging status is as follow:
Table 1 STAT pin and working status
R2
CV target =VFB × [1+ ]
R1 STAT status IC working status
Where, ON Normal charging (VBAT short/ TC /CC /CV
/Recharge)
VFB is the internal reference voltage, 2.1V.
OFF End of charging (EOC)/Sleep mode/ charger
R1 and R2 is the resistor divider of VBAT. disable

Abnormal charging（ACOV/ACUV/ Safety

10.6.5 Charge Termination / End of Charge 0.5Hz blinking timer triggered/ /NTC_HOT/ NTC_COLD
When below conditions are valid, the SC89171 recognizes /Tshut/battery Absent）
the battery cells are fully charged:
10.8 Input Current Limit
1) Termination voltage: the VBAT voltage is higher than 98%
of VBAT_TRGT the SC89171 supports input current limit function. The input
limit is set by voltage of IIN pin.
2) Termination current: the charge current is less than
termination current. VACSET
IBUS =
20 x RS1
VISET
ITERM = Where,
200 ×RS2
3) above two conditions are met together and with 500ms IBUS is the input limit current.
deglitch time VACSET is the voltage of ACSET pin, connected with resistor
When batteries are fully charged, the SC89171 outputs divider from VREF to AGND.
floating at STAT pin, so the LED connected at STAT pin is RS1 is the current sense resistor of input current of IBUS.
off, indicating the end of charge (EOC). EOC is disabled
when IC is in IINDPM or thermal regulation.

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10.9 NTC
The SC89171 integrates JEITA standard NTC pin to support VREF
battery temperature protection function. Once SC89171
RT1
exits sleep mode, it keeps monitoring the battery cells’
temperature through NTC pin and compares with VREF NTC
voltage. When NTC faults (NTC hot or NTC cold) happens, RNTC RT2
the charger suspends, and the STAT starts blinking to alarm 103AT

host. Only when NTC fault disappears，SC89171 resume

charging after 40ms deglitch.
Figure 5. NTC Circuit
Below shows the NTC operation summary. NTC function
Use below equations to calculate the RT1/RT2 resistance
can be also disabled through shorting the pin to ground.
when a 103AT NTC thermistor is used as shown in Figure
Table 2 NTC operation 5.

VNTC Operation 1 1
R COLD  R HOT  ( − )
VCOLD VHOT
VNTC > VCOLD Stop charging R T2 =
1 1
VCOLD >VNTC > VCOOL 0.5*Charging Current R HOT  ( − 1) − R COLD  ( − 1)
VHOT VCOLD
VCOOL >VNTC > VWARM Normal charging
1
−1
VWARM > VNTC > VHOT Constant Voltage -100mV VCOLD
R T1 =
1 1
VHOT > VNTC > VDISNTC Stop charging +
R T2 R COLD
VDISNTC > VNTC >=0 Disable NTC
Where, RHOT is the NTC resistance at the hot temperature
threshold, RCOLD is the resistance at the cold threshold.
Charging Current

Setting value For example, set 0 °C(cold) to 60 °C (hot) to be the

0.5*Setting value Normal Warm charging range. So RCOLD = 28.71 KΩ, RHOT =2.99 KΩ
Cold Cool Hot
0
(resistance of 103AT thermistor at 0°C and 60°C)
Temperature
So the calculation results are:
Charging Voltage
Setting value
RT1=2.22 KΩ, RT2=6.64 KΩ;
Setting value-100mV
Cool Normal Warm With above setting, the cool temperature and warm
Cold Hot
0 temperature are 10 °C and 45 °C.
Temperature

10.10 Input Undervoltage Lockout

Figure 4. NTC Operation
When AVCC voltage is above VUVLO voltage, the IC is
SC89171 supports JEITA standard, IC monitors the voltage enabled to allow proper operation. If AVCC falls below
of NTC pin to check the temperature of battery. when IC UVLO voltage, the IC is disabled.
detects the battery is in Cool State, it will decrease the
constant charge current to be half of original value. 10.11 Input Over and Under Voltage
Meanwhile, when IC detects the battery is in Warm State,
Protection
the constant voltage decrease 100mV lower than setting
battery charging voltage. The SC89171 supports input over and under voltage
protection. Once the IC detects the OVPSET pin voltage is
above 1.6V or is below 0.5V, it enters into over voltage
protection or under voltage protection. SC89171 will stop
switching instantly, ACFET is turned off to avoid abnormal
adapter plug-in and BATFET is turned on to supply system
from battery. At the same time, STAT pin blinks at 0.5Hz to

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indicate fault. t = CTTC x KTTC

Where,
10.12 VBAT Over Voltage Protection
KTTC = 6min/nF for fast charge phase (including CC and CV
The SC89171 monitors VBAT voltage during the operation.
phase), 0.3min/nF for trickle charge phase.
Once it detects the VBAT is higher than 104% of the target
voltage, over voltage protection is triggered and the IC stops CTTC is the capacitor connected to TTC pin.
switching at once, A 6mA discharging current path from
For CTTC= 100nF typical application, the safety timer is 10
SRP/SRN to AGND. the high-side FET is not turned on until
hours for fast charge phase. The safety timer is 30min for
the battery voltage goes below 102%. If battery overvoltage
trickle charge phase.
condition lasts for more than 30ms, charger is disabled.
TTC pin can be also used for mode selection function. Pull
10.13 VBAT Short Circuit Protection the TIM pin to AGND to disable both termination and fast
charge safety timer. Pull the TTC pin to VREF to disable the
Once the IC detects the VBAT voltage drops below
safety timer but allow charge termination.
VBAT_SHORT, the VBAT short circuit protection is triggered.
The IC regulates the short current to about 100mA. When the IC detects EOC condition, the IC clears the timer,
and it does not restart the timer unless recharge phase
After the short circuit fault is removed, the VBAT voltage is
starts, VBUS toggle happens or ISET pin toggles.
charged up. When VBAT voltage is higher than the short
circuit threshold, the IC returns to normal operation. When IC enters VINREG, IDPM and thermal regulation, the
timer related safety timer counting rate is slowed.
10.14 Charging Over current Protection If the charging cycle does not end when the timer expires,
The SC89171 monitor the peak inductor current cycle by SC89171 will transition to shutdown mode. The STAT starts
cycle, it will clamp the peak inductor current to be about 9A. blinking at 0.5Hz to indicate fault. SC89171 provides two
Recovery ways to deal with timer fault according to battery
10.15 Charging Under current Protection voltage.

When SRP-SRN voltage decreases below 5mV, the low- Condition 1: VBAT > VRECH and safety timer is triggered.
side FET is turned off for the rest of the switching cycle. IC Recovery Method: VBAT<VRECH will clear the timer fault and
Working in DCM mode. During discontinuous conduction battery detection will begin. A POR or taking ICHG below 40
mode, the low-side FET turns on for a short period of time mV will also clear the fault.
when the bootstrap capacitor voltage drops below 4 V to
provide refresh charge for the capacitor. Condition 2: VBAT < VRECH and safety timer is triggered.

2mA charging current (typ) is used to detect a battery

10.16 MOSFET Short Circuit and Inductor removal condition and remains on as long as the battery
Short Circuit Protection voltage stays below the recharge threshold. If battery is
removed, VBAT>VRECH, 2mA charging current is disabled,
SC89171 integrates cycle by cycle current monitoring
and executes the recovery method in condition 1.
feature. it is achieved through monitoring the voltage drop
across Rdson of the MOSFETs. The charger will be latched
10.18 Thermal Regulation and Shutdown
off, but the ACFET is turned on to power the system. STAT
is blinking at 0.5Hz. Remove adapter then plug adapter in In charging process, SC89171 keeps monitoring junction
again temperature. When IC detects Tj >120°C, it enters into
thermal regulation loop and charging current is decreased
10.17 Safety Timer gradually. If Tj still exceeds 120°C, charging current can be
decreased to 0.
SC89171 integrates internal timer to avoid over-time
charging. safety timer in trickle charge phases is fixed 30 Once the SC89171 detects the junction temperature rises
minutes. When SC89171 enters into constant current above 150°C, it shuts down the whole chip. When the
charge phase, safety timer is programmed by the capacitor temperature falls below 130°C, the chip is enabled again.
connected between the TIM pin and AGND, and is given by
the formula:

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fsw is the switching frequency

11 Application information(TBD)
L is the inductor value
11.1 Input and Output Capacitor When selecting inductor, the inductor saturation current
must be higher than the peak inductor current with enough
The input current of the Buck converter is discontinuously,
and the input capacitor should be carefully selected. The margin (20% margin is recommended). The rating current
of the inductor must be higher than the battery current.
ripple current through input capacitor can be calculated as:
The inductor DC resistance value (DCR) affects the
VBAT VBAT conduction loss of switching regulator, so low DCR inductor
IRMS =ICC √ (1- )
VIN VIN is recommended especially for high power application. The
conductor loss of inductor can be calculated roughly as
where the ICC is battery charging current, the VIN is the input
voltage (VBUS or PMID), VBAT is the battery voltage. Since PL_DC = IL2 ∙DCR
MLCC ceramic capacitor has good high frequency filtering
IL is the average value of inductor current, and it equals to
and low ESR, X5R or X7R capacitors are recommended for
IBAT.
input capacitors. Three 10uF input capacitors in PMID is
enough for most applications. Besides DC power loss, there are also inductor AC winding
loss and inductor core loss, which are related to inductor
The output voltage ripple of output capacitor can be
peak current. Normally, higher peak current causes higher
calculated as:
AC loss and core loss. The user shall consult with the
VBAT 1 VBAT inductor vendor to select the inductor which has small ESR
VRIPPLE = (C + )(1- )
fsw ∙ L ESR 8∙fsw ∙COUT VIN at high frequency and small core loss.
Where the fsw is the switching frequency, CESR is the ESR of
output capacitor. Also, X5R or X7R MLCC capacitors are
11.3 Current Sense Resistor
recommended for output capacitors. 2x10uF output 10 mΩ should be used to sense IBAT current. Resistor of
capacitors is enough for most applications.
1% or higher accuracy and low temperature coefficient is
MLCC capacitor of small package size normally has better recommended. The resistor power rating and temperature
high frequency filtering, so a 1 µF MLCC of 0402 package coefficient should be considered. The power dissipation can
size is highly recommended to added in parallel and put as be roughly calculated as P=I2R, and I is the RMS current
close to VBUS and PMID pin as possible. flowing through the resistor. The resistor power rating
should be higher than the calculated value.
When selecting capacitors, the degrading effect of MLCC
effective capacitance under DC bias must be considered. Normally the resistor value is varied if the temperature
Ceramic capacitors can lose most capacitance at rated increased and the variation is decided by temperature
voltage. If the highest operating VBUS voltage is 12V, 25V coefficient. If high accuracy of current limit is required, select
voltage rating capacitor is recommended. Check the lower temperature coefficient resistor as much as possible.
effective capacitance at the operating voltage to make sure
the voltage ripple can be maintained. 11.4 SW Snubber Circuit

11.2 Inductor Selection To adjust MOSFET switching time and switching overshoot
for EMI debugging, it is recommended to add RC snubber
2.2μH ~ 3.3 μH inductor is recommended for loop stability. (0603 size) circuit at SW, as shown in Figure 5.
The peak inductor current in charging mode can be The RC snubber is helpful in absorbing the high frequency
calculated as spike at SW node, so to improve EMC performance. User
VBAT∙(VBUS-VBAT) can leave RC components as NC at the beginning and
ILpeak = IBAT + adjust the value to improve the EMC performance if
2∙fsw∙L∙VBUS∙η
necessary. Normally user can try 2.2Ω and 1nF for the
where IBAT is the battery charging current at VBAT side. snubber. If EMC should be improved further, reduce the
𝜂 is the power conversion efficiency. User can use 90% for resistor value (like 1Ω or even lower) and increase the
calculation. capacitor value (like 2.2nF or even higher).

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snubber below, and routed in parallel (differential routing), and

VBAT
the filter for current sense should be placed near the IC.
+
correct wrong

GND
PMID

BT
RSNSx RSNSx

SW
copper copper copper copper

Figure 6. Snubber circuit

Must connect to resistor pads Should NOT connect to coppers of
（Kevin Sense) power path
11.5 Layout Guide
1. The capacitors connected at VBUS/PMID/VBAT/VCC Figure 7. Current sense circuit
pins should be placed near the IC, and their ground 3. The AGND should be single connected to PGND close
connection to the ground pins should be as short as to IC.
possible.
4. The SW RC snubber circuit should be very close to IC
2. The current sense resistor should be close to the
SW and PGND pin.
[Link] current sense traces should be connected to the
current sense resistor’s pads in Kelvin sense way as

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MECHANICAL DATA
QFN (3.5mm x 5.5mm x 0.75mm)

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RECOMMENDED FOOTPRINT
QFN-24 (3.5x5.5x0.75) (Unit: mm)

24x0.23
18x0.5

0.8

4x0.75
2.05 4.3

3.1

6.3

Note:

A. All linear dimensions are in millimeters

B. Publication IPC-7351 is recommended for alternate designs

C. Customers should contact their board fabrication site for recommended solder mask tolerances and via tenting
recommendations for vias placed in the thermal pad

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