Registration No.
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Total Number of Pages: 02
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5/ 2 Sub_Code: RBM4C001/REE4C001/REL4C001
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4th Semester Back Examination: 2025-26
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217
SUBJECT: Digital Electronics
BRANCH(S): BIOMED, EEE, ELECTRICAL
Time: 3 Hours
Max Marks: 100
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[Link]: S275
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Answer Question No.1 (Part-1) which is compulsory, any eight from Part-II and any two from
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/ 2 0 Part-III.
The figures in the right hand margin indicate marks.
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Q1 - 2
Answer7the following questions:
Part-I
(2 x 10)
2 1 between signed and unsigned binary numbers. -10
a) Differentiate
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b) Perform the following binary arithmetic: (I) 1101 + 1011, (II) 10101 5- – 1101
c) Convert the decimal number 2455.30 to its binary equivalent.
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d) What are error detecting and correcting codes?
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e) What is the purpose of the "don't care" condition
f) What is the function of a priority encoder - 2 3 in Karnaugh maps?
g) Design NAND gate and XOR gate2 172in-digital
using
circuits?
input NOR gate.
h) Describe the operation of tri-state logic and its applications
i) Explain the difference between TTL and CMOS1logic
- 0 families.
- counter that counts from 0 to 4095?
j) How many flip-flops are required to build a5binary
2
/ 2 0 Part-II
/ 0 5Type Questions- (Answer Any Eight out of Twelve)
Q2 Only Focused-Short Answer
a) Simplify the Boolean - 2 3 (A + B) (A′ + C) (B + C′) using Boolean algebra.
expression:
(6 × 8)
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b) Explain the operation
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of an 8:1 multiplexer. Draw its logic diagram and truth table.
c) Design a JK flip-flop using NAND gates. Explain its operation with a truth5
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- and timing
table
diagram.
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- Design a 3-to-8 line decoder and explain its /operation.
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d) What is a decoder?
0 5 and timing diagram.
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e) Design2 / 0
a 4-bit parallel adder using full adders. Explain its operation
3 + ABC' using a Karnaugh map.
f) 5 Simplify the Boolean expression F (A, B, C) = A'BC +-AB'C 2
3g)
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/ What is an Analog-to-Digital Converter (ADC)?17Explain the operation of a successive
7- 2 approximation ADC with a block diagram. 2
21 h)
i)
Design a sample and hold circuit. Explain its operation and applications.
What is a ring counter? Design a 4-bit ring counter and explain its operation.
j) Explain the operation of a weighted resistor Digital-to-Analog Converter (DAC).
k) What is a Programmable Logic Array (PLA)? Explain its structure and programming.
l) Discuss the interfacing of CMOS and TTL logic families with suitable examples.
Part-III
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Only Long Answer Type Questions (Answer Any Two out of Four)
- (16 x 2)
Q3 a)
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Design a 4-bit binary adder using logic gates.
5- (8 + 8)
b) Implement an XOR gate using only NAND
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/ gates.
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/ F (A, B, C, D) = Σ (0, 1, 2, 4, 8, 9, 15) using a 4-to-1
Q4 a) Implement the Boolean function
multiplexer. 7 - 2 (8 + 8)
b) Define sequential2
1
circuits. Explain the operation of a clocked SR flip-flop with its truth table
and timing diagram
Q5 a) What is a shift register? Design a 4-bit
- - 10serial-in serial-out (SISO) shift register and explain (8 + 8)
its operation.
b) Explain the operation of a0 2 5ripple counter. Draw its logic diagram and timing diagram.
4-bit
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Q6 a) Define Field Programmable Gate Array (FPGA). Discuss its architecture and applications (8 + 8)
b) Explain the
7 - 2concept of charge-coupled device (CCD) memory. Discuss its advantages and
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disadvantages.
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