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Circuit Design and Timing Diagrams Guide

The document outlines an assignment for ELEC 2607, consisting of four main tasks related to circuit design and analysis, including timing diagrams, frequency division, prime number output circuits, and state table reduction. Each task has specific requirements and marks allocated, totaling 50 marks. Students are expected to demonstrate their understanding of digital circuits through design specifications, implementation, and evaluation based on engineering principles.

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13 views4 pages

Circuit Design and Timing Diagrams Guide

The document outlines an assignment for ELEC 2607, consisting of four main tasks related to circuit design and analysis, including timing diagrams, frequency division, prime number output circuits, and state table reduction. Each task has specific requirements and marks allocated, totaling 50 marks. Students are expected to demonstrate their understanding of digital circuits through design specifications, implementation, and evaluation based on engineering principles.

Uploaded by

buttkicker360
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

ELEC 2607 Assignment 3 50 Marks

I. Plot the timing diagram for the following circuit for 6 clk cycles. Assume that initially xyz=000. Plot the
clk, x, y, and z signals. Also draw the state graph. 10 marks

XOR

x y z
D Q AND D Q OR D Q

clk Clk Clk Clk


Q Q Q

II. Design a circuit made of rising-edge-triggered flip-flops and inverter(s) such that its output has one-sixth
(1/6) of the clock frequency. Verify your design by a timing diagram. The timing diagram should include
the clk signal and the outputs of the flip-flops.
5 marks

1
III. Design a circuit that outputs prime numbers between 0 and 10 in ascending order and repeats. Think of two
designs. Show your work and the final circuits. 25 marks

A. Design Goals
1. Is the circuit analog or digital?
2. What two factors you aim to optimize in your design?
3. What figure(s) would you use as a relative measure of these factors?
4. Does the circuit require memory elements?
B. Detailed Design Specifications
1. What are the implied input signals??
2. How many outputs the circuit has?
3. List two sequences of the binary numbers to appear at the outputs.
4. When do the outputs change?
C. Design Solution
1. How many states the design has?
2. How many state variables the design has?
3. How many don’t care conditions the design has, if any?
4. Are the design outputs the same as the outputs of the flip-flops?
D. Design Implementation / task definitions
1. List the design steps in order:
2. Perform the necessary tasks and design the circuit in the provided space on the next page.
E. Alternate Solution
1. How many states the design has?
2. How many state variables the design has?
3. How many don’t care conditions the design has, if any?
4. Are the design outputs the same as the outputs of the flip-flops?
F. Design Implementation of the alternate solution
1. List the design steps in order:
2. Perform the necessary tasks and design the circuit in the provided space on the next page.
G. Evaluation based on engineering principles
1. How many flip-flops the two designs have, respectively?
2. How many other logic gates the two designs have (ignoring inverters), respectively?
3. Which design would run faster?
4. Which design would consume less power?

2
Design 1

Design 2

3
IV. Find the reduced state table for the following FSM. 10 Marks

Next State
State x = 0 x = 1 Output
A B F 0
B A B 0
C G E 0
D H F 1
E F C 0
F E D 1
G C G 1
H D H 0

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