PART 4: TYPES OF ROM
4.1 MROM (Mask Read Only Memory)
The very first type of ROM. Data is programmed during manufacturing using a mask (template). Cannot be
changed after manufacturing - if there's an error, the chip is useless. Very cheap for mass production but only
makes sense for millions of copies.
4.2 PROM (Programmable Read Only Memory)
Manufactured blank. Users can write to it once using a PROM programmer/burner. The device uses high
voltage to blow tiny fuses - each blown fuse represents a bit. Once programmed, cannot be changed. Used in
cell phones, video games, medical devices.
4.3 EPROM (Erasable Programmable Read Only Memory)
Can be erased and reprogrammed! Programmed with high voltage. Erased by exposing to UV light for 10-40
minutes. Has a transparent window on top for UV exposure. Must remove chip from computer to erase. Erases
entire chip at once - cannot erase individual bytes. Used in microcontrollers.
4.4 EEPROM (Electrically Erasable PROM)
Better than EPROM - uses electricity to erase (no UV light needed). Can erase while chip is installed in
computer. Can erase individual bytes, not entire chip. Takes 4-10 milliseconds to erase/program. Can be
rewritten about 10,000 times. Used in computer BIOS.
4.5 Flash Memory (Modern ROM)
Advanced type of EEPROM. Much faster - can erase/write blocks of data at once. Very high durability -
hundreds of thousands of rewrites. No moving parts, shock resistant, low power. Used everywhere: USB drives,
memory cards, SSDs, smartphones, cameras, MP3 players.
PART 5: CACHE MEMORY
5.1 What is Cache Memory?
Cache is a super-fast memory between CPU and RAM. It stores copies of frequently used data. Think of it as
your desk's top drawer - you keep frequently used items there so you don't walk to the filing cabinet (RAM)
every time.
5.2 Principle of Locality (Why Cache Works)
Programs tend to access the same data or nearby data repeatedly. This predictable behavior makes caching
effective.
Temporal Locality (Time-based):
If you use something once, you'll probably use it again soon. Example: In a loop, the variable 'counter' is used
100 times. Keep it in cache! Real-life: Keep salt on counter while cooking because you'll use it multiple times.
Spatial Locality (Space-based):
If you use one thing, you'll probably use nearby things. Example: Reading array elements [0], [1], [2] in
sequence. When cache loads [0], it also loads [1]-[7] automatically. Real-life: After reading page 50, you'll
likely read page 51 next.
5.3 How Cache Works (Step by Step)
Step 1: CPU needs data and sends request to cache
Step 2a - Cache Hit (Data Found):
● • Cache immediately provides data
● • Very fast (1-5 nanoseconds)
● • CPU continues without delay
Step 2b - Cache Miss (Data NOT Found):
● • Request goes to RAM
● • RAM provides data (slower, 50-100 nanoseconds)
● • Data sent to CPU
● • Copy stored in cache for next time
5.4 Cache Performance Metrics
Hit Ratio = (Number of Hits) ÷ (Total Accesses)
Example Calculation:
● • Cache access time = 10 nanoseconds
● • RAM access time = 100 nanoseconds
● • Hit ratio = 90% (0.9)
● • Miss ratio = 10% (0.1)
Average Access Time = (0.9 × 10) + (0.1 × 100) = 9 + 10 = 19 nanoseconds
Without cache: Every access takes 100 ns.
With cache: Average is only 19 ns - over 5x faster!
5.5 Cache Write Policies
Write Through:
Update cache AND main memory immediately. Slower but safer - data is consistent everywhere. Like saving
your document to both desktop and cloud simultaneously.
Write Back:
Update cache only first. Update main memory later when needed. Faster but requires careful management. Like
taking notes on paper and typing them into computer later.
5.6 Cache Levels (L1, L2, L3)
L1 Cache: Smallest (32-64 KB), fastest, closest to CPU, separate for instructions and data
L2 Cache: Larger (256 KB - 1 MB), slightly slower, may be per core or shared
L3 Cache: Largest (8-32 MB), slowest of caches (but faster than RAM), usually shared among all cores
PART 6: CACHE MAPPING TECHNIQUES
6.1 What is Cache Mapping?
Cache mapping determines how data from main memory is organized and stored in cache. Example system:
Main Memory has 32K words (needs 15-bit address), Cache has 512 words (needs 9-bit address). Question:
How do we map 32K locations to only 512 cache locations?
6.2 Associative Mapping (Most Flexible)
How It Works:
Any memory block can go to ANY cache location. Complete freedom! Cache stores both the address (tag) and
data for each entry. When CPU requests data, cache searches ALL locations simultaneously using associative
memory.
Example:
Memory address 01000 can be stored at cache location 0, 100, or 511 - anywhere!
Advantages:
● • Highest flexibility
● • Best hit rate
● • No conflicts
Disadvantages:
● • Most expensive (needs comparison circuits)
● • Most complex hardware
● • Highest power consumption
6.3 Direct Mapping (Simplest)
How It Works:
Each memory block has ONE specific cache location it can go to. No choice! CPU address is divided into: TAG
(6 bits) + INDEX (9 bits). Index determines which cache line, Tag verifies it's the correct block.
Example:
Memory address 01000 can ONLY go to cache location determined by its index bits. Memory address 02000
might map to same cache location - conflict!
Advantages:
● • Simplest implementation
● • Least expensive
● • Fastest lookup
Disadvantages:
● • Conflicts - two addresses may need same location
● • Lower hit rate than associative
● • One must replace the other
6.4 Set-Associative Mapping (Best Balance)
How It Works:
Compromise between direct and associative. Each index can hold multiple blocks (a 'set'). 2-way set associative
= 2 blocks per index, 4-way = 4 blocks per index, etc. Reduces conflicts while keeping costs reasonable.
Example (2-way):
Index 000 can hold 2 different memory blocks. Address 01000 and 02000 can both be in cache at index 000
simultaneously - no conflict!
Advantages:
● • Good hit rate (better than direct)
● • Reasonable cost (cheaper than fully associative)
● • Reduces conflicts significantly
Disadvantages:
● • More complex than direct
● • More expensive than direct
● • Needs replacement policy within sets
6.5 Comparison Table
Associative: Most flexible, fastest, most expensive, highest hit rate
Direct: Least flexible, good speed, cheapest, lowest hit rate, can have conflicts
Set-Associative: Middle ground - best practical choice for most systems
PART 7: OTHER IMPORTANT TOPICS
7.1 Bootstrap Loader (Computer Startup)
Bootstrap Loader is a program that starts your computer. Stored in ROM (always there even when power is off).
Startup Sequence:
● 1. Power ON - electricity flows
● 2. CPU jumps to reset address (FFFF:0000)
● 3. POST (Power-On Self Test) - checks hardware
● 4. System initialization - sets up basic functions
● 5. INT 19 - triggers boot device search
● 6. Loads boot record from disk (Track 0, Sector 0)
● 7. Loads operating system files into RAM
● 8. OS takes control - computer ready!
7.2 Memory Access Methods
Random Access: Jump to any location in equal time. Like CD tracks - skip to any song instantly. Used in RAM
and ROM.
Sequential Access: Must go through data in order. Like cassette tape - to reach song 10, must fast-forward
through 1-9. Used in magnetic tapes.
Direct Access: Jump to general area, then search sequentially. Like finding a chapter in a book. Used in hard
disks.
7.3 Associative Memory (CAM)
Special memory accessed by content, not address. Instead of 'get data at address 100', you say 'find all data
containing ABC'. All locations search simultaneously in parallel. Very expensive but ultra-fast for searches.
Used in TLB, cache tags, network routers.
Analogy: Regular memory = Finding book by shelf number. Associative memory = Asking everyone in class
'Who has a red pencil?' and all with red pencils raise hands simultaneously.
PART 8: IMPORTANT FORMULAS
Formula 1: Address Lines
Number of Address Lines = log₂(Number of Locations)
Example: 512 locations → 2^9 = 512 → Need 9 address lines
Formula 2: Hit Ratio
Hit Ratio = Hits ÷ (Hits + Misses)
Example: 90 hits, 10 misses → 90 ÷ 100 = 0.9 = 90%
Formula 3: Average Access Time
Average Time = (Hit Ratio × Cache Time) + (Miss Ratio × RAM Time)
Example: (0.9 × 10 ns) + (0.1 × 100 ns) = 19 ns
PART 9: KEY TAKEAWAYS
1. Faster memory is smaller and more expensive
2. RAM is temporary (volatile), ROM is permanent (non-volatile)
3. SRAM (cache) is fast but expensive; DRAM (main RAM) is slower but cheaper
4. Cache works because of locality principle (temporal + spatial)
5. Higher hit ratio = better performance
6. Three mapping types: Associative (best), Direct (cheapest), Set-Associative (practical)
7. Flash memory is modern ROM used in USB drives and SSDs
8. Bootstrap loader starts your computer from ROM
STUDY TIPS:
✓ Draw the memory hierarchy pyramid
✓ Practice address line calculations
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✓ Understand WHY cache works (locality principle)
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✓ Calculate hit ratios and average access times
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✓ Compare mapping techniques - know trade-offs
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✓ Remember: Faster = Smaller = More Expensive
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