1.
What are the main differences between common-source and common-gate
amplifiers? What does define their frequency response? What does define their
dominant pole? How do we bias these?
Common source amplifier
Common source amplifier frequency response
Common drain amplifier
Frequency response of common drain amplifier
Common gate amplifier
Frequency response of common gate amplifier
2. What are the advantages and disadvantages of using a cascode? What is an active
cascode and how much gain can we get from it?
The cascade of CS stage and CG stage is called as the cascode amplifier.
Advantages of a Cascode Amplifier:
1. High Gain:
o The cascode configuration can achieve higher gain than a single-stage
amplifier because it reduces the Miller effect, which otherwise limits
bandwidth.
o Approximate gain: Av≈gm⋅ro1⋅ro2A_v \approx g_m \cdot r_{o1} \cdot
r_{o2}Av≈gm⋅ro1⋅ro2, where gmg_mgm is the transconductance of the input
transistor and ro1,ro2r_{o1}, r_{o2}ro1,ro2 are the output resistances of the
two transistors.
2. High Output Impedance:
o The output impedance is significantly increased, making the cascode ideal for
current sources or active loads.
3. Improved Frequency Response:
o Because the Miller capacitance is minimized (as the gain from the input to
intermediate node is low), the bandwidth is extended.
Disadvantages of a Cascode Amplifier:
1. Lower Output Swing:
o Due to stacking of transistors, more headroom is required, reducing the
maximum output swing—a key issue in low-voltage designs.
2. Biasing Complexity:
o Requires careful biasing of the cascode transistor to keep it in saturation
while maintaining desired gain.
3. Increased Power Consumption:
o More devices and higher voltage headroom can lead to increased power
usage.
[Link] is the principle of operation of the folded-cascode concept? How will you
distribute the available voltage headroom in a folded-cascode amplifier?
The folded-cascode is a variation of the standard cascode amplifier that allows for high gain
and bandwidth, while also operating under low supply voltage conditions—a major
advantage in modern CMOS designs.
Key Concepts:
1. Folding Action:
o In a traditional cascode, transistors are stacked vertically, consuming voltage
headroom.
o In a folded cascode, the signal path is folded: the input transistor and the
cascode transistor are of opposite types (e.g., NMOS input + PMOS cascode),
allowing the signal to be redirected laterally instead of vertically.
o This avoids stacking multiple transistors between VDD and GND, saving
headroom.
2. Operation:
o The input differential pair converts voltage input to current.
o That current is "folded" through cascode transistors of the opposite type to
drive the output.
o A high-impedance node at the output gives high gain.
3. Gain Expression (approximate):
Voltage Headroom Distribution in a Folded-Cascode Amplifier
Voltage headroom is limited, especially in low-voltage systems, so you need to carefully
allocate the supply voltage across all components to ensure they stay in saturation.
4. What is your strategy to design a common-source amplifier? What is the trade-off
between power-efficiency and signal bandwidth?
Trade-off Between Power Efficiency and Signal Bandwidth
There is a fundamental trade-off between power consumption and bandwidth due to how
bias current affects the circuit:
Why?
• Increasing bias current IDI_DID:
o Increases gmg_mgm → increases gain and bandwidth
o Decreases output resistance ror_oro, potentially reducing gain
o Increases power consumption (P=VDD⋅IDP = V_{DD} \cdot I_DP=VDD⋅ID)
• Decreasing IDI_DID:
o Saves power → better power efficiency
o Reduces gm and fT → slower amplifier, reduced bandwidth
o Might reduce signal swing if saturation margin becomes too tight
5. What are the non-linear error mechanisms in common-source amplifiers? How can you
improve the linearity of a common-source amplifier?
1. Transconductance Nonlinearity (gm variation)
• In strong inversion, the MOSFET’s IDI_DID is a quadratic function of VGSV_{GS}VGS,
not linear:
• So gm = ∂ID / ∂VGS varies with signal level → causes harmonic distortion, especially
2nd and 3rd order.
2. Channel Length Modulation (Finite Output Resistance ror_oro)
• Output current depends slightly on VD due to finite ro:
• This introduces a nonlinear output conductance, causing distortion as the output
swings.
3. Body Effect
• If source voltage varies (e.g., in differential pairs without proper biasing), then VSB
changes.
• This alters the threshold voltage Vth, introducing nonlinearity.
4. Capacitive Nonlinearity (Miller Effect + Cgs/Cgd)
• Capacitances like Cgs and especially Cgd (Miller-multiplied) are voltage-dependent,
which causes distortion at high frequencies or large swings.
How to Improve Linearity in a Common-Source Amplifier
Now let’s look at how to suppress or mitigate those nonlinearities:
1. Operate in the Long-Channel/Moderate Inversion Region
• Long-channel devices have higher output resistance and more linear gm.
• In moderate inversion, MOSFETs behave more linearly than in strong inversion.
2. Increase Overdrive Voltage Vov
• Larger Vov=VGS−Vth gives more headroom before nonlinearity sets in.
• Trade-off: lowers gain (since gm∝1/Vov) → design balance required.
5. Use Active Load with High Output Impedance
• High output resistance reduces VDS variation → reduces channel-length modulation
effects.
6. Cascode Configuration
• Improves output impedance and isolation, reducing nonlinearity from ro and
capacitive coupling.
[Link] do we analyze the input referred noise of a common-source amplifier? What will
you do to improve the noise figure of a common-source amplifier?
1. Input-Referred Noise of a Common-Source Amplifier
The input-referred noise is the amount of input voltage noise that would cause the same
output noise as all the actual noise sources in the circuit. It allows us to treat the entire
circuit's noise as if it were coming just from the input.
Steps to Analyze Input-Referred Noise:
1. Identify Noise Sources
For a CS amplifier (assuming NMOS input, resistive or active load):
• MOSFET Thermal Noise: