Chapter 5: BJT Biasing Circuits 1

Chapter 5 :
BJT Biasing Circuits
5.1 Introduction
Transistors are used for many applications like: as a switch, as a comparator, as a current source, as
an amplifier etc. The most common application of a transistor is as amplifier. Transistor used in an
amplifier circuit must be biased in the active region with suitable levels of base, collector and
emitter currents and constant terminal voltages. The levels of these currents and voltages set a
particular operating point of the transistor which is called the DC operating point or quiescent
point. In Chapter 4, we have seen that, to use a transistor in active region, the B-E junction must be
forward biased and the B-C junction must be reverse biased. We have ensured this biasing
conditions using two set of batteries which is not practical. We have to design circuits that can
provide both the forward bias and reverse bias voltages from a single battery or power source. This
type of circuits are called biasing circuits. Ideally the DC currents and voltage levels (without any
AC signal) in a biasing circuit should remain absolutely constant. In practical circuits, these
quantities may change due to the variations of temperature and the transistor current gain
(𝛽 𝑜𝑟 ℎ𝐹𝐸 ). The aim of designing good bias circuits is to provide stable DC current and voltage levels
irrespective of the temperature and ℎ𝐹𝐸 . The simplest bias circuit consists of the smallest number
of components and hence, they are the least costly. But they are not able to provide stable biasing.
On the other hand, a complicated bias circuit is costly, but can provide better biasing for the
transistor. In this chapter, we will study different biasing circuits and their performance.

5.2 Biasing From a Single Source

In Chapter 4, we have seen how to bias a transistor using two sets of batteries. Fig.5-1(a) shows
such a circuit to bias a transistor in CE configuration. Here, resistors 𝑅𝐵 and 𝑅𝐶 are used to limit the
base current and the collector current to our desired levels. The battery 𝑉𝐵𝐵 , used to forward bias
the B-E junction, has small value (say 3 V) and 𝑉𝐶𝐶 , used to bias the B-C junction, has higher value

IC IC
IB RC 2 k IB RC
VCE VCE 2 k

23 k RB VBE RB VBE
VCC = 173 k VCC =
VBB = IE 18 V VBB = IE 18 V
3V 18 V

(a) (b)
Fig.5-1: Biasing circuit of a transistor (a) VBB = 3 V and RB = 23 k (b) VBB = 3 V and RB = 173 k
Chapter 5: BJT Biasing Circuits 2

(say 18 V). But using suitable resistance values we can also use higher voltage for the B-E junction.
Fig.5-1(b) shows the biasing circuit using same values for 𝑉𝐵𝐵 and 𝑉𝐶𝐶 . We can redraw the circuit as
shown in Fig.5-1(c). Now, connecting the terminals of same potential in a single point we get the
circuit of Fig.5-1(d). Thus, we have redrawn the first bias circuit [Fig.5-1(a)] with a single voltage
source (supply voltage) in Fig.5-1(d).

VBB = 18 V VCC = 18 V VCC = 18 V

RC 2 k RC 2 k
173 k RB 173 k RB
IC IC
IB IB
VCE VCE
VBE VBE
IE IE
(c) (d)

Fig.5-1: Biasing circuit of a transistor (c) and (d) alternate representations of circuit (b)

Example 5-1
For the biasing circuits of Fig.5-1(a) and (b), calculate the values of 𝐼𝐵 , 𝐼𝐶 and 𝑉𝐶𝐸 assuming 𝛽 = 50.

Solution:
For circuit (a):
Considering a Si transistor 𝑉𝐵𝐸 = 0.7 V.
The value of 𝐼𝐵 can be calculated as (the equations are derived in Section 5.7),
𝑉𝐵𝐵 − 𝑉𝐵𝐸 3 V − 0.7 V
𝐼𝐵 = = = 100 μA [Ans. ]
𝑅𝐵 23 kΩ
Therefore, the value of 𝐼𝐶 will be, 𝐼𝐶 = 𝛽𝐼𝐵 = 50 × 100 μA = 5 mA [Ans. ]
Now, the value of 𝑉𝐶𝐸 can be calculated as,
𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 = 18 V − (5 mA)(2 kΩ) = 8 V [Ans. ]
For circuit (b):
Considering a Si transistor 𝑉𝐵𝐸 = 0.7 V.
𝑉𝐵𝐵 − 𝑉𝐵𝐸 18 V − 0.7 V
The value of 𝐼𝐵 can be calculated as, 𝐼𝐵 = = = 100 μA [Ans. ]
𝑅𝐵 173 kΩ
Therefore, the value of 𝐼𝐶 will be, 𝐼𝐶 = 𝛽𝐼𝐵 = 50 × 100μA = 5 mA [Ans. ]
Now, the value of 𝑉𝐶𝐸 can be calculated as,
𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 = 18 V − (5 mA)(2 kΩ) = 8 V [Ans. ]
As the circuits of Fig.5-1(c) and (d) use the same voltages and resistances, same results will be
found for them.
Chapter 5: BJT Biasing Circuits 3

Comments: Same collector current and collector-emitter voltage is found using two batteries and a
single battery using different base resistance 𝑅𝐵 .

5.3 DC Load Line and Operating Point

As we are interested with the output of a transistor and the power of a transistor depends on the
output voltage and output current, the operating point of a transistor is represented in terms of
them. For example, in case of CB configuration the values of output current (𝐼𝐶 ) and output voltage
(𝑉𝐶𝐵 ) represent a point on the output characteristic curves which is called the operating point.
Similarly, for CE configuration, the operating
point is represented by the values of 𝐼𝐶 and VCC
𝑉𝐶𝐸 . That is, the point that gives the values C-E
RL RL
of output voltage and output current of a RB RB loop
transistor is called the operating point. IC IC
Depending on the bias voltage and the IB IB VCC
VCE VCE
circuit components, the operating point can
VBE VBE
be at any location on the output
IE IE
characteristics. But, for a fixed value of bias
voltage and output resistance (or load
resistance) operating point can be at any Fig.5-2: Transistor Circuit for determining load line.
location within a line on the output
characteristics. This line is called the load line. Thus, the line, drawn on the transistor output
characteristics, that gives all possible positions of the operating point is called the load line.
To draw a load line we will consider a common-
IC (mA)
emitter (CE) circuit as shown in Fig.5-2. For CE
configuration, the load-line is a graph of 10 𝑉𝐶𝐶
(0, )
collector current (𝐼𝐶 ) versus collector-emitter B 𝑅𝐿
IB = 40 A
voltage (𝑉𝐶𝐸 ) for a given value of collector 8
resistance 𝑅𝐶 and given supply voltage 𝑉𝐶𝐶 . That IB = 30 A
is, the load line shows all levels of 𝐼𝐶 and 𝑉𝐶𝐸 6 1
Slope =
RL
that can exist in a particular circuit. IB = 20 A
To draw the load line, we need an expression 4

that relates 𝐼𝐶 and 𝑉𝐶𝐸 . This can easily be found DC load line IB = 10 A
2
from the C-E circuit of Fig.5-2(a). By applying KVL (𝑉𝐶𝐶 , 0)
to C-C loop of this circuit we get, IB = 0
0 5 10 15 20 A 25 VCE (V)
𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐿 − 𝑉𝐶𝐸 = 0 (5-1)
Fig.5-3: Load line drawn on the output
𝑜𝑟, 𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐿 (5-2) characteristic curves.
Equ.(5-2) is an equation of straight line or the
load line. To draw this line on the output characteristics of the transistor we have to determine two
points. Let’s do that.
Point A:
Chapter 5: BJT Biasing Circuits 4

When, 𝐼𝐶 = 0 from Equ.(5-2) we get,

𝑉𝐶𝐸 = 𝑉𝐶𝐶
Point B:
When, 𝑉𝐶𝐸 = 0, again from the same equation we get,
𝑉𝐶𝐶
𝐼𝐶 =
𝑅𝐿
Now, if we put these points on the output characteristics of the transistor and connect them we get
the load line as shown in Fig.5-3.
Equ.(5-2) can be written as,
1 𝑉𝐶𝐶
𝐼𝐶 = − 𝑉𝐶𝐸 + (5-3)
𝑅𝐿 𝑅𝐿
This equation is comparable with a standard equation of straight line,
𝑦 = 𝑚𝑥 + 𝑐 (5-4)
Comparing Equ.(5-3) and (5-4) we find that, the slope of the load line is −1/𝑅𝐿 and 𝑉𝐶𝐶 /𝑅𝐿 is the 𝑦-
intercept. Thus, the shape of the load-line completely depends on the values of 𝑉𝐶𝐶 and 𝑅𝐿 .
If the values of 𝑉𝐶𝐶 and 𝑅𝐿 are fixed the operating point
of the transistor can change only along this load line IC (mA)
depending on the values of 𝐼𝐵 . For example, if the value 1 𝑉𝐶𝐶
of 𝐼𝐵 increases (with constant values of 𝑉𝐶𝐶 and 𝑅𝐿 ) the 0
8 𝑅𝐿
operating point will move toward the point B and if 𝐼𝐵 Operating
decreases the operating point will move to point A. But, 6 or Q-point
point
for a fixed value of 𝐼𝐵 , the operating point also be fixed ICQ IBQ
4
as shown in Fig.5-4. DC load line
2
Thus, the intersecting point of the DC load line and the 𝑉𝐶𝐶
VCEQ
output characteristic curve of a transistor is called the
0 5 10 15 20 25 VCE (V)
operating point. It is also called the quiescent point or
simply 𝑸-point. Therefore, a 𝑄-point gives a fixed value Fig.5-4: Operating point (intersection
of output voltage and output current which are of load line and a fixed output
characteristic curve)
represented as 𝑉𝐶𝐸𝑄 and 𝐼𝐶𝑄 . If we draw a vertical line
through the 𝑄-point it will intersect the 𝑥-axis and this
is the value of 𝑉𝐶𝐸𝑄 . Similarly, a horizontal line through the 𝑄-point will intersect the 𝑦-axis and
that will give the value of 𝐼𝐶𝑄 . The value of the base current for which the operating point is set, is
called quiescent base current and is denoted as 𝐼𝐵𝑄 .
It is not always necessary to have the device characteristics in order to draw DC load line. A simple
graph of 𝐼𝐶 versus 𝑉𝐶𝐸 can be draw for any value of 𝑉𝐶𝐶 and 𝑅𝐿 . But if the load line is drawn on the
output characteristics, knowing any value of 𝐼𝐵 , 𝐼𝐶 or 𝑉𝐶𝐸 the other two can easily be determined.
5.3.1 Variation of Load Line and Operating Point
We know that the slope and position of the load line depends only on the values of 𝑉𝐶𝐶 and 𝑅𝐿 . It
will not depend on the properties of the transistor. The position of the Q-point depends on the load
line and the value of 𝐼𝐵𝑄 . Keeping 𝑉𝐶𝐶 constant, if we increase the value of 𝑅𝐿 , the value of 𝑉𝐶𝐶 /𝑅𝐿
Chapter 5: BJT Biasing Circuits 5

decreases. Then, the load lines will start from the same point on the 𝑥-axis, but on the 𝑦-axis they
will go down, and for a fixed value of base current 𝐼𝐵𝑄 , the operating point will move from right to
left as shown in Fig.5-5. On the other hand, if the value of 𝑉𝐶𝐶 increases with a constant value of
𝑅𝐿 , the load lines will be parallel to each other as shown in Fig.5-6. Because, if 𝑉𝐶𝐶 is made double
𝑉𝐶𝐶 /𝑅𝐿 will also be double. In this case, for a fixed value of 𝐼𝐵𝑄 , the operating point will also move
from left to right.

𝑉𝐶𝐶3 IC 𝑅 < 𝑅 < 𝑅 𝑉𝐶𝐶3 IC 𝑉𝐶𝐶1 < 𝑉𝐶𝐶2 < 𝑉𝐶𝐶3 IC

𝐿1 𝐿2 𝐿3 𝑉𝐶𝐶 𝐼𝐵𝑄1 < 𝐼𝐵𝑄2 < 𝐼𝐵𝑄3
𝑅𝐿2 Q-point shifting 𝑅𝐿 Q-point shifting 𝑅𝐿 Q-point shifting
to left to right to left-up
𝑉𝐶𝐶2 𝑉𝐶𝐶2
Q-point 2 Q-point 2
𝑅𝐿 IBQ3
𝑅𝐿2 Q-point 1 Q-point 3
IBQ 𝑉𝐶𝐶1 IBQ Q-point 3 IBQ2
𝑉𝐶𝐶1
𝑅𝐿 Q-point 2
𝑅𝐿3 IBQ1
Q-point 3 Q-point 1 Q-point 1
VCC VCE VCC1 VCC2 VCC3 VCE VCC VCE
Fig.5-5: Variation of load line Fig.5-6: Variation of load line Fig.5-7: Variation of Q-point
and Q-point for fixed 𝑉𝐶𝐶 and and Q-point for fixed 𝑅𝐿 and for fixed 𝑉𝐶𝐶 and 𝑅𝐿 but
variable 𝑅𝐿 . variable 𝑉𝐶𝐶 . variable 𝛽 or 𝐼𝐵𝑄 .

Another reason of variation of the operating point is the change of base current or the change of 𝛽
of the transistor. In both the cases, the output collector current and C-E voltage change along the
load line. This is illustrated in Fig.5-7.

Example 5-2
For the circuit of Fig.5-2 draw the load line and the operating point. Assume, 𝑅𝐿 = 2 kΩ, 𝑉𝐶𝐶 =
20 V and 𝐼𝐵𝑄 = 30 μA. Also determine the values of 𝐼𝐶𝑄 and 𝑉𝐶𝐸𝑄 .

Solution:
IC (mA)
To solve this problem, we will use the
10 B(0,10)
characteristic curves of Fig.5-3. We already know
IB = 40 A
that the load line can be drawn connecting two 8
𝑉 Q-point IBQ = 30 A
points, 𝐴(𝑉𝐶𝐶 , 0) on the 𝑥-axis and 𝐵(0, 𝑅𝐶𝐶 ) on 6
𝐿
Load line
the 𝑦-axis. For this example these points will be ICQ = 4 IB = 20 A
20 V
(20 V, 0) and (0, 2 kΩ
) = (0, 10 mA). 5.7 mA
IB = 10 A
2
Now, these points are put on the output A(20,0)
IB = 0
characteristic curve and connecting them the load 0 5 10 15 20 25 VCE (V)
line is drawn as shown in Fig.5-8. The intersecting VCEQ = 8.53 V
point of this load line and the 𝐼𝐵𝑄 = 30 μA curve
is the Q-point. From the Q-point the values of Fig.5-8: Load line and Q-point
for Example 5-2
𝑉𝐶𝐸𝑄 and 𝐼𝐶𝑄 are found as 8.53 V and 5.7 mA,
respectively.
Chapter 5: BJT Biasing Circuits 6

Comments: This method of determining the Q-point is called the graphical method, that can be
used only when the output characteristics of the transistor are given.

5.3.2 Swing of Operating Point with AC signal

Already we have found that the DC operating point determines the transistor collector current and
collector-emitter voltage. Thus, it defines the DC conditions of the circuit. But, when a transistor is
used as an amplifier, an AC signal is applied to the input circuit as described in Chapter 4. For
common emitter amplifier the AC signal is applied to the base through a capacitor as shown in
Fig.5-9. Due to this AC signal, 𝐼𝐵 changes according to the instantaneous value of this signal, which
is shown in Fig.5-10. This variation in 𝐼𝐵 causes 𝐼𝐶 to vary, and consequently produces a variation in
𝑉𝐶𝐸 . During the positive half-cycle of the signal, 𝐼𝐵 increases and for this reason 𝐼𝐶 increases also.
Due to this increase in 𝐼𝐶 , the value of 𝑉𝐶𝐸 decreases. On the other hand, during the negative half-
cycle of the input signal, 𝐼𝐵 decreases and consequently 𝐼𝐶 decreases. As 𝐼𝐶 decreases, the value of
𝑉𝐶𝐸 increases. In this way, an AC swing is produces in the output current, 𝐼𝐶 , and in the output
voltage, 𝑉𝐶𝐸 . To make the process clearer, let us draw the DC load line and the operating point for
𝑅𝐶 = 2 kΩ, 𝑉𝐶𝐶 = 20 V, and 𝐼𝐵 = 30 μA. The load line and the operating point (10 V, 5 mA) are
shown in Fig.5-10. When, due to the positive swing of the input signal, 𝐼𝐵 is increased from DC
quiescent value 30 μA to 50 μA, 𝐼𝐶 increases to approximately 8.3 mA and 𝑉𝐶𝐸 decreases to 3.4 V
as illustrated by point C on the load line. Thus, the swing (change) of the output voltage due to the
positive cycle of the input is,
Δ𝑉𝐶𝐸 = 10 V − 3.4 V = 6.6 V
And the swing in the output current is,
Δ𝐼𝐶 = 8.3 mA − 5 mA = 3.3 mA

IC (mA)
10 B
iC 8.3 mA IB = 50 A
iB
VCC Im C Im
8
RC IB = 40 A
RB
I/P AC signal
IC swing

IC 6 IB = 30 A
C IB 0 0
VCE 4 Q-point IB = 20 A
VBE
vi 2 IB = 10 A
IE -Im -Im
D
A IB = 0
1.7 mA
0 5 10 15 20 25 VCE (V)
Fig.5-9: CE circuit with AC 3.4 V 0
vCE 16.6 V
signal applied to the base 0
-Vm
VCE swing Vm

Fig.5-10: Swing of Q-point along the load line

Chapter 5: BJT Biasing Circuits 7

Now, due to the negative swing of the input signal, 𝐼𝐵 is decreased from 30 μA to 10 μA, 𝐼𝐶
decreases to approximately 1.7 mA and 𝑉𝐶𝐸 increases to 16.6 V as illustrated by point D on the
load line. Thus, the swing of the output voltage (for –ve half-cycle of input) is,
Δ𝑉𝐶𝐸 = 16.6 V − 10 V = 6.6 V
iC IC
And the swing in the output current is, B
Im 𝑉𝐶𝐶
Δ𝐼𝐶 = 5 mA − 1.7 mA = 3.3 mA 𝐼𝐶 =
2𝑅𝐿

IC swing
Therefore, we find that, with the 𝑄-point set
at 𝐼𝐶𝑄 = 5 mA and 𝑉𝐶𝐸𝑄 = 10 V a variation Q-point
of ±20 μA in the base current (𝐼𝐵 ) produces 0 t 𝑉𝐶𝐶
an output voltage (𝑉𝐶𝐸 ) swing of ±6.6 V and 𝐼𝐶 =
2𝑅𝐿
also a an output current (𝐼𝐶 ) swing of
±3.3 mA. The higher the swing in 𝑉𝐶𝐸 the 𝐼𝐶 = 0 A
-Im 0
greater the voltage gain can be achieved 0
0
VCC VCE
from the transistor circuit. 0 vCE
-Vm
The maximum possible C-E voltage swing VCE swing Vm
(Δ𝑉𝐶𝐸 ) for a given circuit, can be determined t
without using the transistor characteristics. Fig.5-11: Swing of Q-point along
For convenience, if we neglect the effect of the load line.
saturation and cutoff region, it may be
assumed that 𝐼𝐶 can be driven to zero at one extreme and to 𝑉𝐶𝐶 /𝑅𝐿 at the other extreme. For this
changes, the C-E voltage will also change from (𝑉𝐶𝐸 =) 𝑉𝐶𝐶 to (𝑉𝐶𝐸 =) 0 as illustrated in Fig.5-11.
Thus, if we set the Q-point at the centre of the load line it is possible to achieve the maximum
collector voltage swing and the maximum collector current swing. Then, the value of the maximum
swing in 𝑉𝐶𝐸 will be 𝑉𝐶𝐶 /2 and the value of the maximum swing in 𝐼𝐶 will be 𝑉𝐶𝐶 /2𝑅𝐿 .
5.3.3 Effect of Cutoff and Saturation Region on Q-Point Swing
The cutoff and saturation region of a
transistor hamper to produce the maximum
swing of 𝑉𝐶𝐸 and 𝐼𝐶 . We have already learnt in
IC
Chapter 4 that in saturation region both the B-
E and B-C junctions are forward biased and in Highest
Q-point
cutoff region both of them are reverse biased.
Load line
Hence, when a transistor is used as an
amplifier, these regions are avoided. That is, Q-point
Max IC

𝑉𝐶𝐸 is never allowed to fall below the

saturation voltage of the transistor, 𝑉𝐶𝐸(𝑠𝑎𝑡) .
Similarly, 𝐼𝐶 is never allowed to fall below, Lowest
𝐼𝐶𝐸𝑂 . Thus, in practical transistor circuit the Q-point
maximum swing of the operating point will VCE(sat) ICEO
not touch the 𝑥-axis and 𝑦-axis, rather its
swing will be as shown in Fig.5-12. But, as the VCE
Max VCE
value of 𝐼𝐶𝐸𝑂 is very small compared to the
level 𝐼𝐶 , in the first approximation, it can be Fig.5-12: Possible max. swing of Q-point
neglected. For low power transistor the value considering 𝑉𝐶𝐸(𝑠𝑎𝑡) and 𝐼𝐶𝐸𝑂
Chapter 5: BJT Biasing Circuits 8

of 𝑉𝐶𝐸(𝑠𝑎𝑡) ≈ 0.3 V. Hence, in the second approximation this value can also be neglected. Then, we
will get the swing of the Q-point as shown in Fig.5-11
5.3.4 Selection of DC Operating Point
It is wise to set the DC operating point at the middle of the maximum swing span. Then, the circuit
can amplify comparatively a larger input signal as shown in Fig.5-11. But, if we do not set the Q-
point at the middle of the swing range, the peak swing will be limited by the lower portion of the
load line as shown in Fig.5-13(a). Q-point can be set either by the value of 𝐼𝐶 or by the value of 𝑉𝐶𝐸 .
If one parameter is set at the middle of the load line the other parameter will automatically be set.
For ideal circuit (neglecting 𝑉𝐶𝐸(𝑠𝑎𝑡) and 𝐼𝐶𝐸𝑂 ) the Q-point will be set at the middle of the load line
by any one of the following equations.
𝑉𝐶𝐶 𝑉𝐶𝐶
𝐼𝐶𝑄 = = (5-5)
2𝑅𝐿 2𝑅𝐶

𝑉𝐶𝐶
𝑉𝐶𝐸𝑄 = (5-6)
2
IC IC
𝑉𝐶𝐶 𝑉𝐶𝐶
𝐼𝐶 = iC B 𝐼𝐶 =
B 2𝑅𝐿 2𝑅𝐿

iC

Q-point Q-point

0 t 0 t
A A
0 0
0 VCC VCE 0 VCC VCE
0 0
vCE vCE
(a) t (b) t

Fig.5-13: Result of setting Q-point not at the middle of the swing span, (a) Small swing
of 𝐼𝐶 and 𝑉𝐶𝐸 , and (b) One half-cycle is distorted for large swing of 𝐼𝐶 and 𝑉𝐶𝐸

On the other hand, for a practical circuit (considering 𝑉𝐶𝐸(𝑠𝑎𝑡) and 𝐼𝐶𝐸𝑂 ), we have to use either of
the following equations to set the Q-point at the middle of swing span.
1 𝑉𝐶𝐶 − 𝑉𝐶𝐸(𝑠𝑎𝑡)
𝐼𝐶𝑄 = 𝐼𝐶𝐸𝑂 + × ( − 𝐼𝐶𝐸𝑂 ) (5-7)
2 𝑅𝐶

(𝑉𝐶𝐶 − 𝐼𝐶𝐸𝑂 𝑅𝐶 ) − 𝑉𝐶𝐸(𝑠𝑎𝑡)

𝑉𝐶𝐸𝑄 = 𝑉𝐶𝐸(𝑠𝑎𝑡) + (5-8)
2
Chapter 5: BJT Biasing Circuits 9

Example 5-3
TIP 2955 and TIP 3055 are two power transistors. The values of 𝐼𝐶𝐸𝑂 and 𝑉𝐶𝐸(𝑠𝑎𝑡) are 0.7 mA and
3 V, respectively. Considering 𝑉𝐶𝐶 = 30 V and 𝑅𝐿 = 30 Ω, (i) Draw the load line, (ii) Maximum
swing span and (iii) Position of the operating point. Show them in a sketch.

Solution:
𝑉𝐶𝐶 30 V
(i) By plotting the points, 𝐴 (𝑉𝐶𝐶 , 0) = (30 V, 0) on the 𝑥-axis and 𝐵 = (0, ) = (0, )=
𝑅𝐿 30 Ω
(0, 1 A) on the 𝑦-axis and joining them the load line is drawn on the Fig.5-14.

(ii) The swing span of 𝑽𝑪𝑬 :

Minimum value of 𝑉𝐶𝐸 , 𝑉𝐶𝐸(𝑚𝑖𝑛) = 𝑉𝐶𝐸(𝑠𝑎𝑡) = 3V
Maximum value of 𝑉𝐶𝐸 , 𝑉𝐶𝐸(𝑚𝑎𝑥) = 𝑉𝐶𝐶 − 𝐼𝐶𝐸𝑂 𝑅𝐿
𝑜𝑟, 𝑉𝐶𝐸(𝑚𝑎𝑥) = 30 V − (0.7 mA)(30 Ω) = 29.98 V
Thus, the swing span of 𝑉𝐶𝐸 will be, Δ𝑉𝐶𝐸 = 𝑉𝐶𝐸(𝑚𝑎𝑥) − 𝑉𝐶𝐸(𝑚𝑖𝑛)
∴ Δ𝑉𝐶𝐸 = 29.98 V − 3 V = 26.98 V [Ans. ]

The swing span of 𝑰𝑪 : IC (A)

Minimum value of 𝐼𝐶 , 1.0
B(0,1)
Highest
𝐼𝐶(𝑚𝑖𝑛) = 𝐼𝐶𝐸𝑂 = 0.7 mA Q-point
0.8
Maximum value of 𝐼𝐶
𝑉𝐶𝐶 − 𝑉𝐶𝐸(𝑠𝑎𝑡) 30 V − 3 V
𝐼𝐶(𝑚𝑎𝑥) = = 0.6
IC = 0.8993

𝑅𝐿 30 Ω 450.35 mA Q-point
= 0.9 A 0.4
Thus, the swing span of 𝐼𝐶 will be, Lowest
16.49 V
Q-point
Δ𝐼𝐶 = 𝐼𝐶(𝑚𝑎𝑥) − 𝐼𝐶(𝑚𝑖𝑛) = 900 mA − 0.7 mA 0.2
VCE(sat)= 3 V ICEO = 0.7 mA
= 899.3 mA [Ans. ] A(30,0)
0
0 5 10 15 20 25 30 VCE (V)
(iii) To get maximum swing, the Q-point must VCE = 26.98
be set at the middle point. So the value of 𝐼𝐶𝑄 Fig.5-14: Graph for Example 4.3
and 𝑉𝐶𝐸𝑄 will be,
Δ𝐼𝐶 899.3 mA
𝐼𝐶𝑄 = 𝐼𝐶𝐸𝑂 + = 0.7mA + = (0.7 + 449.65) mA = 450.35 mA [Ans. ]
2 2
Δ𝑉𝐶𝐸 26.98 V
𝑉𝐶𝐸𝑄 = 𝑉𝐶𝐸(𝑠𝑎𝑡) + = = (3V + 13.49)V = 16.49 V[Ans. ]
2 2
All of the results are shown in Fig.5-14.
Comments: The effect of 𝐼𝐶𝐸𝑂 is insignificant and can be neglected.
Chapter 5: BJT Biasing Circuits 10

5.4 Bias Stability (Stability of Operating Point)

The target of a biasing circuit is to provide proper bias of the transistor junctions and to keep the
bias conditions fixed irrespective of the change of related parameters (temperature, 𝛽 etc.). The
bias point or the operating point is determined by the circuit components as well the parameters of
the transistor. But the transistor parameters do not remain constant, rather they change due to the
variation of temperature. Even, transistors with same number may have different parameters due
to manufacturing tolerance. The parameter 𝛽 is a prime example: it increases with temperature as
well as with collector current. Again, every transistor may have any value of 𝛽 within a range 𝛽(𝑚𝑖𝑛)
to 𝛽(𝑚𝑎𝑥) . All the variable parameters cause instability of the biasing condition and shift the
operating point. To design a better biasing circuit we must have the knowledge of the parameters
that are sensitive to temperature. These are listed below:
Beta (𝜷): Beta increases with the increase in temperature.
Barrier voltage of B-E junction (𝑽𝑩𝑬 ): 𝑉𝐵𝐸 decreases with the increase in temperature. For Ge
transistor its value decreases at the rate of about 1.6 mV/°C and for Si transistor the decrease rate
is about 2.5 mV/°C.
Leakage current (𝑰𝑪𝑩𝑶 ): For both Ge and Si transistor the value of 𝐼𝐶𝐵𝑂 doubles for every 10°C rise
in temperature.
The changes of these parameters, from the reference temperature (25°C) to (45°C), are
illustrated in Fig.5-15.
IC (mA) IB (A) ICBO (nA)
5 120 50
at 40 C at 40 C IE = 0
4 100 40
80 IB at 40 C
3
at 40 C IB = 20 A 30
60 at 30 C IE = 0
2 at 20 C 20
IB = 20 A IB at 20 C
at 20 C 40
at 20 C IE = 0
1 20 10

0 0 0
0 5 10 15 20 25 VCE (V) 0 0.2 0.4 0.6 0.8 1.0 1.2 VBE (V) 0 5 10 15 20 25 VCB (V)

(a) (b) (c)

Fig.5-15: Effect of temperature (a) Effect of  increase, (b) Effect of VBE
decrease, and (c) Increase of ICBO.

The value of 𝐼𝐶 of a transistor depends on all of these parameters. To understand this, look at the
following equation.
𝐼𝐶 = 𝛽𝐼𝐵 + (𝛽 + 1)𝐼𝐶𝐵𝑂 (5-9)
𝐼𝐶 directly depends on 𝛽 and 𝐼𝐶𝐵𝑂 . Moreover, if 𝑉𝐵𝐸 decreases due to increases in temperature, 𝐼𝐵
will increase which will further increase 𝐼𝐶 .
5.4.1 Thermal Runaway:
The flow of collector current produces heat in the transistor. This rises the temperature of the
transistor. With the rise in temperature, the values of 𝛽 and 𝐼𝐶𝐵𝑂 increase, and the value of 𝑉𝐵𝐸
Chapter 5: BJT Biasing Circuits 11

decreases. According to equation (5-9) the change in these parameters increase the value of 𝐼𝐶 .
The increase in 𝐼𝐶 increases the temperature of the transistor further. If the biasing point of the
transistor is not properly stabilized, this regenerative effect may increase 𝐼𝐶 to an excessively high
level. This excessive value of 𝐼𝐶 produces a lot of heat, which is not possible for the transistor to
withstand. Consequently, the transistor is destroyed. This type of self-destruction of an unstaibilzed
transistor is called thermal runaway.
5.4.2 Stability Factor
Stability factor is a parameter that expresses how much the operating condition of a transistor
circuit is stable. That is, a stability factor is a measure of how sensitive the collector bias current
(𝐼𝐶𝑄 ) is to the change in 𝐼𝐶𝐵𝑂 , 𝑉𝐵𝐸 , and 𝛽 due to temperature or any other reason. Thus, stability
factor is defined for each of these parameters as:
Δ𝐼𝐶
𝑆(𝐼𝐶𝐵𝑂 ) = | (5-10)
Δ𝐼𝐶𝐵𝑂 𝑉 and 𝛽 constant
𝐵𝐸

Δ𝐼𝐶
𝑆(𝑉𝐵𝐸 ) = | (5-11)
Δ𝑉𝐵𝐸 𝐼 and 𝛽 constant
𝐶𝐵𝑂

Δ𝐼𝐶
𝑆(𝛽) = | (5-12)
Δ𝛽 𝐼 and 𝑉𝐵𝐸 constant
𝐶𝐵𝑂

To illustrate, if the value of 𝑆(𝐼𝐶𝐵𝑂 ) for a certain circuit is 20, then a change in 𝐼𝐶𝐵𝑂 from 1 μA to
2 μA (Δ𝐼𝐶𝐵𝑂 = 1μA) will cause a change in 𝐼𝐶 equal to Δ𝐼𝐶 = 𝑆(𝐼𝐶𝐵𝑂 )Δ𝐼𝐶𝐵𝑂 = 20 × (1 μA) =
20 μA. An ideal circuit will have the value of stability factor of zero, implying no change in 𝐼𝐶 for any
change in the related parameters. The actual value of a practical bias circuit depends on the
components used in the circuit and never be 0.
Each of the equations (5-10) to (5-12) gives the stability factor related to variation in one
parameter only, so the total change in collector current over a certain temperature range can be
calculated approximated by,
Δ𝐼𝐶 ≈ Δ𝐼𝐶𝐵𝑂 × 𝑆(𝐼𝐶𝐵𝑂 ) + Δ𝑉𝐵𝐸 × 𝑆(𝑉𝐵𝐸 ) + 𝛥𝛽 × 𝑆(𝛽) (5-13)
The expression is an approximation because all three parameters change simultaneously with
temperature.

5.5 Biasing Circuits

In section 5.2 we have seen how a transistor can be biases properly using a single voltage source
(battery or power supply). This is the simplest form of biasing circuit. To achieve the fixed operating
point, there are many other biasing circuits. The names of different biasing circuits are:
a) Fixed bias or base bias
b) Base bias with emitter feedback or emitter bias
c) Collector-to-base bias
d) Voltage divider bias
Chapter 5: BJT Biasing Circuits 12

5.6 Fixed Bias Circuit

Well, the simplest biasing circuit discussed in section 5.2 is called the fixed bias. For proper
understanding of the calculation, the circuit is redrawn in Fig.5-16(a). The collector resistor used in
transistor circuit is also called the load resistance. So, for biasing only a fixed resistance is used in
the base circuit. That’s why, this circuit is called fixed bias or base bias. The value of the supply
voltage and 𝑅𝐵 sets a base current, 𝐼𝐵 . Depending on 𝛽 of the transistor a collector current is
developed. 𝑉𝐶𝐸 is determined by 𝐼𝐶 , 𝑅𝐶 and 𝑉𝐶𝐶 . As the target of the biasing circuit is to set a DC
operating point or bias point, we will derive the equations that determine the position of the
operating point.
VCC
IC
RC RC
IB ICRC
RB
IC IC C-E
VBE loop VCC
IB RB IBRB IB
VCE VCE
VBE B-E IE
VCC loop
IE IE

(a) (b) (c)

Fig.5-16: Fixed bias circuit, (a) Complete circuit, (b) B-E loop, and (c) C-E loop

Applying KVL in the base-emitter circuit [Fig.5-16(b)] we get,

𝑉𝐶𝐶 − 𝐼𝐵 𝑅𝐵 − 𝑉𝐵𝐸 = 0
𝑜𝑟, 𝐼𝐵 𝑅𝐵 = 𝑉𝐶𝐶 − 𝑉𝐵𝐸
𝑉𝐶𝐶 − 𝑉𝐵𝐸
∴ 𝐼𝐵 = 𝐼𝐵𝑄 = (5-14)
𝑅𝐵
Using this equation we can easily calculate the value of 𝐼𝐵 . As, this value determines the position of
Q-point, it is also represented by 𝐼𝐵𝑄 .
If we know the value of 𝛽 of the transistor, the collector current can be calculated as,
𝐼𝐶 = 𝐼𝐶𝑄 = 𝛽𝐼𝐵 + 𝐼𝐶𝐸𝑂 = 𝛽𝐼𝐵 + (𝛽 + 1)𝐼𝐶𝐵𝑂 ≈ 𝛽𝐼𝐵 = 𝛽𝐼𝐵𝑄 (5-15)

Now, applying KVL in the collector-emitter circuit [Fig.5-16(c)] we get,

𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 − 𝑉𝐶𝐸 = 0
∴ 𝑉𝐶𝐸 = 𝑉𝐶𝐸𝑄 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 (5-16)
Using the equations (5-14) to (5-16), we can calculate the value of 𝐼𝐵 , 𝐼𝐶 , and 𝑉𝐶𝐸 corresponding the
operating point of the base bias circuit. That’s why, these collector current is represented by 𝐼𝐶𝑄
and the collector-emitter voltage is represented by 𝑉𝐶𝐸𝑄 .
Chapter 5: BJT Biasing Circuits 13

5.6.1 Determination of Load Line of Fixed Bias Circuit

Determination process of load line for fixed bias circuit has already been discussed in Section 5.2.
Load line can be drawn using Equ.(5-16). When 𝐼𝐶 = 0, 𝑉𝐶𝐸 = 𝑉𝐶𝐶 and when 𝑉𝐶𝐸 = 0, 𝐼𝐶 = 𝑉𝐶𝐶 /𝑅𝐶 .
Thus, the load line starts from 𝑉𝐶𝐶 on the 𝑥-axis and ends to 𝑉𝐶𝐶 /𝑅𝐶 on the 𝑦-axis.
5.6.2 Saturation of Transistor in Fixed Bias Circuit
In fixed bias circuit, if a resistor of any value is connected to the base, the transistor will never go to
cutoff. This is true for all basing circuits that will be discussed later. That is, by using any inaccurate
biasing components, there is no chance of driving the transistor to cutoff. But if we use incorrect
values of biasing resistors, transistor may become saturated. That’s why in transistor biasing, we
should be aware of saturation of the transistor, because saturation causes distortion. Transistors in
base bias circuit may be saturated due to very large value of 𝛽 and 𝑅𝐶 , and very small value of 𝑅𝐵
(considering 𝑉𝐶𝐶 constant). In servicing (repair) electronic circuit with base bias, we may replace the
transistor. If the new transistor has a very large value of 𝛽 the transistor may be saturated.
Similarly, if we replace 𝑅𝐵 by a very low value resistor, or 𝑅𝐶 by a very high value resistor the
transistor may also be saturated. To make the concept clear refer to Example 5-4. The saturation
current of base bias will be approximately,
𝑉𝐶𝐶
𝐼𝐶(𝑠𝑎𝑡) = (5-17)
𝑅𝐶

Example 5-4
Assuming 𝑉𝐶𝐶 = 12 V, 𝑅𝐵 = 180 kΩ, 𝑅𝐶 = 1 kΩ and a silicon transistor with 𝛽 = 100 for the
circuit of Fig.5-16(a), calculate the operating point and determine the load line.

Solution: IC (mA)
12
Using Equ. (5-14), the base current of the bias point is, Load line
10
𝑉𝐶𝐶 − 𝑉𝐵𝐸 12 V − 0.7 V
𝐼𝐵𝑄 = = ≈ 62.8 μA 8 Q-point
𝑅𝐵 180 kΩ
6 IBQ = 62.8 A
Using Equ. (5-15), collector current at the bias point is, ICQ=6.28 mA
4
𝐼𝐶𝑄 ≈ 𝛽𝐼𝐵𝑄 = 100 × (62.8 μA) ≈ 6.28 mA [Ans. ]
2 VCEQ=5.72 V
Using Equ.(5-16), collector-emitter voltage at the
operating point is, 0
0 2 4 6 8 10 12 VCE (V)

∴ 𝑉𝐶𝐸𝑄 = 12 V − (6.28 mA) × (1 kΩ) = 5.72 V [Ans. ] Fig.5-17: Load line and Q-
point of example 5-4
The calculated operating point and the load line is drawn
in Fig.5-17.
The saturation current can be calculated from Equ.(5-16) as,
𝑉𝐶𝐸𝑄 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 𝑜𝑟, 0.5 V = 12 V − 𝐼𝐶 × 1 kΩ
12 V − 0.5 V
∴ 𝐼𝐶 = = 11.5 mA [Ans. ]
1 kΩ
Chapter 5: BJT Biasing Circuits 14

Example 5-5
A fixed bias circuit is designed with 𝑉𝐶𝐶 = 12 V and a transistor with 𝛽 = 100 which is shown in
Fig.5-18. In this design the operating point is set at the middle of the load line. Calculate the
operating point. To check how higher values of 𝛽 and 𝑅𝐶 and lower value of 𝑅𝐵 saturate the
transistor, calculate the operating points considering 𝛽 = 200, 𝑅𝐵 = 270 kΩ and 𝑅𝐶 = 6.2 kΩ, one
by one.
VCC = 12 V
Solution:
RB RC 3k
12 V − 0.7 V 560 k IC
Using Equ.(5-14), 𝐼𝐵𝑄 = ≈ 20.1786 μA
560 kΩ IB
𝛽 = 100
Using Equ.(5-15), 𝐼𝐶𝑄 = 100 × 20.1786 μA ≈ 2.0179 mA
Using Equ.(5-16), 𝑉𝐶𝐸𝑄 = 12 V − (2.0179 mA) × (3 kΩ) ≈ 5.95 V IE

As, 𝑉𝐶𝐸𝑄 ≈ 1/2 (𝑉𝐶𝐶 ), the operating is at the middle of the load line.
Fig.5-18: Fixed bias circuit
Operating point for 𝜷 = 𝟐𝟎𝟎:
for Example 5-5
𝑉𝐶𝐶 − 𝑉𝐵𝐸 12 V − 0.7 V
𝐼𝐵𝑄 = = ≈ 20.1786 μA
𝑅𝐵 560 kΩ
𝐼𝐶𝑄 = 𝛽𝐼𝐵 = 200 × 20.1786 μA ≈ 4.0357 mA
∴ 𝑉𝐶𝐸𝑄 = 12 V − (4.0357 mA) × (3 kΩ) ≈ −0.11 V [less than 0.3 V means saturation]
Operating point for 𝑹𝑩 = 𝟐𝟕𝟎 𝐤𝛀:
𝑉𝐶𝐶 − 𝑉𝐵𝐸 12 V − 0.7 V
𝐼𝐵𝑄 = = ≈ 41.8519 μA
𝑅𝐵 270 kΩ
𝐼𝐶𝑄 = 𝛽𝐼𝐵 = 100 × 41.8519 μA ≈ 4.1852 mA
∴ 𝑉𝐶𝐸𝑄 = 12 V − (4.1852 mA) × (3 kΩ) ≈ −0.56 V [saturation]
Operating point for 𝑹𝑪 = 𝟔. 𝟐 𝐤𝛀:
𝑉𝐶𝐶 − 𝑉𝐵𝐸 12 V − 0.7 V
𝐼𝐵𝑄 = = ≈ 20.1786 μA
𝑅𝐵 560 kΩ
𝐼𝐶𝑄 = 𝛽𝐼𝐵 = 100 × 20.1786 μA ≈ 2.0179 mA
∴ 𝑉𝐶𝐸𝑄 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 = 12 V − (2.0179 mA) × (6.2 kΩ) ≈ −0.51 V [saturation]
Comments: From this example, it is clear that higher value of 𝛽 and 𝑅𝐶 , and lower value of 𝑅𝐵 can
saturate a transistor in fixed bias circuit.

5.6.3 Calculation of Stability Factors of Fixed Bias Circuit

To calculate the stability factor we need the exact expression of the collector current,
From Equ.(5-15), 𝐼𝐶 = 𝛽𝐼𝐵 + (𝛽 + 1)𝐼𝐶𝐵𝑂 (5-18)
Putting the value of 𝐼𝐵 from Equ.(5-14) into Equ.(5-18) we get,
Chapter 5: BJT Biasing Circuits 15

𝛽(𝑉𝐶𝐶 − 𝑉𝐵𝐸 )
𝐼𝐶 = + (𝛽 + 1)𝐼𝐶𝐵𝑂 (5-19)
𝑅𝐵
𝑆(𝐼𝐶𝐵𝑂 ) can be calculated by differentiating Equ.(5-19) with respect to 𝐼𝐶𝐵𝑂 considering 𝑉𝐵𝐸 and 𝛽
constant,
δ𝐼𝐶 δ 𝛽(𝑉𝐶𝐶 − 𝑉𝐵𝐸 ) δ
𝑆(𝐼𝐶𝐵𝑂 ) = | = + (𝛽 + 1)𝐼𝐶𝐵𝑂
δ𝐼𝐶𝐵𝑂 𝑉 ,𝛽 δ𝐼𝐶𝐵𝑂 𝑅𝐵 δ𝐼𝐶𝐵𝑂
𝐵𝐸

∴ 𝑆(𝐼𝐶𝐵𝑂 ) = 0 + (𝛽 + 1) = (𝛽 + 1) (5-20)
Now, differentiating Equ.(5-19) with respect to 𝑉𝐵𝐸 for constant values of 𝐼𝐶𝐵𝑂 and 𝛽,
δ𝐼𝐶 δ 𝛽(𝑉𝐶𝐶 − 𝑉𝐵𝐸 ) δ
𝑆(𝑉𝐵𝐸 ) = | = + (𝛽 + 1)𝐼𝐶𝐵𝑂
δ𝑉𝐵𝐸 𝐼 ,𝛽 δ𝑉𝐵𝐸 𝑅𝐵 δ𝑉𝐵𝐸
𝐶𝐵𝑂

δ 𝛽𝑉𝐶𝐶 δ 𝛽𝑉𝐵𝐸 δ
𝑜𝑟, 𝑆(𝑉𝐵𝐸 ) = − + (𝛽 + 1)𝐼𝐶𝐵𝑂
δ𝑉𝐵𝐸 𝑅𝐵 δ𝑉𝐵𝐸 𝑅𝐵 δ𝑉𝐵𝐸
𝛽
𝑜𝑟, 𝑆(𝑉𝐵𝐸 ) = 0 − +0
𝑅𝐵
𝛽
∴ 𝑆(𝑉𝐵𝐸 ) = − (5-21)
𝑅𝐵
Again, differentiating Equ.(5-19) with respect to 𝛽 for constant 𝐼𝐶𝐵𝑂 and 𝑉𝑉𝐸 ,
δ𝐼𝐶 δ 𝛽(𝑉𝐶𝐶 − 𝑉𝐵𝐸 ) δ
𝑆(𝛽) = | = + (𝛽 + 1)𝐼𝐶𝐵𝑂
δ𝛽 𝐼 𝑉 δ𝛽 𝑅𝐵 δ𝛽
𝐶𝐵𝑂, 𝐵𝐸

δ 𝛽𝑉𝐶𝐶 δ 𝛽𝑉𝐵𝐸 δ
𝑜𝑟, 𝑆(𝛽) = − + (𝛽 + 1)𝐼𝐶𝐵𝑂
δ𝛽 𝑅𝐵 δ𝛽 𝑅𝐵 δ𝛽
δ 𝛽𝑉𝐶𝐶 δ 𝛽𝑉𝐵𝐸 δ
𝑜𝑟, 𝑆(𝛽) = − + (𝛽 + 1)𝐼𝐶𝐵𝑂
δ𝛽 𝑅𝐵 δ𝛽 𝑅𝐵 δ𝛽
𝑉𝐶𝐶 𝑉𝐵𝐸
𝑜𝑟, 𝑆(𝛽) = − + 𝐼𝐶𝐵𝑂
𝑅𝐵 𝑅𝐵
𝑉𝐶𝐶
𝑜𝑟, 𝑆(𝛽) = − 0 + 𝐼𝐶𝐵𝑂 [∵ 𝑉𝐵𝐸 is very small]
𝑅𝐵
𝑉𝐶𝐶 𝑉𝐶𝐶 𝐼𝐶
∵ 𝐼𝐶𝐵𝑂 is very small, 𝑆(𝛽) = + 𝐼𝐶𝐵𝑂 ≈ ≈ 𝐼𝐵 = (5-22)
𝑅𝐵 𝑅𝐵 𝛽

Example 5-6
The following table shows the parameter values for a typical transistor at temperature 10°C and
50°C. Find the total change in DC collector current over the temperature range for the base bias
circuit of Fig.5-16(a). Assume the values of 𝑉𝐶𝐶 = 16 V and 𝑅𝐵 = 260 kΩ.
Chapter 5: BJT Biasing Circuits 16

10°C 50°C Change

𝐼𝐶𝐵𝑂 0.01 μA 0.16 μA Δ𝐼𝐶𝐵𝑂 = 0.15 μA
𝑉𝐵𝐸 0.74 V 0.64 V Δ𝑉𝐵𝐸 = −0.1 V
𝛽 60 90 Δ𝛽 = 30
Solution:
𝑉𝐶𝐶 − 𝑉𝐵𝐸 16 V − 0.74 V
Using Equ.(5-14), base current at 10°C, 𝐼𝐵 = = ≈ 58.7 μA
𝑅𝐵 260 kΩ
Using Equ.(5-15), collector current at 10°C is,
𝐼𝐶 = 𝛽𝐼𝐵 + (𝛽 + 1)𝐼𝐶𝐵𝑂 = 60 × 58.7 μA + (60 + 1) × (0.01 μA) ≈ 3.52 mA
Using Equ.(5-13), Δ𝐼𝐶 ≈ Δ𝐼𝐶𝐵𝑂 × 𝑆(𝐼𝐶𝐵𝑂 ) + Δ𝑉𝐵𝐸 × 𝑆(𝑉𝐵𝐸 ) + 𝛥𝛽 × 𝑆(𝛽)
𝛽 𝐼𝐶
Using equations (5-20) to (5-22), Δ𝐼𝐶 ≈ Δ𝐼𝐶𝐵𝑂 × (𝛽 + 1) + Δ𝑉𝐵𝐸 × (− ) + Δ𝛽 ×
𝑅𝐵 𝛽
60 3.52 mA
𝑜𝑟, Δ𝐼𝐶 = (0.15 μA)(60 + 1) + (−0.1 V) × (− ) + 30 ×
260 kΩ 60
𝑜𝑟, Δ𝐼𝐶 = 9.15 μA + 23.1 μA + 1760 μA
∴ Δ𝐼𝐶 = 1792.5 μA [Ans. ]
Comments: As the change in 𝛽 is large, the change in collector current mainly depends on it.

5.6.4 Effect of 𝜷𝒎𝒊𝒏 and 𝜷𝒎𝒂𝒙

When the transistor’s DC current gain (𝛽) is known, it is easy to determine the circuit bias
condition as in Example 5-4. Similarly, if the value of (𝛽) is given, we can easily design a bias circuit.
However, in practical situations the manufacturer’s datasheet of transistor does not mention a
single value of 𝛽. We know, transistors are usually identified by type numbers. For a specific
number of a transistor, datasheet mentions the value of 𝛽 in a range. That is, the minimum value of
𝛽 and the maximum value of 𝛽 (written as Min. ℎ𝐹𝐸 and Max. ℎ𝐹𝐸 ) and sometimes a typical value
of 𝛽. In circuit analysis, it is sometimes convenient to use the typical value of 𝛽 of the transistor.
But, we should be aware of the effect of 𝛽𝑚𝑖𝑛 and 𝛽𝑚𝑎𝑥 .
To illustrate the situation, let us consider the transistor BD145. The values of 𝛽(𝑚𝑖𝑛) and 𝛽(𝑚𝑎𝑥) are
40 and 250, respectively (shown in the Datasheet in Chapter 4). We will first design a fixed bias
circuit considering the value of 𝛽 in between the range, say 𝛽 = 145 and then, will see the effect of
𝛽𝑚𝑖𝑛 and 𝛽𝑚𝑎𝑥 . To design the bias circuit, assume 𝐼𝐶𝑄 = 2 mA, 𝑉𝐶𝐶 = 12 V .
To set the Q-point at the middle of the load line, the value of the collector-emitter voltage should
be,
12 V
𝑉𝐶𝐸𝑄 = = 6V
2
the voltage drop across the collector resistor will be,
𝑉𝑅𝐶 = 𝑉𝐶𝐶 − 𝑉𝐶𝐸𝑄 = 12 V − 6 V = 6 V
Chapter 5: BJT Biasing Circuits 17

Therefore, the value of collector resistor will be,

𝑉𝑅𝐶 6V
𝑅𝐶 = = = 3 kΩ
𝐼𝐶𝑄 2 mA
The value of base current will be,
𝐼𝐶𝑄 2 mA
𝐼𝐵𝑄 =
= = 13.793 μA
𝛽 145
So, the value of base resistor should be (using Equ.5-14),
𝑉𝐶𝐶 − 𝑉𝐵𝐸 12 V − 0.7 V
𝑅𝐵 = = = 819 kΩ (use standard 820 kΩ)
𝐼𝐵𝑄 13.793 μA
The designed biasing circuit is shown in Fig.5-19(a).
For the designed value of 𝑅𝐵 , actual base current will be,
𝑉𝐶𝐶 − 𝑉𝐵𝐸 12 V − 0.7 V
𝐼𝐵𝑄 = = = 13.781 μA
𝑅𝐵 820 kΩ
Hence, the actual operating will be,
𝐼𝐶𝑄 = 𝐼𝐵𝑄 𝛽 = (13.781 μA)145 = 1.998 mA
𝑉𝐶𝐸𝑄 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 = 12 V − (1.998 mA)(3 kΩ) ≈ 6 V
The load line and the operating point are shown in Fig.5-19(b).
Now, to see the effect 𝛽𝑚𝑖𝑛 and 𝛽𝑚𝑎𝑥 , we will recalculate the operating point considering, 𝛽𝑚𝑖𝑛 =
40 and 𝛽𝑚𝑎𝑥 = 250. These can be done using the above two equations.
IC (mA)
Q-point: max = 250
VCC = 12 V 4
IBQ = 13.781 A

RC 3k 3 Design Q-point

RB (1.67 V,
820 k IC 3.445 mA) IBQ = 13.781 A
2
IB
𝛽 = 145
(6 V,1.998 mA) Q-point: min = 40
1
IE IBQ = 13.781 A (10.35 V,
0.551 mA)
0
0 2 4 6 8 10 12 VCE (V)
(a)
(b)
Fig.5-19: Effect of 𝛽𝑚𝑖𝑛 and 𝛽𝑚𝑎𝑥 operating point, (a) Designed circuit with 𝛽 =
145, and (b) Load line and operating points
For 𝜷𝒎𝒊𝒏 = 𝟒𝟎:
𝐼𝐶𝑄 = (13.781 μA)40 = 0.551 mA
𝑉𝐶𝐸𝑄 = 12 V − (0.551 mA)(3 kΩ) ≈ 10.35 V
For 𝜷𝒎𝒂𝒙 = 𝟐𝟓𝟎:
𝐼𝐶𝑄 = (13.781 μA) 250 = 3.445 mA
𝑉𝐶𝐸𝑄 = 12 𝑉 − (3.445 mA)(3 kΩ) ≈ 1.67 V
Chapter 5: BJT Biasing Circuits 18

The variation of the Q-point for 𝛽𝑚𝑖𝑛 and 𝛽𝑚𝑎𝑥 is also shown in the same figure.
The variation is so large that the circuit will not work properly with 𝛽𝑚𝑖𝑛 and 𝛽𝑚𝑎𝑥 .

5.7 Fixed Bias with Emitter Feedback

This biasing circuit is exactly same as fixed bias, but an additional resistor (𝑅𝐸 ) is used in the emitter
terminal as shown in Fig.5-20(a). This biasing circuit is also called emitter bias. The function of 𝑅𝐸 is
to provide better stability of the DC operating point than the fixed bias network. The more stable a
configuration, the less its response will change due to undesirable changes in temperature and
device parameter variations. The emitter resistor applies a voltage to the input circuit which is
proportional to the output current. This mechanism is called feedback, which will be studied later.
For this reason 𝑅𝐸 is called emitter feedback resistor.
Calculation of operating point:
From the forward biased B-E circuit, using KVL [Fig.5-20(b)] we get,
𝑉𝐶𝐶 − 𝐼𝐵 𝑅𝐵 − 𝑉𝐵𝐸 − 𝐼𝐸 𝑅𝐸 = 0
𝑜𝑟, 𝑉𝐶𝐶 − 𝐼𝐵 𝑅𝐵 − 𝑉𝐵𝐸 − (𝛽 + 1)𝐼𝐵 𝑅𝐸 = 0 [∵ 𝐼𝐸 = (𝛽 + 1)𝐼𝐵 ]
𝑜𝑟, 𝐼𝐵 [𝑅𝐵 + (𝛽 + 1)𝑅𝐸 ] = 𝑉𝐶𝐶 − 𝑉𝐵𝐸
𝑉𝐶𝐶 − 𝑉𝐵𝐸
∴ 𝐼𝐵 = (5-23)
𝑅𝐵 + (𝛽 + 1)𝑅𝐸

VCC
IC
RB IC RC IB IC RC

VBE C-E
RB IE VCE loop VCC
IB
IB B-E
VCC loop RE
IE RE IE RE

(a) (b) (c)

Fig.5-20: Fixed bias with emitter resistor, (a) Complete circuit, (b) B-E loop, and (c) C-E loop

Once, 𝐼𝐵 is found, the collector current can be calculated as,

𝐼𝐶 = 𝛽𝐼𝐵 + 𝐼𝐶𝐸𝑂 ≈ 𝛽𝐼𝐵 (5-24)
We can also calculate 𝐼𝐶 , without calculating 𝐼𝐵 as,
𝑉𝐶𝐶 − 𝐼𝐵 𝑅𝐵 − 𝑉𝐵𝐸 − 𝐼𝐸 𝑅𝐸 = 0
𝐼𝐶 𝐼𝐶
𝑜𝑟, 𝑉𝐶𝐶 − 𝑅𝐵 − 𝑉𝐵𝐸 − 𝐼𝐶 𝑅𝐸 = 0 [∵ 𝐼𝐵 = 𝑎𝑛𝑑 𝐼𝐸 ≈ 𝐼𝐶 ]
𝛽 𝛽
𝑅𝐵
𝑜𝑟, ( + 𝑅𝐸 ) 𝐼𝐶 = 𝑉𝐶𝐶 − 𝑉𝐵𝐸
𝛽
Chapter 5: BJT Biasing Circuits 19

𝑉𝐶𝐶 − 𝑉𝐵𝐸
∴ 𝐼𝐶 = (5-25)
𝑅𝐵 /𝛽 + 𝑅𝐸
Now, applying KVL, in the C-E loop of Fig.5-20(c) we get,
𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 − 𝑉𝐶𝐸 − 𝐼𝐸 𝑅𝐸 = 0
𝑜𝑟, 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 − 𝑉𝐶𝐸 − 𝐼𝐶 𝑅𝐸 = 0 [∵ 𝐼𝐸 ≈ 𝐼𝐶 ]
∴ 𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 (𝑅𝐶 + 𝑅𝐸 ) (5-26)
Using equations (5-23), (5-24) and (5-26), the operating point of the circuit can easily be calculated.
5.7.1 Stabilization mechanism
From the forward biased B-E circuit we have found,
𝑉𝐶𝐶 − 𝐼𝐵 𝑅𝐵 − 𝑉𝐵𝐸 − 𝐼𝐸 𝑅𝐸 = 0 (5-27)
𝑉𝐶𝐶 − 𝑉𝐵𝐸 − 𝐼𝐸 𝑅𝐸
𝑜𝑟, 𝐼𝐵 = (5-28)
𝑅𝐵
For fixed values of 𝑉𝐶𝐶 , 𝑉𝐵𝐸 , and 𝑅𝐸 the value of 𝐼𝐵 will be fixed. Now, if due to the increase in
temperature collector current 𝐼𝐶 increases, 𝐼𝐸 will also increase. Hence, according to Equ.(5-27), 𝐼𝐵
will also decrease. With this decrease in 𝐼𝐵 collector current 𝐼𝐶 will decrease. In this way, any
attempt to increase 𝐼𝐶 will automatically be adjusted. On the other hand, if 𝐼𝐶 decrease from the
DC bias point due to decrease in temperature, 𝐼𝐸 𝑅𝐸 will decrease, 𝐼𝐵 will increase and 𝐼𝐶 will also
increase.
5.7.2 Emitter Resistance Feedback to Input
From Equ.(5-27), we see that the emitter resistor 𝑅𝐸 also affects the input (base) current. Actually,
𝑅𝐸 is fed back to the input circuit. This
equation can be represented by an
equivalent circuit as in Fig.5-21(a) and (b). IB B IB B
Fig.5-21(b) will produce the same result as B-E
Equ.(5-27). From this figure it is clear that junction
RB VBE RB VBE
𝑅𝐸 is reflected to the base circuit being E E
multiplied by a factor (𝛽 + 1). In other
VCC IE RE VCC Ri = IB (+1)RE
words, the emitter resistor, which is part (+1)RE
of the collector–emitter loop, appears as
(𝛽 + 1)𝑅𝐸 in the base–emitter loop.
(a) (b)
Because, 𝛽 has a large value (typically 50
or more), the emitter resistor, multiplied Fig.5-21: Equivalent circuit of B-E junction side,
by a large number, appears to the base (a) B-E junction is represented by a diode,
circuit. Therefore, the resistance in the (b) B-E junction is represented by its barrier
base terminal is increased. In general, for voltage VBE.
the configuration of Fig.5-21(b), the input
resistance (𝑅𝑖 ) seen from the base terminal will be,
𝑅𝑖 = (𝛽 + 1)𝑅𝐸 + 𝑟𝐷 ≈ (𝛽 + 1)𝑅𝐸 (5-29)
Chapter 5: BJT Biasing Circuits 20

Actually, the static resistance (𝑟𝐷 ) of the forward biased B-E junction will be effective in series with
(𝛽 + 1)𝑅𝐸 . But, as its value is very low, in the analysis of bias circuit it cab be neglected.
5.7.3 Determination of Load Line of Emitter Bias Circuit
Determination process of load line for emitter bias circuit is a little different from the fixed bias
circuit. Load line can be drawn using Equ.(5-26) as described in Section 5.3.
𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 (𝑅𝐶 + 𝑅𝐸 ) (5-30)
Point A: When, 𝐼𝐶 = 0, 𝑉𝐶𝐸 = 𝑉𝐶𝐶 and
Point B: When 𝑉𝐶𝐸 = 0, 𝐼𝐶 = 𝑉𝐶𝐶 /(𝑅𝐶 + 𝑅𝐸 ). Point A(𝑉𝐶𝐶 , 0) lies on the 𝑥-axis and the point
B(0, 𝑉𝐶𝐶 /(𝑅𝐶 + 𝑅𝐸 )) lies on the 𝑦-axis. Connecting these two points, we can draw the load line.
5.7.4 Saturation of Transistor in Emitter Bias Circuit
We have already learnt that there is very little chance to drive a transistor in cutoff, by using any
inaccurate values of biasing resistors or by changing 𝛽 unless the base terminal is open. If we need
to change components of this circuit, we should be aware of saturation of the transistor. We will
try to use components of designed values. But in any case, if we use inaccurate value of
components, transistor in emitter bias circuit may also be saturated. Here, the transistors may be
saturated for very large value of 𝛽 and 𝑅𝐶 , and very small value of 𝑅𝐵 . Any change in 𝑅𝐸 cannot
saturate the transistor. These saturation effects are explained further in Example 5-7. The value of
current that will saturate the transistor is,
𝑉𝐶𝐶
𝐼𝐶(𝑠𝑎𝑡) = (5-31)
𝑅𝐶 + 𝑅𝐸

Example 5-7
An emitter bias circuit is designed with 𝑉𝐶𝐶 = 12 V and a transistor with 𝛽 = 100 which is shown in
Fig.5-22. In this design the operating point is set at the middle of the load line. Calculate the
operating point. To check how the higher values of 𝛽 and 𝑅𝐶 and the lower value of 𝑅𝐵 saturate
the transistor, calculate the operating points considering 𝛽 = 260, 𝑅𝐵 = 180 kΩ and 𝑅𝐶 = 6.2 kΩ,
one by one. Also to prove that 𝑅𝐸 cannot saturate the transistor repeat the problem for 𝑅𝐸 = 0
and 𝑅𝐸 = 500 kΩ.

Solution:
Operating point of the given circuit:
𝑉𝐶𝐶 − 𝑉𝐵𝐸 12 V − 0.7 V
Using Equ.(5-23), 𝐼𝐵𝑄 = = ≈ 19.7898 μA
𝑅𝐵 + (𝛽 + 1)𝑅𝐸 470 kΩ + (100 + 1) 1kΩ
Using Equ.(5-24), 𝐼𝐶𝑄 = 𝛽𝐼𝐵 = 100 × 19.7898 μA ≈ 1.979 mA
Using Equ.(5-26), 𝑉𝐶𝐸𝑄 = 12 V − (1.979 mA) × (2 kΩ + 1 kΩ) ≈ 6.06 V
As, 𝑉𝐶𝐸𝑄 = 6.06 V ≈ 𝑉𝐶𝐶 /2, the operating point of the given circuit must be at the middle of the
load line.
Operating point for 𝜷 = 𝟐𝟔𝟎:
Chapter 5: BJT Biasing Circuits 21

Using the same equations,

𝑉𝐶𝐶 − 𝑉𝐵𝐸 12 V − 0.7 V
𝐼𝐵𝑄 = = ≈ 15.4583 μA
𝑅𝐵 + (𝛽 + 1)𝑅𝐸 470 kΩ + (260 + 1) 1kΩ
∴ 𝐼𝐶𝑄 = 𝛽𝐼𝐵 = 260 × 15.4583 μA ≈ 4.0192 mA
and, 𝑉𝐶𝐸 = 12 V − (4.0192 mA) × (2 kΩ + 1 kΩ) ≈ −0.057 V [Saturated]
Operating point for 𝑹𝑩 = 𝟏𝟖𝟎 𝐤𝛀:
𝑉𝐶𝐶 − 𝑉𝐵𝐸 12 V − 0.7 V
𝐼𝐵𝑄 = = ≈ 40.2135 μA
𝑅𝐵 + (𝛽 + 1)𝑅𝐸 180 kΩ + (100 + 1) 1kΩ
∴ 𝐼𝐶𝑄 = 𝛽𝐼𝐵 = 100 × 40.2135 μA ≈ 4.0214 mA
𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 (𝑅𝐶 + 𝑅𝐸 ) = 12 𝑉 − (4.0214 mA) × (2 kΩ + 1 kΩ) ≈ −0.064 V [Saturated]
Operating point for 𝑹𝑪 = 𝟔. 𝟐 𝐤𝛀:
12 V − 0.7 V VCC = 12 V
𝐼𝐵𝑄 = ≈ 19.7898 μA
470 kΩ + (100 + 1) 1kΩ
RB RC 2 k
∴ 𝐼𝐶𝑄 = 𝛽𝐼𝐵 = 100 × 19.7898 μA ≈ 1.979 mA 470 k IC
IB
𝑉𝐶𝐸 = 12 V − (1.979 mA) × (6.2 kΩ + 1 kΩ) 𝛽 = 100
𝑜𝑟, 𝑉𝐶𝐸 ≈ −2.2488 V − 0.27 V [Saturated] IE

Operating point for 𝑹𝑬 = 𝟎: RE 1 k

𝑉𝐶𝐶 − 𝑉𝐵𝐸 12 V − 0.7 V
𝐼𝐵𝑄 = =
𝑅𝐵 + + 1)𝑅𝐸 470 kΩ + (100 + 1) × 0
(𝛽 Fig.5-22: Emitter bias for Example 5-7
≈ 24.0426 μA
∴ 𝐼𝐶𝑄 = 𝛽𝐼𝐵 = 100 × 24.0426 μA ≈ 2.4043 mA
𝑉𝐶𝐸𝑄 = 𝑉𝐶𝐶 − 𝐼𝐶 (𝑅𝐶 + 𝑅𝐸 ) = 12 𝑉 − (2.4043 mA) × (2 kΩ + 0 ) ≈ 7.19 V 4.79 V
Operating point for 𝑹𝑬 = 𝟓𝟎𝟎 𝐤𝛀:
𝑉𝐶𝐶 − 𝑉𝐵𝐸 12 V − 0.7 V
𝐼𝐵𝑄 = = ≈ 0.2217 μA
𝑅𝐵 + (𝛽 + 1)𝑅𝐸 470 kΩ + (100 + 1) 500 kΩ
∴ 𝐼𝐶𝑄 = 𝛽𝐼𝐵 = 100 × 0.2217 μA ≈ 0.0222 mA
𝑉𝐶𝐸𝑄 = 𝑉𝐶𝐶 − 𝐼𝐶 (𝑅𝐶 + 𝑅𝐸 ) = 12 𝑉 − (0.0222 mA) × (2 kΩ + 500 kΩ) ≈ 11.93 V
Comments: Although, from Equ.(5-26) it is apparent that the higher values of 𝑅𝐸 will saturate the
transistor. But from this example, we find that higher values of 𝑅𝐸 tend to shift the transistor to
cutoff, as the base current is reduced drastically!!

5.7.5 Calculation of Stability Factors of Emitter Bias Circuit

From the B-E circuit of Fig.5-20(b), we have found that,
𝑉𝐶𝐶 − 𝐼𝐵 𝑅𝐵 − 𝑉𝐵𝐸 − 𝐼𝐸 𝑅𝐸 = 0
𝑜𝑟, 𝑉𝐶𝐶 − 𝐼𝐵 𝑅𝐵 − 𝑉𝐵𝐸 − 𝐼𝐵 𝑅𝐸 − 𝐼𝐶 𝑅𝐸 = 0 [∵ 𝐼𝐸 = 𝐼𝐶 + 𝐼𝐵 ]
Chapter 5: BJT Biasing Circuits 22

𝑜𝑟, 𝐼𝐵 (𝑅𝐵 + 𝑅𝐸 ) = 𝑉𝐶𝐶 − 𝑉𝐵𝐸 − 𝐼𝐶 𝑅𝐸

𝑉𝐶𝐶 − 𝑉𝐵𝐸 − 𝐼𝐶 𝑅𝐸
∴ 𝐼𝐵 = (5-32)
𝑅𝐵 + 𝑅𝐸
From the B-C circuit we have also found, 𝐼𝐶 = 𝛽𝐼𝐵 + (𝛽 + 1)𝐼𝐶𝐵𝑂 (5-33)
Putting the value of 𝐼𝐵 from Equ.(5-32) into Equ.(5-33) we get,
𝛽(𝑉𝐶𝐶 − 𝑉𝐵𝐸 − 𝐼𝐶 𝑅𝐸 )
𝐼𝐶 = + (𝛽 + 1)𝐼𝐶𝐵𝑂
𝑅𝐵 + 𝑅𝐸
𝑜𝑟, 𝐼𝐶 (𝑅𝐵 + 𝑅𝐸 ) = 𝛽(𝑉𝐶𝐶 − 𝑉𝐵𝐸 − 𝐼𝐶 𝑅𝐸 ) + (𝑅𝐵 + 𝑅𝐸 )(𝛽 + 1)𝐼𝐶𝐵𝑂
𝑜𝑟, 𝐼𝐶 (𝑅𝐵 + 𝑅𝐸 + 𝛽𝑅𝐸 ) = 𝛽(𝑉𝐶𝐶 − 𝑉𝐵𝐸 ) + (𝑅𝐵 + 𝑅𝐸 )(𝛽 + 1)𝐼𝐶𝐵𝑂
𝛽(𝑉𝐶𝐶 − 𝑉𝐵𝐸 ) + (𝑅𝐵 + 𝑅𝐸 )(𝛽 + 1)𝐼𝐶𝐵𝑂
∴ 𝐼𝐶 = (5-34)
𝑅𝐵 + (𝛽 + 1)𝑅𝐸
Differentiating Equ.(5-34) with respect to 𝐼𝐶𝐵𝑂 for constant 𝑉𝐵𝐸 and 𝛽, we can determine the
stability factor 𝑆(𝐼𝐶𝐵𝑂 ) as,
δ𝐼𝐶 δ 𝛽(𝑉𝐶𝐶 − 𝑉𝐵𝐸 ) + (𝑅𝐵 + 𝑅𝐸 )(𝛽 + 1)𝐼𝐶𝐵𝑂
𝑆(𝐼𝐶𝐵𝑂 ) = | = [ ]
δ𝐼𝐶𝐵𝑂 𝑉 ,𝛽 δ𝐼𝐶𝐵𝑂 𝑅𝐵 + (𝛽 + 1)𝑅𝐸
𝐵𝐸

δ 𝛽(𝑉𝐶𝐶 − 𝑉𝐵𝐸 ) δ (𝑅𝐵 + 𝑅𝐸 )(𝛽 + 1)𝐼𝐶𝐵𝑂

𝑜𝑟, 𝑆(𝐼𝐶𝐵𝑂 ) = [ ]+ [ ]
δ𝐼𝐶𝐵𝑂 𝑅𝐵 + (𝛽 + 1)𝑅𝐸 δ𝐼𝐶𝐵𝑂 𝑅𝐵 + (𝛽 + 1)𝑅𝐸
(𝑅𝐵 + 𝑅𝐸 )(𝛽 + 1) (𝑅𝐵 + 𝑅𝐸 )(𝛽 + 1)
𝑜𝑟, 𝑆(𝐼𝐶𝐵𝑂 ) = 0 + =
𝑅𝐵 + (𝛽 + 1)𝑅𝐸 𝑅𝐵 + (𝛽 + 1)𝑅𝐸
(𝑅𝐵 + 𝑅𝐸 )(𝛽 + 1)
∴ 𝑆(𝐼𝐶𝐵𝑂 ) = (5-35)
𝑅𝐵 + (𝛽 + 1)𝑅𝐸
Now, differentiating Equ.(5-34) with respect to 𝑉𝐵𝐸 for constant 𝐼𝐶𝐵𝑂 and 𝛽 we get,
δ𝐼𝐶 δ 𝛽(𝑉𝐶𝐶 − 𝑉𝐵𝐸 ) + (𝑅𝐵 + 𝑅𝐸 )(𝛽 + 1)𝐼𝐶𝐵𝑂
𝑆(𝑉𝐵𝐸 ) = | = [ ]
δ𝑉𝐵𝐸 𝐼 δ𝑉𝐵𝐸 𝑅𝐵 + (𝛽 + 1)𝑅𝐸
𝐶𝐵𝑂 ,𝛽

δ 𝛽(𝑉𝐶𝐶 − 𝑉𝐵𝐸 ) δ (𝑅𝐵 + 𝑅𝐸 )(𝛽 + 1)𝐼𝐶𝐵𝑂

𝑜𝑟, 𝑆(𝑉𝐵𝐸 ) = [ ]+ [ ]
δ𝑉𝐵𝐸 𝑅𝐵 + (𝛽 + 1)𝑅𝐸 δ𝑉𝐵𝐸 𝑅𝐵 + (𝛽 + 1)𝑅𝐸
δ 𝛽𝑉𝐶𝐶 δ 𝛽𝑉𝐵𝐸
𝑜𝑟, 𝑆(𝑉𝐵𝐸 ) = [ ]− [ ]+0
δ𝑉𝐵𝐸 𝑅𝐵 + (𝛽 + 1)𝑅𝐸 δ𝑉𝐵𝐸 𝑅𝐵 + (𝛽 + 1)𝑅𝐸
δ 𝛽𝑉𝐵𝐸
𝑜𝑟, 𝑆(𝑉𝐵𝐸 ) = 0 − [ ]
δ𝑉𝐵𝐸 𝑅𝐵 + (𝛽 + 1)𝑅𝐸
𝛽
𝑜𝑟, 𝑆(𝑉𝐵𝐸 ) = −
𝑅𝐵 + (𝛽 + 1)𝑅𝐸
𝛽
∴ 𝑆(𝑉𝐵𝐸 ) = − (5-36)
𝑅𝐵 + (𝛽 + 1)𝑅𝐸
Chapter 5: BJT Biasing Circuits 23

Again, differentiating the same equation with respect to 𝛽 for constant 𝐼𝐶𝐵𝑂 and 𝑉𝐵𝐸 ,
δ𝐼𝐶 δ 𝛽(𝑉𝐶𝐶 − 𝑉𝐵𝐸 ) + (𝑅𝐵 + 𝑅𝐸 )(𝛽 + 1)𝐼𝐶𝐵𝑂
𝑆(𝛽) = | = [ ]
δ𝛽 𝐼 δ𝛽 𝑅𝐵 + (𝛽 + 1)𝑅𝐸
𝐶𝐵𝑂 ,𝑉𝐵𝐸

δ 𝛽(𝑉𝐶𝐶 − 𝑉𝐵𝐸 ) δ (𝑅𝐵 + 𝑅𝐸 )(𝛽 + 1)𝐼𝐶𝐵𝑂

𝑜𝑟, 𝑆(𝛽) = [ ]+ [ ]
δ𝛽 𝑅𝐵 + (𝛽 + 1)𝑅𝐸 δ𝛽 𝑅𝐵 + (𝛽 + 1)𝑅𝐸
Since, the differentiating terms have variables in numerator and denominator, we have to use 𝑢/𝑣
method. Let, [𝛽(𝑉𝐶𝐶 − 𝑉𝐵𝐸 )]/[𝑅𝐵 + (𝛽 + 1)𝑅𝐸 ] = 𝑓1 , and [(𝑅𝐵 + 𝑅𝐸 )(𝛽 + 1)𝐼𝐶𝐵𝑂 ]/[𝑅𝐵 +
(𝛽 + 1)𝑅𝐸 ] = 𝑓1 .
δ δ
∴ 𝑆(𝛽) = 𝑓1 + 𝑓
δ𝛽 δ𝛽 2
Now, let 𝑢 = 𝛽(𝑉𝐶𝐶 − 𝑉𝐵𝐸 ) and 𝑣 = 𝑅𝐵 + 𝑅𝐸 + 𝛽𝑅𝐸
∴ 𝛿𝑢/𝛿𝛽 = (𝑉𝐶𝐶 − 𝑉𝐵𝐸 ) and 𝛿𝑣/𝛿𝛽 = 𝑅𝐸
𝛿𝑢 𝛿𝑣
δ 𝑣 ( ) − 𝑢 ( ) (𝑅 + 𝑅 + 𝛽𝑅 )(𝑉 − 𝑉 ) − 𝛽(𝑉 − 𝑉 )𝑅
∴ 𝑓1 =
𝛿𝛽 𝛿𝛽
=
𝐵 𝐸 𝐸 𝐶𝐶 𝐵𝐸 𝐶𝐶 𝐵𝐸 𝐸
δ𝛽 𝑣2 [𝑅𝐵 + (𝛽 + 1)𝑅𝐸 ]2
δ (𝑅𝐵 + 𝑅𝐸 )(𝑉𝐶𝐶 − 𝑉𝐵𝐸 ) + 𝛽𝑅𝐸 (𝑉𝐶𝐶 − 𝑉𝐵𝐸 ) − 𝛽(𝑉𝐶𝐶 − 𝑉𝐵𝐸 )𝑅𝐸
∴ 𝑓1 =
δ𝛽 [𝑅𝐵 + (𝛽 + 1)𝑅𝐸 ]2
δ (𝑅𝐵 + 𝑅𝐸 )(𝑉𝐶𝐶 − 𝑉𝐵𝐸 ) (𝑅𝐵 + 𝑅𝐸 )𝑉𝐶𝐶
∴ 𝑓1 = 2
≈
δ𝛽 [𝑅𝐵 + (𝛽 + 1)𝑅𝐸 ] [𝑅𝐵 + (𝛽 + 1)𝑅𝐸 ]2
Again, let 𝑢 = (𝑅𝐵 + 𝑅𝐸 )(𝛽 + 1)𝐼𝐶𝐵𝑂 and 𝑣 = 𝑅𝐵 + (𝛽 + 1)𝑅𝐸
∴ ∴ 𝛿𝑢/𝛿𝛽 = (𝑅𝐵 + 𝑅𝐸 )𝐼𝐶𝐵𝑂 and 𝛿𝑣/𝛿𝛽 = 𝑅𝐸
𝛿𝑢 𝛿𝑣
𝑣 (𝛿𝛽) − 𝑢 (𝛿𝛽) [𝑅 + (𝛽 + 1)𝑅 ](𝑅 + 𝑅 )𝐼
∴ δ 𝐵 𝐸 𝐵 𝐸 𝐶𝐵𝑂 − (𝑅𝐵 + 𝑅𝐸 )(𝛽 + 1)𝐼𝐶𝐵𝑂 𝑅𝐸
𝑓2 = 2
=
δ𝛽 𝑣 [𝑅𝐵 + (𝛽 + 1)𝑅𝐸 ]2
δ 𝑅𝐵 (𝑅𝐵 + 𝑅𝐸 )𝐼𝐶𝐵𝑂 + (𝛽 + 1)𝑅𝐸 (𝑅𝐵 + 𝑅𝐸 )𝐼𝐶𝐵𝑂 − (𝑅𝐵 + 𝑅𝐸 )(𝛽 + 1)𝐼𝐶𝐵𝑂 𝑅𝐸
∴, ∴ 𝑓2 =
δ𝛽 [𝑅𝐵 + (𝛽 + 1)𝑅𝐸 ]2
δ 𝑅𝐵 (𝑅𝐵 + 𝑅𝐸 )𝐼𝐶𝐵𝑂
𝑜𝑟, ∴ 𝑓2 =
δ𝛽 [𝑅𝐵 + (𝛽 + 1)𝑅𝐸 ]2
δ δ (𝑅𝐵 + 𝑅𝐸 )(𝑉𝐶𝐶 − 𝑉𝐵𝐸 ) 𝑅𝐵 (𝑅𝐵 + 𝑅𝐸 )𝐼𝐶𝐵𝑂
∴ 𝑆(𝛽) = 𝑓 + 𝑓 = +
δ𝛽 1 δ𝛽 2 [𝑅𝐵 + (𝛽 + 1)𝑅𝐸 ]2 [𝑅𝐵 + (𝛽 + 1)𝑅𝐸 ]2
(𝑅𝐵 + 𝑅𝐸 )(𝑉𝐶𝐶 − 𝑉𝐵𝐸 ) + 𝑅𝐵 (𝑅𝐵 + 𝑅𝐸 )𝐼𝐶𝐵𝑂
𝑜𝑟, 𝑆(𝛽) =
[𝑅𝐵 + (𝛽 + 1)𝑅𝐸 ]2
(𝑅𝐵 + 𝑅𝐸 )(𝑉𝐶𝐶 − 𝑉𝐵𝐸 + 𝑅𝐵 𝐼𝐶𝐵𝑂 ) (𝑅𝐵 + 𝑅𝐸 )(𝑉𝐶𝐶 − 𝑉𝐵𝐸 )
𝑜𝑟, 𝑆(𝛽) = ≈
[𝑅𝐵 + (𝛽 + 1)𝑅𝐸 ]2 [𝑅𝐵 + (𝛽 + 1)𝑅𝐸 ]2
(𝑅𝐵 + 𝑅𝐸 )(𝑉𝐶𝐶 − 𝑉𝐵𝐸 )
∴ 𝑆(𝛽) = (5-37)
[𝑅𝐵 + (𝛽 + 1)𝑅𝐸 ]2
Chapter 5: BJT Biasing Circuits 24

If we compare the three stability factors of this circuit with those of base bias circuit, we find that
the stability factors for this circuit have been reduced by a term (𝛽 + 1)𝑅𝐸 . This is due to the
feedback of the emitter resistor to the input circuit.

Example 5-8
Fig.5-23(a) shows a fixed bias circuit with emitter resistor. The circuit has been designed to set the
operating point at the middle of load line considering a typical 𝛽 value of 145. Calculate the load
line and operating point of this circuit. If the transistor has 𝛽𝑚𝑖𝑛 = 40 and 𝛽𝑚𝑎𝑥 = 250, calculate
the lowest and the highest operating point. Compare the results with the results of Fig.5-19.

IC (mA)
4
VCC = 12 V Q-point: max = 250

RC 1.5 k 3 IBQ = 11.57 A

RB
600 k  Design Q-point:  = 145
IC
IB 2
IBQ = 13.8 A
𝛽 = 145
IE 1
Q-point: min = 40
IBQ = 17.08A
RE 1.5 k
 0
0 2 4 6 8 10 12 VCE (V)
(a) (b)
Fig.5-23: Circuit diagram and graph for Example 4.8

Solution:
𝑉𝐶𝐶 − 𝑉𝐵𝐸 12 V − 0.7 V
Using Equ.(5-23), 𝐼𝐵𝑄 = = = 13.8 μA
𝑅𝐵 + (𝛽 + 1)𝑅𝐸 600 kΩ + (145 + 1)1.5 kΩ
Using Equ.(5-24), ∴ 𝐼𝐶𝑄 = 𝐼𝐵𝑄 𝛽 = (13.8 μA) × 145 = 2 mA
Using Equ.(5-26), 𝑉𝐶𝐸𝑄 = 𝑉𝐶𝐶 − 𝐼𝐶𝑄 (𝑅𝐶 + 𝑅𝐸 ) = 12 V − (2 mA)(1.5 kΩ + 1.5 kΩ) = 6 V
For 𝜷𝒎𝒊𝒏 = 𝟒𝟎:
Using the same equations,
𝑉𝐶𝐶 − 𝑉𝐵𝐸 12 V − 0.7 V
𝐼𝐵𝑄 = = = 17.082 μA
𝑅𝐵 + (𝛽 + 1)𝑅𝐸 600 kΩ + (40 + 1)1.5 kΩ
𝐼𝐶𝑄 = (17.082 μA)40 = 0.683 mA
𝑉𝐶𝐸𝑄 = 12 𝑉 − (0.683 mA)(1.5 kΩ + 1.5 kΩ) ≈ 9.95 V
For 𝜷𝒎𝒂𝒙 = 𝟐𝟓𝟎:
𝑉𝐶𝐶 − 𝑉𝐵𝐸 12 V − 0.7 V
𝐼𝐵𝑄 = = = 11.572 μA
𝑅𝐵 + (𝛽 + 1)𝑅𝐸 600 kΩ + (250 + 1)1.5 kΩ
𝐼𝐶𝑄 = (11.572 μA)250 = 2.89 mA
𝑉𝐶𝐸𝑄 = 12 𝑉 − (2.893 mA)(1.5 kΩ + 1.5 kΩ) ≈ 3.32 V
Chapter 5: BJT Biasing Circuits 25

The load line will start from 12 V on 𝑥-axis and ends to 12 V /(1.5 kΩ + 1.5 kΩ) = 4 mA on 𝑦-axis.
The load line and the operating points are shown in Fig.5-23(b).
The values of operating points of the circuits of Fig.5-19(a) and 5.23(a) for different values of 𝛽 are
given in Table 5.3.
Table 5.3. Variation of operating points due to variation in 𝛽
Without RE With RE
𝛽
𝐼𝐶𝑄 𝑉𝐶𝐸𝑄 𝐼𝐶𝑄 𝑉𝐶𝐸𝑄
40 0.551 10.35 0.683 9.95
145 1.998 6.00 2.000 6.00
250 3.445 1.67 2.893 3.32
Comments: From the table 5.3 we see that, the change in operating point is less in the emitter bias
circuit compared to that of fixed bias. In this circuit, base current decrease with the increase in 𝛽.
Explanation of this decrease is given in section (Stabilization mechanism). Here, only a 1.5 kΩ
resistor is used in the emitter. By using larger resistors, we could have achieved more stabilized
operating point.

5.8 Base Bias for PNP Transistor

The base bias and the emitter bias have been discussed for NPN transistors. Here, we will study the

IC IC
IB IB
VCE RC 2 k VCE RC 2 k

23 k RB VBE VCC = 137k RB VBE VCC =

VBB = IE 18 V VBB = IE 18 V
3V 18 V

(a) (b)
VBB = -18 V VCC = -18 V VCC = -18 V VEE = +18 V

IE
RC 2 k RC 2 k VBE
173 k RB 173 k RB IB
IC IC VCE
IB IB
VCE VCE IC
VBE VBE 173 k RB
RC 2 k
IE IE
(c) (d) (e)
Fig.5-24: Base bias for PNP transistor, (a) Biasing using 3 V and 18 V sources, (b) Biasing
using two18 V sources, (c)-(e) Alternate representations of Fig.(b)
Chapter 5: BJT Biasing Circuits 26

same bias circuits for PNP transistors. In Chapter 4, we have already known how to bias a PNP
transistor. Let us start from that circuit. It is redrawn in Fig.5-24(a). Now applying the same concept
as NPN transistor, we can use resistors to control the currents [Fig.5-24(b)]. Using suitable values of
𝑅𝐵 exactly same amount of voltage can be applied to both in base and collector [Fig.5-24(c)]. Now
connecting the same potential terminals we get the circuit of Fig.5-24(d). It can also be represented
as in Fig.5-24(e). This is the base bias circuit for PNP transistor.
Here also we can use an emitter resistor to stabilize the Q-point as in Fig.5-25. This circuit is the
base bias with emitter feedback resistor (or emitter bias) for PNP transistor.
All the equations, derived so far for base bias and emitter bias using the NPN transistors are also
applicable for the biasing circuits of PNP transistor.
VCC = -18 V VEE = +18 V VCC = -12 V VEE = +12 V

IE RE RC IE RE
IC RC RB IC
RB 1.5 k 1.5 k
VBE 600 k VBE
IB IB IB
IB
VCE VCE 𝛽=145 𝛽=145
VBE VBE RB RC
RB IC IC
RC RE 600 k 1.5 k
IE RE IE
1.5 k

(a) (b) (a) (b)

Fig.5-25: Emitter feedback bias for PNP Fig.5-26: Emitter feedback bias for PNP
transistor, (a) For negative voltage system, transistor, (a) For negative voltage system,
and (b) Positive voltage system and (b) Positive voltage system

Example 5-9
Calculate the values of 𝐼𝐵𝑄 , 𝐼𝐶𝑄 , and 𝑉𝐶𝐸𝑄 for the emitter bias circuits of PNP transistor given in
Fig.5-26.

Solution:
Negative voltage system [Fig.5-26(a)]:
𝑉𝐶𝐶 − 𝑉𝐵𝐸 −12 V + 0.7 V
Using Equ.(5-23), 𝐼𝐵𝑄 = = = −13.8 μA
𝑅𝐵 + (𝛽 + 1)𝑅𝐸 600 kΩ + (145 + 1)1.5 kΩ
Using Equ.(5-24), 𝐼𝐶𝑄 = 𝐼𝐵𝑄 𝛽 = (−13.8 μA) × 145 = −2 mA
Using Equ.(5-26), 𝑉𝐶𝐸𝑄 = 𝑉𝐶𝐶 − 𝐼𝐶𝑄 (𝑅𝐶 + 𝑅𝐸 ) = −12 V − (−2 mA)(1.5 kΩ + 1.5 kΩ)
= −6 V

Positive voltage system [Fig.5-26(b)]: Using the same equations,

𝑉𝐶𝐶 − 𝑉𝐵𝐸 12 V − 0.7 V
𝐼𝐵𝑄 = = = 13.8 μA
𝑅𝐵 + (𝛽 + 1)𝑅𝐸 600 kΩ + (145 + 1)1.5 kΩ
𝐼𝐶𝑄 = 𝐼𝐵𝑄 𝛽 = (13.8 μA) × 145 = 2 mA
Chapter 5: BJT Biasing Circuits 27

𝑉𝐶𝐸𝑄 = 𝑉𝐶𝐶 − 𝐼𝐶𝑄 (𝑅𝐶 + 𝑅𝐸 ) = 12 V − (2 mA)(1.5 kΩ + 1.5 kΩ) = 6 V

Comments: In both the circuits, the direction of currents and the polarities of voltages are similar.
But due to the negative voltage of the first circuit, the currents have been negative.

5.9 Collector-to-Base Bias

The collector-to-base bias circuit is shown in Fig.5-27(a). In this circuit, collector voltage is used to
bias the B-E junction, that’s why it is called collector-to-base bias. Like the emitter resistor, here,
the collector resistor provides feedback for bias stabilization. For this reason, this biasing circuit is
also called base bias with collector feedback or simply collector feedback bias. The stabilization
mechanism is same as described for emitter feedback bias circuit. If collector current (𝐼𝐶 ) increases
due to increase in temperature, collector voltage (𝑉𝐶 ) decreases. This decrease in collector voltage
reduces the level of base current. In the same process, if (𝐼𝐶 ) decreases due to decrease in
temperature, collector voltage increases which increases the base current. In this way, this biasing
circuit provides better stabilized operating point.
In the emitter feedback bias, we can increase the stability by increasing the value of 𝑅𝐸 . In that
case, the voltage drop across 𝑅𝐸 will also increase and hence, the voltage drop across 𝑅𝐶 will
decrease (for a fixed supply voltage). So for a fixed value of 𝐼𝐶 , the value of 𝑅𝐶 will be low. But the
voltage gain of an amplifier depends on the value of 𝑅𝐶 . Therefore, the increased stability reduces
the value of 𝑅𝐶 and hence, the value of voltage gain. On the other hand, in collector feedback bias
circuit, to get better stabilization, we have to increase the value of 𝑅𝐶 . This increased value of 𝑅𝐶
will also increase the voltage gain of the amplifier circuit, which is the main advantage of this bias
circuit.
VCC VCC VCC

RC RC IC + IB IC + IB RC
KVL
KVL
IB IB IB I
IC IC C
RB RB RB
VCE VCE VCE
IB
VBE VBE VBE
IE IE IE
(a) (b) (c)

Fig.5-27: Circuit diagram of collector-to-base bias, (a) Biasing circuit,

(b) KVL applied to input circuit, and (c) KVL applied to output circuit.

5.9.1 Calculation of Operating Point

Applying KVL in the forward biased B-E circuit as shown in Fig.5-27(b), we get,
𝑉𝐶𝐶 − (𝐼𝐶 + 𝐼𝐵 )𝑅𝐶 − 𝐼𝐵 𝑅𝐵 − 𝑉𝐵𝐸 = 0 (5-38)
𝑜𝑟, 𝑉𝐶𝐶 − (𝛽𝐼𝐵 + 𝐼𝐵 )𝑅𝐶 − 𝐼𝐵 𝑅𝐵 − 𝑉𝐵𝐸 = 0 [∵ 𝐼𝐶 = 𝛽𝐼𝐵 ]
Chapter 5: BJT Biasing Circuits 28

𝑜𝑟, 𝐼𝐵 [𝑅𝐵 + (𝛽 + 1)𝑅𝐶 ] = 𝑉𝐶𝐶 − 𝑉𝐵𝐸

𝑉𝐶𝐶 − 𝑉𝐵𝐸
∴ 𝐼𝐵 = (5-39)
𝑅𝐵 + (𝛽 + 1)𝑅𝐶
Another equation for the base current can be found by applying KVL in the loop- emitter-to-
collector, collector-to base through 𝑅𝐵 and then base-to-emitter as,
𝑉𝐶𝐸 − 𝐼𝐵 𝑅𝐵 − 𝑉𝐵𝐸 = 0
𝑜𝑟, 𝐼𝐵 𝑅𝐵 = 𝑉𝐶𝐸 − 𝑉𝐵𝐸
𝑉𝐶𝐸 − 𝑉𝐵𝐸
∴ 𝐼𝐵 = (5-40)
𝑅𝐵
Once, 𝐼𝐵 is found, the collector current can be calculated as,
𝐼𝐶 = 𝛽𝐼𝐵 + 𝐼𝐶𝐸𝑂 ≈ 𝛽𝐼𝐵 (5-41)
We can also calculate 𝐼𝐶 , without calculating 𝐼𝐵 from Equ.(5-38),
𝑉𝐶𝐶 − (𝐼𝐶 + 𝐼𝐵 )𝑅𝐶 − 𝐼𝐵 𝑅𝐵 − 𝑉𝐵𝐸 = 0 (5-42)
𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 − 𝐼𝐵 𝑅𝐵 − 𝑉𝐵𝐸 = 0 [∵ 𝐼𝐶 + 𝐼𝐵 ≈ 𝐼𝐶 ]
𝐼𝐶 𝐼𝐶
𝑜𝑟, 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 − 𝑅𝐵 − 𝑉𝐵𝐸 = 0 [∵ 𝐼𝐵 = ]
𝛽 𝛽
𝑅𝐵
𝑜𝑟, ( + 𝑅𝐶 ) 𝐼𝐶 = 𝑉𝐶𝐶 − 𝑉𝐵𝐸
𝛽
𝑉𝐶𝐶 − 𝑉𝐵𝐸
∴ 𝐼𝐶 = (5-43)
𝑅𝐵 /𝛽 + 𝑅𝐶
Now, applying KVL, in the reverse biased C-E junction we get [shown in Fig.5-27(c)],
𝑉𝐶𝐶 − (𝐼𝐶 + 𝐼𝐵 )𝑅𝐶 − 𝑉𝐶𝐸 = 0
∴ 𝑉𝐶𝐸 = 𝑉𝐶𝐶 − (𝐼𝐶 + 𝐼𝐵 )𝑅𝐶 (5-44)
Using equations (5-39), (5-41) and (5-44), the operating point of the circuit can easily be calculated.

Example 5-10
Calculate the operating point of the circuit of Fig.5-28. Assume 𝛽 = 100. Verify the collector
current using Equ.(5-37)
Solution:
VCC = 6 V
Using Equ.(5-39), the value of base current is,
6 V − 0.7 V
𝐼𝐵 = = 5.92 μA 5k RC
390 kΩ + (100 + 1) (5 kΩ)
Using Equ.(5-41), the value of collector current is,
390 k RB
𝐼𝐶 = 𝛽𝐼𝐵 = 100 × 5.92 μA = 0.592 mA [Ans. ]
 =100

Fig.5-28: Circuit for Example 5-10

Chapter 5: BJT Biasing Circuits 29

Using Equ.(5-44), the value of collector-emitter voltage is,

𝑉𝐶𝐸 = 6 V − (0.592 mA + 0.00592)(5 kΩ) ≈ 3V [Ans. ]
Let us check 𝐼𝐶 using Equ.(5-43),
𝑉𝐶𝐶 − 𝑉𝐵𝐸 6 𝑉 − 0.7 𝑉
𝐼𝐶 = =
𝑅𝐵 /𝛽 + 𝑅𝐶 (390 kΩ)/100 + 5 kΩ
𝑜𝑟, 𝐼𝐶 ≈ 0.596 mA [almost equal to actual value]
Comments: Operating point calculation method of this circuit is similar to that of emitter feedback
biasing circuit. Here 𝑅𝐶 is used instead of 𝑅𝐸 .

5.9.2 Determination of Load Line of Collector-to-Base Bias Circuit

The load line for collector-to-base bias circuit can be determined using Equ.(5-38).
𝑉𝐶𝐸 = 𝑉𝐶𝐶 − (𝐼𝐶 + 𝐼𝐵 )𝑅𝐶 ≈ 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 (5-45)
When 𝐼𝐶 = 0, 𝑉𝐶𝐸 = 𝑉𝐶𝐶 and when 𝑉𝐶𝐸 = 0, 𝐼𝐶 = 𝑉𝐶𝐶 /𝑅𝐶 . These points are exactly same as fixed
bias circuit. Putting these points on an 𝐼𝐶 vs. 𝑉𝐶𝐸 coordinate system, we can easily draw the load
line.
5.9.3 Saturation of Transistor in Collector-to-Base Bias Circuit
As discussed for previous biasing circuits, use of inaccurate component values may also saturate
transistors in collector-to-bias circuit. Here, the transistors can be saturated for very large value of
𝛽 and 𝑅𝐶 , and very small value of 𝑅𝐵 . The effects are same as the emitter bias circuit. The proof of
these saturations are left for the students in Exercise no. 5.. The value of collector current that will
saturate the transistor of collector-to-base bias will be approximately,
𝑉𝐶𝐶
𝐼𝐶(𝑠𝑎𝑡) ≈ (5-46)
𝑅𝐶
5.9.4 Calculation of Stability Factor
From the forward biased B-E circuit, we have already found Equ.(5-38) which is,
𝑉𝐶𝐶 − (𝐼𝐶 + 𝐼𝐵 )𝑅𝐶 − 𝐼𝐵 𝑅𝐵 − 𝑉𝐵𝐸 = 0 (5-47)
𝑜𝑟, 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 − 𝐼𝐵 𝑅𝐶 − 𝐼𝐵 𝑅𝐵 − 𝑉𝐵𝐸 = 0
𝑜𝑟, 𝐼𝐵 (𝑅𝐵 + 𝑅𝐶 ) = 𝑉𝐶𝐶 − 𝑉𝐵𝐸 − 𝐼𝐶 𝑅𝐶 = 0
𝑉𝐶𝐶 − 𝑉𝐵𝐸 − 𝐼𝐶 𝑅𝐶
∴ 𝐼𝐵 = (5-48)
𝑅𝐵 + 𝑅𝐶
The collector current is, 𝐼𝐶 = 𝛽𝐼𝐵 + (𝛽 + 1)𝐼𝐶𝐵𝑂 (5-49)
Putting the value of 𝐼𝐵 from Equ. (5-48) into Equ. (5-49),
𝛽(𝑉𝐶𝐶 − 𝑉𝐵𝐸 − 𝐼𝐶 𝑅𝐶 )
𝐼𝐶 = + (𝛽 + 1)𝐼𝐶𝐵𝑂
𝑅𝐵 + 𝑅𝐶
After solving the above equation for 𝐼𝐶 , we find,
Chapter 5: BJT Biasing Circuits 30

𝛽(𝑉𝐶𝐶 − 𝑉𝐵𝐸 ) + (𝑅𝐵 + 𝑅𝐶 )(𝛽 + 1)𝐼𝐶𝐵𝑂

𝐼𝐶 = (5-50)
𝑅𝐵 + (𝛽 + 1)𝑅𝐶
Comparing Equ.(5-50) with Equ.(5-34), we find that the only difference is 𝑅𝐶 in place of 𝑅𝐸 . So
differentiating Equ.(5-50), we will get exactly the same results, but, 𝑅𝐶 in place of 𝑅𝐸 . Therefore,
the stability factors for this biasing circuit will be,
(𝑅𝐵 + 𝑅𝐶 )(𝛽 + 1)
𝑆(𝐼𝐶𝐵𝑂 ) = (5-51)
𝑅𝐵 + (𝛽 + 1)𝑅𝐶
𝛽
𝑆(𝑉𝐵𝐸 ) = − (5-52)
𝑅𝐵 + (𝛽 + 1)𝑅𝐶
(𝑅𝐵 + 𝑅𝐶 )(𝑉𝐶𝐶 − 𝑉𝐵𝐸 )
and, 𝑆(𝛽) = (5-53)
[𝑅𝐵 + (𝛽 + 1)𝑅𝐶 ]2

Example 5-11
If the value of 𝛽 of the transistor of Fig.5-28 increases from 100 to 150, calculate the change in
collector current using normal procedure and using Equ.(5-53).

Solution:
Normal procedure:
Using Equ.(4.39), the value of base current is,
6 V − 0.7 V
𝐼𝐵 = = 4.629 μA
390 kΩ + (150 + 1) (5 kΩ)
Using Equ.(5-41), the value of collector current for 𝛽 = 150 will be,
𝐼𝐶(𝛽=150) = 𝛽𝐼𝐵 = 150 × 4.629 μA = 0.694 mA [Ans. ]
The value of collector current (𝐼𝐶 ) for 𝛽 = 100 is calculate in Example 5-10 and found 𝐼𝐶 =
0.592 mA.
Using these values, the change in collector current is,
Δ𝐼𝐶 = 𝐼𝐶(𝛽=150) − 𝐼𝐶(𝛽=100) = 0.694 mA − 0.592 mA = 0.102 mA [Ans. ]
Using Equ.(5-53):
Here, change in current gain is, 𝛿(𝛽) = 150 − 100 = 50
As Equ.(5-53) is applicable for a very small change in 𝛽, we have to use it in some small steps.
Staring from 𝛽 = 100, Equ.(5-53) is solved for every 5 increase in 𝛽. Their average value is
determined. The data are shown in the following Table.
 100 105 110 115 120 125 130 135 140 145 150 Average
S(𝛽)(A) 2.61 2.47 2.34 2.22 2.11 2.01 1.92 1.83 1.75 1.67 1.6 2.048
Thus, 2.048 is the average value of the stability factor 𝑆(𝛽). According to the definition of 𝑆(𝛽),
𝛿𝐼𝐶
𝑆(𝛽) = = 2.048 μA
𝛿(𝛽)
Chapter 5: BJT Biasing Circuits 31

∴ 𝛿𝐼𝐶 = 𝑆(𝛽) × 𝛿 (𝛽) = 50 × (2.048 μA) = 0.102 mA [Ans. ]

Comment: Exactly the same results are found using normal procedure and the equation of the
stability factor. As 𝑆(𝛽) has been calculated by differentiating Equ.(5-50), i.e., 𝑆(𝛽) = 𝛿𝐼𝐶 /𝛿(𝛽) it
will work properly only for very small change in 𝛽. For this reason, here we have considered
increase in 𝛽 step by step.

Example 5-12
Fig.4.28(a) shows a collector-to-base bias circuit, designed to set the operating point at the middle
of load line considering a typical 𝛽 value of 145. Calculate the load line and operating point of this
circuit. If the transistor has 𝛽𝑚𝑖𝑛 = 40 and 𝛽𝑚𝑎𝑥 = 250, calculate also the lowest and the highest
operating point. Compare the results with the results of two other biasing circuits.

IC (mA)
VCC = 12 V 4
Q-point: max = 250
RC 3
3 k Q-point:  = 145
IBQ = 9.89 A
IB 2 IBQ = 13.65 A
RB IC
390 k Q-point: min = 40
1
IB IBQ = 22.039A
IE VCE (V)
0
0 2 4 6 8 10 12
(a)
(b)
Fig.5-29: Circuit diagram and graph for Example 4.11

Solution:
Using Equ.(4.34),
𝑉𝐶𝐶 − 𝑉𝐵𝐸 12 V − 0.7 V
𝐼𝐵𝑄 = = = 13.65 μA
𝑅𝐵 + (𝛽 + 1)𝑅𝐶 390 kΩ + (145 + 1)3 kΩ
∴ 𝐼𝐶𝑄 = 𝐼𝐵𝑄 𝛽 = (13.65 μA) × 145 = 1.979 mA
Using Equ.(4.38) [neglecting 𝐼𝐵 ],
𝑉𝐶𝐸𝑄 ≈ 𝑉𝐶𝐶 − 𝐼𝐶𝑄 𝑅𝐶 = 12 V − 1.98 mA × 3 kΩ = 6.06 V
For 𝜷𝒎𝒊𝒏 = 𝟒𝟎:
𝑉𝐶𝐶 − 𝑉𝐵𝐸 12 V − 0.7 V
𝐼𝐵𝑄 = = = 22.027 μA
𝑅𝐵 + (𝛽 + 1)𝑅𝐶 600 kΩ + (40 + 1)3 kΩ
∴ 𝐼𝐶𝑄 = 𝐼𝐵𝑄 𝛽 = (22.027 μA) × 40 = 0.881 mA
𝑉𝐶𝐸𝑄 = 𝑉𝐶𝐶 − 𝐼𝐶𝑄 𝑅𝐶 = 12 V − 0.881 mA × 3 kΩ = 9.36 V
For 𝜷𝒎𝒂𝒙 = 𝟐𝟓𝟎:
𝑉𝐶𝐶 − 𝑉𝐵𝐸 12 V − 0.7 V
𝐼𝐵𝑄 = = = 9.886 μA
𝑅𝐵 + (𝛽 + 1)𝑅𝐶 600 kΩ + (250 + 1)3 kΩ
Chapter 5: BJT Biasing Circuits 32

∴ 𝐼𝐶𝑄 = 𝐼𝐵𝑄 𝛽 = ( 9.886 μA) × 250 = 2.471 mA

𝑉𝐶𝐸𝑄 = 𝑉𝐶𝐶 − 𝐼𝐶𝑄 𝑅𝐶 = 12 V − 2.47 mA × 3 kΩ = 4.59 V
The load line will start from 12 V on 𝑥-axis and ends to 12 V/3 kΩ = 4 mA on 𝑦-axis. The load line
and the operating points are shown in Fig. 4.28(b).
The values of operating points of circuits this collector-to-base bias and other two biasing circuits
for different value of 𝛽 are given in Table 4.3.
Table 4.3. Variation of operating points due to variation in 𝛽.
Without RE With RE Collector-to-Base Bias
𝛽
𝐼𝐶𝑄 (mA) 𝑉𝐶𝐸𝑄 (V) 𝐼𝐶𝑄 (mA) 𝑉𝐶𝐸𝑄 (V) 𝐼𝐶𝑄 (mA) 𝑉𝐶𝐸𝑄 (V)
40 0.551 10.35 0.683 9.95 0.881 9.36
145 1.998 6.00 2.000 6.00 1.979 6.06
250 3.445 1.67 2.893 3.32 2.471 4.59
Comments: From the table we see that, the change in operating point is less in the collector-to-
base bias circuit then other two biasing circuits. Here, only a 3 kΩ resistor is used in the collector.
By using larger value of 𝑅𝐶 , we can achieve more stabilized operating point.

VEE -VCC
IE
IC + IB RC
VBE
VCE IB
IB IC
RB
RB
IB
VCE
IB
VBE
IC + IB RC IE

(a) (b)

Fig.5-30: Collector feedback bias for PNP transistor, (a) For negative voltage
system, and (b) Positive voltage system

5.10 Collector-to-Base Bias for PNP Transistor

The collector-to-base bias circuit for a PNP transistor is shown in Fig.5-29. The circuit is exactly
same except the polarity of the biasing voltage and the directions of currents are reversed. All the
equations derived for the NPN transistor can be used to analyze the circuits for PNP transistors.
5.10.1 Variation of Stability Factors
So far, we have studied three types of biasing circuits. Three stability factors have been calculated
for all the biasing circuits. Before going to the next biasing circuit, we will study the variation of the
Chapter 5: BJT Biasing Circuits 33

stability factors. Already we know that, to stabilize the operating point, we need to keep the
stability factor as small as possible.
From the stability factors for fixed bias [Equ.(5-20), (5-21) and (5-22)], we find that they depend on
the value of 𝛽, 𝑅𝐵 and 𝑉𝐶𝐶 . 𝛽 is the current gain of the transistor. We want a larger value of 𝛽 of a
transistor. On the other hand, 𝑉𝐶𝐶 is determined by the system voltage. Again, we cannot increase
the value of 𝑅𝐵 , because an exact value of 𝑅𝐵 is necessary to set the value 𝐼𝐵𝑄 . Hence, for the fixed
bias circuit practically we have a little scope to improve the stability factors by changing the value
of 𝛽, 𝑅𝐵 and 𝑉𝐶𝐶 .
S S
S( )

S(ICBO)

S(VBE)
S(VBE)
S(ICBO) S( )

(a) RB (k) (b) RE or RC (k)

Fig.5-31: Variations of stability factors with 𝑉𝐶𝐶 = 12 V, 𝛽 = 100,

(a) Variable 𝑅𝐵 , (b) Variable 𝑅𝐸 or 𝑅𝐶

The stability factors for the emitter feedback circuit are given by Equ.(5-35), (5-36) and (5-37) and
the collector feedback circuit are given by Equ.(5-51), (5-52), and (5-53). The stability factors of
emitter feedback circuit depend on 𝛽, 𝑅𝐵 , 𝑅𝐸 and 𝑉𝐶𝐶 . But the stability factors of collector
feedback circuit depend on 𝛽, 𝑅𝐵 , 𝑅𝐶 and 𝑉𝐶𝐶 . While in the fixed bias circuit larger value of 𝑅𝐵
gives lower stability factor, in the emitter bias lower value of 𝑅𝐵 gives a better stability factor
(lower values of stability factors) except 𝑆(𝑉𝐵𝐸 ). The variation of stability factors with the variations
of 𝑅𝐵 are shown in Fig.5-31(a). On the other hand, the higher values of 𝑅𝐶 and 𝑅𝐸 improve all the
stability factors which are sown in Fig.5-31(b). Only 𝑆(𝛽) depends on the value of 𝑉𝐶𝐶 (biasing
voltage of the base circuit) and lower value gives better stability.
In summary, we can say for better stability the values of 𝑅𝐵 and biasing voltage of the base-emitter
circuit 𝑉𝐵𝐵 should be smaller and the value of 𝑅𝐸 and 𝑅𝐶 should be larger.

5.11 Voltage Divider Bias

Voltage divider biasing circuit is the best among the four biasing circuits. It provides the scope to
set any value of 𝑉𝐵𝐵 and 𝑅𝐵 . The voltage divider biasing circuit is shown in Fig.5-32(a), Here,
instead of supplying the full 𝑉𝐶𝐶 (as done in previous bias circuits), it is divided using the voltage
divider network and then supped to the base. For this reason, it is called voltage divider bias. It is
also called self bias. By changing the ratio of 𝑅1 and 𝑅2 any value of voltage can be set for the base
circuit. Similarly, by changing the values of 𝑅1 and 𝑅2 the value of 𝑅𝐵 (here it will be 𝑅Th ) can be
set to any desired value. Like the other two feedback biasing circuits, here also 𝑅𝐸 produces
Chapter 5: BJT Biasing Circuits 34

negative feedback and provide better stability of the circuit. For these reasons, we have a better
control on the stability factor of the voltage divider bias circuit.

VCC VCC VCC

R1 IC RC R1 IC RC IC RC

IB B R1 B

I2
R2 VCC R2
R2 VB RE RE
IE RE
G G

Thevenin’s Thevenin’s
Theorem Theorem
(a) (b) (c)
Fig.5-32: (a) Voltage divider bias circuit, (b) Location of Thevenin’s theorem, (c) Fig. b is redrawn.

5.11.1 Calculation of the operating point

The circuit can be analyzed both in exact method and also in approximate method. We will see the
exact analysis first.
Exact Analysis:
First, we have to determine the Thevenin’s equivalent circuit of the voltage divider portion, i.e., at
the base-emitter terminals as shown in Fig.5-32(b) and 4.32(c).

R1 R1 IC
B B IB RTh B
ETh = VR2 RTh = R1ǁ R2
R2 R2 VBE
VCC V R VCC = 0 R1 R2
= CC 2 =
R1+R2 R1+R2 ETh B-E IE RE
G G loop
(d) (e)

Fig.5-32: (d) Circuit for ETh calculation, Fig.5-33: Base-emitter loop with
(e) Circuit for RTh calculation. Thevenin’s equivalent circuit

𝑬𝑻𝒉 calculation: Thevenin’s voltage will be the open circuit voltage across 𝑅2 [see Fig.5-32(d)].
Applying voltage divider rule we get,
𝑉𝐶𝐶 𝑅2
𝐸Th = (5-54)
𝑅1 + 𝑅2
𝑹𝑻𝒉 calculation: To calculate 𝑅𝑇ℎ , first we have to replace the voltage source by short circuit as
shown in Fig.5-32(e). Looking at the 𝐵 and 𝐺 terminals we find that 𝑅1 and 𝑅2 are in parallel.
Therefore the Thevenin’s resistance will be,
𝑅1 𝑅2
𝑅Th = 𝑅1 ǁ 𝑅2 = (5-55)
𝑅1 + 𝑅2
Chapter 5: BJT Biasing Circuits 35

Now, if we redraw the biasing circuit using the Thevenin’s equivalent circuit, we get the circuit of
Fig.5-33 (only the input loop is shown).
To calculate the value of 𝐼𝐵 (which is also 𝐼𝐵𝑄 ), let us apply KVL in the base-emitter circuit of Fig.5-
33.
𝐸Th − 𝐼𝐵 𝑅Th − 𝑉𝐵𝐸 − 𝐼𝐸 𝑅𝐸 = 0 (5-56)
𝑜𝑟, 𝐸Th − 𝐼𝐵 𝑅Th − 𝑉𝐵𝐸 − (𝛽 + 1)𝐼𝐵 𝑅𝐸 = 0 [∵ 𝐼𝐸 = (𝛽 + 1)𝐼𝐵 ]
𝑜𝑟, 𝐼𝐵 [𝑅𝑇ℎ + (𝛽 + 1)𝑅𝐸 ] = 𝐸𝑇ℎ − 𝑉𝐵𝐸
𝐸Th − 𝑉𝐵𝐸
∴ 𝐼𝐵 = 𝐼𝐵𝑄 = (5-57)
𝑅Th + (𝛽 + 1)𝑅𝐸
Therefore, the value of collector current will be,
𝛽(𝐸Th − 𝑉𝐵𝐸 )
𝐼𝐶 = 𝐼𝐶𝑄 = 𝛽𝐼𝐵 = (5-58)
𝑅Th + (𝛽 + 1)𝑅𝐸
The collector-emitter loop will be exactly same as in the Fig.5-20(c). Applying KVL to that loop,
𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 − 𝑉𝐶𝐸 − 𝐼𝐸 𝑅𝐸 = 0
𝑜𝑟, 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 − 𝑉𝐶𝐸 − 𝐼𝐶 𝑅𝐸 = 0 [∵ 𝐼𝐸 ≈ 𝐼𝐶 ]
𝑜𝑟, 𝑉𝐶𝐶 − 𝐼𝐶 (𝑅𝐶 + 𝑅𝐸 ) − 𝑉𝐶𝐸 = 0

∴ 𝑉𝐶𝐸 = 𝑉𝐶𝐸𝑄 = 𝑉𝐶𝐶 − 𝐼𝐶 (𝑅𝐶 + 𝑅𝐸 ) (5-59)

Using Equ.(5-58) and (5-59) the exact position of the operating point of voltage divider bias circuit
can be calculated.
5.11.2 Analysis Neglecting the Effect of 𝑹𝐓𝐡 (Approximate Analysis)
When we can neglect 𝑹𝐓𝐡 : The voltage divider network, and
hence, the Thevenin’s equivalent circuit works as the source of IC
supply voltage to the base-emitter circuit. If very small amount RTh B
of current is drawn by the base terminal of the transistor (i.e.,
𝐼𝐵𝑄 is very small), we can neglect the voltage drop across 𝑅Th . IB
IE
Alternately, we can neglect the voltage drop of 𝑅Th if the load ETh Ri = ( +1)RE RE
connected to the Thevenin’s circuit, is very large compared to
G
𝑅Th . Let’s set a limit. We can neglect the voltage drop across
𝑅𝑇ℎ , if the load resistance is ten times of 𝑅Th or even more. As
shown in Fig.5-33, the emitter resistor, 𝑅𝐸 , seen from the base Fig.5-34: Load resistance of the
circuit, i.e., (𝛽 + 1)𝑅𝐸 will be the load resistance to the Thevenin’s circuit is Ri = ( +1)RE
Thevenin’s circuit. Thus, the condition to neglect the effect of
𝑅Th will be:
(𝛽 + 1)𝑅𝐸 ≥ 10 × 𝑅Th ≥ 10 × (𝑅1 ǁ 𝑅2 ) (5-60)
But, generally in a voltage divider bias circuit 𝑅1 ≫ 𝑅2 [∴ 𝑅Th = 𝑅1 ǁ 𝑅2 ≈ 𝑅2 ] and for any
transistor 𝛽 ≫ 1[∴ 𝛽 + 1 ≈ 𝛽]. Hence, we can write the Equ.(5-60) as,
Chapter 5: BJT Biasing Circuits 36

𝛽𝑅𝐸 ≥ 10𝑅2 (5-61)

If any voltage divider bias circuit fulfill the condition of Equ.(5-61), we can neglect the effect of 𝑅Th
and analyze the circuit very easily. This analysis is called approximate analysis.
Approximate Analysis:
If we neglect the voltage drop across 𝑅Th , Equ.(5-66) can be written as,
𝐸Th − 0 − 𝑉𝐵𝐸 − 𝐼𝐸 𝑅𝐸 = 0
𝑜𝑟, 𝐼𝐸 𝑅𝐸 = 𝐸Th − 𝑉𝐵𝐸
𝐸Th − 𝑉𝐵𝐸
𝑜𝑟, 𝐼𝐸 = ≈ 𝐼𝐶𝑄 (5-62)
𝑅𝐸
The value of 𝐸Th will be same as before, i.e., 𝐸Th = 𝑉𝐶𝐶 × (𝑅2 )/(𝑅1 + 𝑅2 ) and the value of 𝑉𝐶𝐸𝑄
can be calculated using Equ.(5-59).

Example 5-13
For the voltage divider biasing circuit of Fig.5-35, calculate (i) 𝐼𝐵𝑄 , (ii) 𝐼𝐶𝑄 , (iii) 𝑉𝐶𝐸𝑄 , (iv) 𝑉𝐸 , and (v)
𝑉𝑅𝐶 using exact analysis and approximate analysis and compare the results.

Solution:
Exact Analysis: VCC = 12 V

Values of 𝐸Th and 𝑅Th can be calculated using Equ.(5-54) and

R1 RC
Equ.(5-55) as, IC
5.6 k
22 k
𝑉𝐶𝐶 𝑅2 12 V (4.7 kΩ)
𝐸Th = = ≈ 2.11 V
𝑅1 + 𝑅2 (22 + 4.7) kΩ  = 100
𝑅1 𝑅2 (4.7 kΩ) (22 kΩ) IB
𝑅Th = = ≈ 3.87 kΩ R2
𝑅1 + 𝑅2 (22 + 4.7) kΩ 4.7 k RE
IE
1.5 k
The biasing base current can be calculated using Equ.(5-57),
2.11 V − 0.7 V
𝐼𝐵𝑄 = Fig.5-35: Voltage divider bias
3.87 kΩ + (100 + 1)1.5 kΩ
circuit for Example 5-13
𝑜𝑟, 𝐼𝐵𝑄 ≈ 9.09 μA [Ans. ]
Now the quiescent collector current will be,
𝐼𝐶𝑄 = 𝛽𝐼𝐵 = 100 × (9.09 μA) = 0.909 mA [Ans. ]
Using Equ.(5-59), we can calculate 𝑉𝐶𝐸𝑄 as,
𝑉𝐶𝐸𝑄 = 𝑉𝐶𝐶 − 𝐼𝐶 (𝑅𝐶 + 𝑅𝐸 ) = 12 𝑉 − 0.909 mA × (5.6 kΩ + 1.5 kΩ) ≈ 5.55 V [Ans. ]
𝑉𝐸 and 𝑉𝑅𝐶 can be calculated multiplying 𝑅𝐸 and 𝑅𝐶 by the current flowing through them.
𝑉𝐸 = 𝑉𝑅𝐸 = 𝑅𝐸 × 𝐼𝐸 ≈ 𝑅𝐸 × 𝐼𝐶𝑄 = 1.5 kΩ × 0.909 mA ≈ 1.36 V [Ans. ]
𝑉𝑅𝐶 = 𝑅𝐶 × 𝐼𝐶𝑄 = 5.6 kΩ × 0.909 mA ≈ 5.1 V [Ans. ]
Approximate Analysis:
Chapter 5: BJT Biasing Circuits 37

Condition for approximate analysis: 𝛽𝑅𝐸 ≥ 10𝑅2 or 100 × 1.5 kΩ ≥ 10 × 4.7 kΩ or 150 kΩ ≥
47 kΩ ⟹ True.
Values of 𝐼𝐶𝑄 and 𝑉𝐶𝐸𝑄 can be calculated using Equ.(5-62) and Equ.(5-59),
𝐸Th − 𝑉𝐵𝐸 2.11 V − 0.7 V
𝐼𝐶𝑄 = = ≈ 0.94 mA [Ans. ]
𝑅𝐸 1.5 kΩ
𝑉𝐶𝐸𝑄 = 𝑉𝐶𝐶 − 𝐼𝐶 (𝑅𝐶 + 𝑅𝐸 ) = 12 V − 0.94 mA × (5.6 kΩ + 1.5 kΩ) ≈ 5.32 V [Ans. ]
𝑉𝐸 and 𝑉𝑅𝐶 can be calculated multiplying 𝑅𝐸 and 𝑅𝐶 by the current flowing through them.
𝑉𝐸 = 𝑅𝐸 × 𝐼𝐸 ≈ 𝑅𝐸 × 𝐼𝐶𝑄 = 1.5 kΩ × 0.94 mA ≈ 1.41 V [Ans. ]
𝑉𝑅𝐶 = 𝑅𝐶 × 𝐼𝐶𝑄 = 5.6 kΩ × 0.909 mA ≈ 5.27 V [Ans. ]
Now, dividing 𝐼𝐶𝑄 by 𝛽 we will get the value of 𝐼𝐵𝑄 ,
𝐼𝐶𝑄 0.94 mA
𝐼𝐵𝑄 = = ≈ 9.41 μA [Ans. ]
𝛽 β
Comparison: The results obtained using exact and approximate analysis are given in the following
table with the % of variation.
𝑰𝑩𝑸 𝑰𝑪𝑸 𝑽𝑪𝑬𝑸 𝑽𝑬 𝑽𝑹𝑪
Exact 9.09 μA 0.909 mA 5.55 V 1.36 V 5.1 V
Approx. 9.41 μA 0.94 mA 5.32 V 1.41 V 5.27 V
Variation 3.52% 3.41% -4.14% 3.68% 3.33%
Comment: As the condition for approximate analysis was true, the variation is less than 5%. But the
variation will be different depending on the values of 𝛽𝑅𝐸 and 𝑅2, even the condition is true.

Example 5-14 VCC = 12 V

Even the condition for approximate analysis is not true
for the voltage divider bias circuit of Fig.5-36, repeat R1 IC RC
8.2 k
Example 5-13, to see the differences in the results. 430 k
Solution:
𝛽=100
Here, 10𝑅2 = 10 × 100 kΩ = 1000 kΩ, and 𝛽𝑅𝐸 = IB
100 × 1.5 kΩ = 150 kΩ. ∴ 𝛽𝑅𝐸 ≥ 10𝑅2 ⟹ False. R2
100 k RE
IE
Now applying the same formulas as used in Example 5-13 1.5 k
the values of 𝐼𝐵𝑄 , 𝐼𝐶𝑄 , 𝑉𝐶𝐸𝑄 , 𝑉𝐸 , and 𝑉𝑅𝐶 have been
calculated using exact method and approximate method.
The results are shown in the following table: Fig.5-36: Voltage divider bias circuit
for example 4.13

𝑰𝑩𝑸 𝑰𝑪𝑸 𝑽𝑪𝑬𝑸 𝑽𝑬 𝑽𝑹𝑪

Exact 6.72 μA 0.67 mA 5.48 V 1.00 V 5.51 V
Approx. 10.43 μA 1.04 mA 1.89 V 1.56 V 8.55 V
Chapter 5: BJT Biasing Circuits 38

Variation 55.21% 55.22% -65.51% 56.00% 55.17%

Comment: As the condition is not true for this example, the differences between the exact and
approximate method are very high. To get more detail idea how the values of 𝑅2 and 𝛽𝑅𝐸 affect
the results, refer to the graph of Fig.5-37. Here, the difference (%error) between 𝐼𝐶𝑄 found in exact
method and approximate method is shown for different values of the ratio of 𝛽𝑅𝐸 to 10𝑅2.

%error
18
16
14
12
 RE =10R2
10
8
% error in ICQ calculated using
6 approximate method.
4
2
 RE/10R2
0
01 5 10 15 20 25 30 35

Fig.5-37: % error in 𝐼𝐶𝑄 calculated using approximate method of voltage divider

bias with 𝑉𝐶𝐶 = 12 V, 𝛽 = 100, 𝑅𝐶 = 5.6 k, 𝑅𝐸 = 1.5 k and variable 𝑅1 and 𝑅2

5.11.3 Determination of Load Line of Voltage Divider Bias Circuit:

Determination process of load line for voltage divider bias circuit is exactly the same as that of
emitter bias circuit. Load line can be drawn using Equ.(5-59).
𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 (𝑅𝐶 + 𝑅𝐸 ) (5-63)
When 𝐼𝐶 = 0, 𝑉𝐶𝐸 = 𝑉𝐶𝐶 and when 𝑉𝐶𝐸 = 0, 𝐼𝐶 = 𝑉𝐶𝐶 /(𝑅𝐶 + 𝑅𝐸 ). Now, we have to put these two
points on a 𝐼𝐶 − 𝑉𝐶𝐸 coordinate system. Point 𝐴(𝑉𝐶𝐶 , 0) lies on 𝑥-axis and the point 𝐵(0, 𝑉𝐶𝐶 /(𝑅𝐶 +
𝑅𝐸 )) lies on 𝑦-axis. Joining these two points by a straight line, we will get the load line.
Saturation of Transistor in Voltage Divider Bias Circuit:
We have already learnt the causes of saturation of transistors in different biasing circuits. Voltage
divider biasing circuit may also be saturated by inaccurate component values. Here, the transistors
can be saturated for very larger values of 𝑅2 and 𝑅𝐶 , and very small values of 𝑅1 and 𝑅𝐸 . Any value
of 𝛽 will not saturate the transistor. The proof of these saturations are left for the students in
Exercise no. 4.. The saturation collector current for this voltage divider circuit will be
approximately,
𝑉𝐶𝐶
𝐼𝐶(𝑠𝑎𝑡) ≈ (5-64)
𝑅𝐶 + 𝑅𝐸

5.11.4 Calculation of Stability Factors of Voltage Divider Bias

From the forward biased input circuit (B-E loop), we have already found Equ.(5-56), which is
Chapter 5: BJT Biasing Circuits 39

𝐸Th − 𝐼𝐵 𝑅Th − 𝑉𝐵𝐸 − 𝐼𝐸 𝑅𝐸 = 0

𝑜𝑟, 𝐸Th − 𝐼𝐵 𝑅Th − 𝑉𝐵𝐸 − 𝐼𝐶 𝑅𝐸 − 𝐼𝐵 𝑅𝐸 = 0 [∵ 𝐼𝐸 = 𝐼𝐶 + 𝐼𝐵 ]
𝑜𝑟, 𝐼𝐵 (𝑅Th + 𝑅𝐸 ) = 𝐸Th − 𝑉𝐵𝐸 − 𝐼𝐶 𝑅𝐸 = 0
𝐸Th − 𝑉𝐵𝐸 − 𝐼𝐶 𝑅𝐸
∴ 𝐼𝐵 = (5-65)
𝑅Th + 𝑅𝐸
We know that the collector current of a transistor is,
𝐼𝐶 = 𝛽𝐼𝐵 + (𝛽 + 1)𝐼𝐶𝐵𝑂 (5-66)
Putting the value of 𝐼𝐵 from Equ.(5-65) into Equ.(5-66),
𝛽(𝐸Th − 𝑉𝐵𝐸 − 𝐼𝐶 𝑅𝐸 )
𝐼𝐶 = + (𝛽 + 1)𝐼𝐶𝐵𝑂
𝑅Th + 𝑅𝐸
𝛽(𝐸Th − 𝑉𝐵𝐸 − 𝐼𝐶 𝑅𝐸 ) + (𝑅Th + 𝑅𝐸 )(𝛽 + 1)𝐼𝐶𝐵𝑂
𝑜𝑟, 𝐼𝐶 =
𝑅Th + 𝑅𝐸
𝑜𝑟, 𝐼𝐶 (𝑅Th + 𝑅𝐸 ) = 𝛽(𝐸Th − 𝑉𝐵𝐸 ) − 𝛽𝐼𝐶 𝑅𝐸 + (𝑅Th + 𝑅𝐸 )(𝛽 + 1)𝐼𝐶𝐵𝑂
𝑜𝑟, 𝐼𝐶 [𝑅Th + (𝛽 + 1)𝑅𝐸 ] = 𝛽(𝐸Th − 𝑉𝐵𝐸 ) + (𝑅Th + 𝑅𝐸 )(𝛽 + 1)𝐼𝐶𝐵𝑂
𝛽(𝐸Th − 𝑉𝐵𝐸 ) + (𝑅Th + 𝑅𝐸 )(𝛽 + 1)𝐼𝐶𝐵𝑂
∴ 𝐼𝐶 = (5-67)
𝑅Th + (𝛽 + 1)𝑅𝐸
Now, if we compare Equ.(5-67) with Equ.(5-34), we find that the only difference is, 𝐸Th in place of
𝑉𝐶𝐶 and 𝑅Th in place of 𝑅𝐵 . So differentiating Equ.(5-67), we will get exactly the same results, but,
𝐸Th in place of 𝑉𝐶𝐶 , and 𝑅Th in place of 𝑅𝐵 . Therefore, the stability factors for the voltage divider
bias circuit will be,
(𝑅Th + 𝑅𝐸 )(𝛽 + 1)
𝑆(𝐼𝐶𝐵𝑂 ) = (5-68)
𝑅Th + (𝛽 + 1)𝑅𝐸

𝛽
𝑆(𝑉𝐵𝐸 ) = − (5-69)
𝑅Th + (𝛽 + 1)𝑅𝐸

(𝑅Th + 𝑅𝐸 )(𝐸Th − 𝑉𝐵𝐸 )

and, 𝑆(𝛽) = (5-70)
[𝑅Th + (𝛽 + 1)𝑅𝐸 ]2
The expressions for the stability factors for voltage divider bias are comparable with those of the
emitter bias and collector feedback bias circuits. Already we have found that a lower value of 𝑅𝐵
and 𝑉𝐶𝐶 give better stability. In voltage divider bias, the corresponding values are 𝑅Th and 𝐸Th . But
the values of 𝑅Th and 𝐸Th are much lower than that of 𝑅𝐵 and 𝑉𝐶𝐶 . So, the voltage divider bias
provides the best stability of the operating point. The dependency of the stability factors on 𝑅Th ,
𝑅𝐸 will be same as shown in Fig.5-31.
Lower values of 𝑅Th and higher values of 𝑅𝐸 give improved stability factor except 𝑆(𝑉𝐵𝐸 ) [higher
values of 𝑅Th and 𝑅𝐸 give better 𝑆(𝑉𝐵𝐸 )]. However, lower value of 𝑅Th causes power loss in
voltage divider network, and higher value of 𝑅𝐸 decrease the voltage gain of the transistor circuit.
Chapter 5: BJT Biasing Circuits 40

For this reason, we cannot make 𝑅Th very low, and 𝑅𝐸 very high. We have to make a tradeoff
between them. To make it clear, let us rewrite Equ.(5-68) as,
(𝑅Th + 𝑅𝐸 )(𝛽 + 1) (𝑅Th + 𝑅𝐸 )
𝑆(𝐼𝐶𝐵𝑂 ) = = (𝛽 + 1)
𝑅Th + (𝛽 + 1)𝑅𝐸 𝑅Th + (𝛽 + 1)𝑅𝐸
1 + 𝑅Th /𝑅𝐸
𝑜𝑟, 𝑆(𝐼𝐶𝐵𝑂 ) = (𝛽 + 1) (5-71)
(𝛽 + 1) + 𝑅Th /𝑅𝐸
From Equ.(5-71), if 𝑅Th /𝑅𝐸 < 1 (i.e., 𝑅𝐸 > 𝑅Th ), we can write, 𝑆(𝐼𝐶𝐵𝑂 ) ≈ 1. To get exactly
𝑆(𝐼𝐶𝐵𝑂 ) = 1, 𝑅Th /𝑅𝐸 must be zero, which is not possible. But, theoretically 𝑆(𝐼𝐶𝐵𝑂 ) can be made
equal to 2 by making 𝑅Th = 𝑅𝐸 . Again, practically it is not possible. Because, in practical circuit, 𝑅Th
must be greater than 𝑅𝐸 .
If 1 < 𝑅Th /𝑅𝐸 < (𝛽 + 1) (i.e., (𝛽 + 1)𝑅𝐸 > 𝑅Th ), then we get, 𝑆(𝐼𝐶𝐵𝑂 ) ≈ 𝑅Th /𝑅𝐸 . That is, the
value of 𝑆(𝐼𝐶𝐵𝑂 ) will remain less than (𝛽 + 1).
Finally, if 𝑅Th /𝑅𝐸 > (𝛽 + 1) (i.e., (𝛽 + 1)𝑅𝐸 < 𝑅Th ), then the value of the stability factor will be
𝑆(𝐼𝐶𝐵𝑂 ) ≈ (𝛽 + 1). Although, here we have approximate three different values of 𝑆(𝐼𝐶𝐵𝑂 ), actual
values will changes gradually with the increase in the ration 𝑅Th /𝑅𝐸 as shown in the Fig.5-38. This
is a semi-log graph, that has been drawn with 𝑉𝐶𝐶 = 12 V, 𝛽 = 50, 𝑅𝐶 = 5 kΩ, and different values
of 𝑅1 and 𝑅2 . To keep the value of 𝐸Th unchanged (and hence the operating point of the bias
circuit) the ration of 𝑅1 /𝑅2 was not changed. As practically 𝑆(𝐼𝐶𝐵𝑂 ) cannot be 1, here the graphs
has been started from 2 for 𝑅Th = 𝑅𝐸 . When 𝑅Th /𝑅𝐸 = (𝛽 + 1), the value of 𝑆(𝐼𝐶𝐵𝑂 ) will be
(𝛽/2 + 1).
𝑆(𝐼𝐶𝐵𝑂 )
60 𝑅Th
𝑆 ≈ (𝛽 + 1) [for > (𝛽 + 1)]
𝑅𝐸
(𝛽 + 1)
50

40

𝛽 𝑅Th
30 𝑆 = ( + 1) [for = (𝛽 + 1)]
26 2 𝑅𝐸

20 𝑆≈2
𝑅Th
[for = 1] 𝑅Th 𝑅Th
𝑅𝐸
10 𝑆≈ [for 1 < < (𝛽 + 1)]
𝑅𝐸 𝑅𝐸
2 𝑅Th
0
1 10 51 100 1000 10000 𝑅E

Fig.5-38: Variation of 𝑆(𝐼𝐶𝐵𝑂 ) with the variation of 𝑅Th /𝑅𝐸

As the graph of Fig.5-38 has been drawn for 𝛽 = 50, this point is shown by (51, 26) on the graph.
Although, the graph shows the variation of 𝐼𝐶𝐵𝑂 for voltage divider bias, by using 𝑅𝐵 in place of 𝑅𝑇ℎ
the result for emitter feedback bias and using 𝑅𝐶 in place of 𝑅𝐸 collector feedback bias will be
found. The shape of the graphs for emitter feedback bias and collector feedback bias will be same
and all the conditions and results discussed here, will be equally applicable for them.
Chapter 5: BJT Biasing Circuits 41

Example 5-15
Fig.5.39(a) shows a voltage divider bias circuit considering a typical 𝛽 value of 145. Calculate the
load line and operating point of this circuit. If we consider BD135 transistor, that has 𝛽𝑚𝑖𝑛 = 40
and 𝛽𝑚𝑎𝑥 = 250, calculate the lowest and the highest operating point corresponding to these 𝛽
values. Compare the results with the results of Fig.5-19, and Fig.5-23.

VCC =12 V IC (mA)

4
R1 RC
IC Q-point: max = 250
18 k 2k
3
Q-point:  =145
𝛽= 145 2
IB
R2 Q-point: min=40
5.6 k RE 1
IE
1k
VCE (V)
0
0 2 4 6 8 10 12

Fig.5-39(a): Voltage divider Fig.5-39(b): Operating points of

bias circuit for Example 4.14 example 4.14

Solution:
Exact Analysis:
𝑉𝐶𝐶 𝑅2 12 V (5.6 kΩ)
Using Equ.(5-54), 𝐸Th = = ≈ 2.8475 V
𝑅1 + 𝑅2 (18 + 5.6) kΩ
𝑅1 𝑅2 (18 kΩ) (5 − 6 kΩ)
Using Equ.(5-55), 𝑅Th = = ≈ 4.27 kΩ
𝑅1 + 𝑅2 (18 + 5.6) kΩ
The base current can be calculated using Equ.(5-57),
𝐸Th − 𝑉𝐵𝐸 2.8475 V − 0.7 V
∴ 𝐼𝐵𝑄 = = ≈ 14.2906 μA [Ans. ]
𝑅Th + (𝛽 + 1)𝑅𝐸 4.27 kΩ + (145 + 1)1 kΩ
Now the quiescent collector current will be [Equ.( 5-58)],
𝐼𝐶𝑄 = 𝛽𝐼𝐵 = 145 × (14.2906 μA) = 2.072 mA [Ans. ]
Using Equ.( 5-59), we can calculate 𝑉𝐶𝐸𝑄 ,
𝑉𝐶𝐸𝑄 = 𝑉𝐶𝐶 − 𝐼𝐶 (𝑅𝐶 + 𝑅𝐸 ) = 12 𝑉 − 2.072 mA × (2 + 1) kΩ ≈ 5.78 V [Ans. ]
By repeating above process, the operating points for 𝛽𝑚𝑖𝑛 = 40 and 𝛽𝑚𝑎𝑥 = 250 have been
calculated and the results are found as below:
𝛽𝑚𝑖𝑛 = 40: 𝐼𝐶𝑄 ≈ 1.897 mA, and 𝑉𝐶𝐸𝑄 ≈ 6.31 V
𝛽𝑚𝑖𝑛 = 250: 𝐼𝐶𝑄 ≈ 2.103 mA, and 𝑉𝐶𝐸𝑄 ≈ 5.69 V
The load line will start from 12 V on 𝑥-axis and ends to 12 V /(2kΩ + 1kΩ) = 4 mA on 𝑦-axis.
The load line and the operating points are shown in Fig.5-39(b).
To compare the performance of three types of biasing circuits, the variations of operating points
for different 𝛽-values in Fig.5-19, 5-23 and 5-39 are shown in Table 4.5.
Chapter 5: BJT Biasing Circuits 42

Table 4.5: Variation of operating points due to variation in 𝛽.

Fixed bias Emitter feedback bias Voltage divider bias
𝛽
𝐼𝐶𝑄 (mA) 𝑉𝐶𝐸𝑄 (V) 𝐼𝐶𝑄 (mA) 𝑉𝐶𝐸𝑄 (V) 𝐼𝐶𝑄 (mA) 𝑉𝐶𝐸𝑄 (V)
40 0.551 10.35 0.683 9.95 1.897 6.31
145 1.998 6.00 2.000 6.00 2.072 5.78
250 3.445 1.67 2.893 3.32 2.103 5.69
Comments: Look at the operating points of the voltage divider bias. In spite of a very large variation
in 𝛽, there is a very small change in the operating points. Here the collector feedback bias is
considered as it’s seldom used.

5.12 Voltage Divider Bias for PNP Transistor

The voltage divider bias circuit for a PNP transistor is shown in Fig.5-40. Here, the collector is
connected to lower potential and the emitter is connected to higher potential, which is just
opposite to that of NPN transistor. Moreover, the polarity of the voltages across the terminals and
the direction of currents are reversed. In case of negative voltage system, Thevenin’s theorem has
Thevenin’s
-VCC VEE
Theorem

IC RC IE
R1 R1 RE

IB

IB
R2 R2
IE RE IC RC

Thevenin’s
Theorem (a) (b)
Fig.5-40: Voltage divider bias for PNP transistor, (a) Negative
voltage system, and (b) Positive voltage system

to be applied in the same position as for NPN transistor and the operating point can be calculated
by using the Equ.(5-54) to Equ.(5-59) with reverse polarities of voltages and reverse direction of
currents. But for positive voltage system, Thevenin’s voltage has to be calculated across 𝑅1 instead
of 𝑅2 , as shown in Fig.5-40(b). That, the base voltage (𝑉𝐵 = 𝐸Th ) will be,
𝑉𝐶𝐶 𝑅1
𝐸Th = (5-72)
(𝑅1 + 𝑅2 )
Apart from these difference, a PNP transistor voltage divider bias circuit with positive voltage can
be analyzed in exactly using the same equations as derived for NPN transistor.
Chapter 5: BJT Biasing Circuits 43

Example 5-16
For the voltage divider circuits of Fig.5-41, calculate the operating points.

VCC = -12 V VEE = 12 V

R1 RC R1 RE
IC IE
3k 1.3 k
130 k 47 k
IB
𝛽 = 145 𝛽 = 145
IB
R2 R2
47 k RE 130 k RC
IE IC
1.3 k 3k

(a) (b)
Fig.5-41: PNP transistor circuits for Example 5.15 (a) Negative voltage (b) Positive voltage

Solution:
Negative voltage system [Fig.5-41(a)]:
𝑉𝐶𝐶 𝑅2 (−12 V) (47 kΩ )
Using Equ.(5-54), 𝐸Th = = ≈ −3.186 V
(𝑅1 + 𝑅2 ) (47 kΩ + 130 kΩ)
𝑅1 𝑅2 47 kΩ × 130 kΩ
Using Equ.(5-55), 𝑅Th = = ≈ 34.52 kΩ
𝑅1 + 𝑅2 (47 kΩ + 130 kΩ)
−3.186 V + 0.7 V
Using Equ.(5-57), 𝐼𝐵 = 𝐼𝐵𝑄 = ≈ −11.084 μA
34.52 kΩ + (145 + 1)1.3 kΩ
Using Equ.(5-58), 𝐼𝐶𝑄 = 145 × (−11.084 μA) = −1.61 mA
Using Equ.(5-59), 𝑉𝐶𝐸𝑄 = −12 V − (−1.61 mA) × (3 kΩ + 1.3 kΩ) ≈ −5.1 V
Positive voltage system [Fig. 4.40(b)]:
𝑉𝐶𝐶 𝑅1 (12 V) (47 kΩ )
Using Equ.(5-5), 𝐸Th = = ≈ 3.186 V
(𝑅1 + 𝑅2 ) (47 kΩ + 130 kΩ)
Rest of the calculation is same and the same results will be found.
Comments: For negative voltage system negative currents and voltages are found. But for positive
voltage the results will be same as for NPN transistors.

5.13 Biasing Circuit with Split Power Supply

We know a normal power supply or a voltage source has two terminals: a positive terminal and a
negative terminal or ground same as any battery [Fig.-42(a)]. This type of power supply is called
Chapter 5: BJT Biasing Circuits 44

CURRENT 3.6V
4.8V 6.0V VOLTAGE CURRENT 4.8V 6.0V VOLTAGE
3.6V
1.5V 7.2V 1.5V 7.2V
0-15V 0-15V

0.5A 3.0A Fine Coarse 0.5A 3.0A 0V -15V 0V 15V

ON OFF

( )

(a) Single-polarity variable DC power supply (b) Dual polarity variable DC power supply

Fig.5-42: Single-polarity and dual polarity variable DC power supply

single-polarity power supply. But, there are some power sources that have three terminals: a
positive terminal, a negative terminal and a ground [Fig.-42(a)]. This type of power source is called
split power supply or dual-polarity power supply. Some electronic circuits need split power
supplies, e.g., circuits consisting of operational amplifiers. In this section, we will see how to
analyze basing circuits if a split voltage source (split power supply) is connected to the circuit.

VCC VCC
RC RC
RB
IC IC
IB IB
VCE VCE
VBE RB VBE
IE IE
-VEE -VEE

(a) Base resistor is connected to 𝑉𝐶𝐶 (b) Base resistor is connected to ground

Fig.5-43: Base bias circuit with split power supply

5.14 Base Bias Circuit with Split Power Supply

If a base bias or fixed bias circuit uses a split supply as shown in Fig. 4.43(a), the circuit can be
analyzed using the same formulae as single supply base bias circuit. Only the difference is, instead
Chapter 5: BJT Biasing Circuits 45

VCC VCC

RC RC
RB
IC IC
IB IB
VCE VCE
VBE RB VBE
IE IE
-VEE -VEE
(a) (b)

Fig.5-43: Base bias circuit with split power supply

of 𝑉𝐶𝐶 , we have to use 𝑉𝐶𝐶 + 𝑉𝐸𝐸 . The expressions for finding the operating point of this circuit will
be:
𝑉𝐶𝐶 + 𝑉𝐸𝐸 − 𝑉𝐵𝐸
𝐼𝐵𝑄 = (5-73)
𝑅𝐵
𝐼𝐶𝑄 = 𝛽𝐼𝐵 + (𝛽 + 1)𝐼𝐶𝐵𝑂 ≈ 𝛽𝐼𝐵 (5-74)

𝑉𝐶𝐸𝑄 = (𝑉𝐶𝐶 + 𝑉𝐸𝐸 ) − 𝐼𝐶𝑄 𝑅𝐶 (5-75)

Base bias with split power supply is sometimes represented as in Fig.5-43(b). For this circuit, Equ.
(5-73) will be different. Now the base-emitter circuit will be forward biased by 𝑉𝐸𝐸 . Therefore,
𝑉𝐸𝐸 − 𝑉𝐵𝐸
𝐼𝐵𝑄 = (5-76)
𝑅𝐵
Equ.(5-74) and (5-75) will be applicable for this circuit, as well.

Example 5-17
Calculate the operating point of the base bias circuit of Fig.5-44. Also determine the operating
point if a base resistor of 270 kΩ is connected from ground to the base.

Solution:
The biasing circuit of Fig.5-44(a) is similar to that of Fig.5-43(a). So we will use Equ.(5-73) to Equ.(5-
75).
9 V + 9 V − 0.7 V
Using Equ.(5-73), 𝐼𝐵𝑄 = ≈ 30.8929 μA [Ans. ]
560 kΩ
Using Equ.(5-74), 𝐼𝐶𝑄 ≈ 𝛽𝐼𝐵 = 120 × 30.8929 μA ≈ 3.70714 mA [Ans. ]
Using Equ.(5-75), 𝑉𝐶𝐸𝑄 = 9 V + 9 V − (3.70714 mA) × 2.4 kΩ ≈ 9.1 [Ans. ]
In the circuit of Fig.5-44(b), 270 kΩ resistor is connected from ground to the base. So this circuit is
same as that of Fig.5-43(b). So, we have to used Equ.(5-76) instead of Equ.(5-73).
Chapter 5: BJT Biasing Circuits 46

+9 V +9 V
RC
RB IC RC 2.4 k
560 k 2.4 k IC
IB
𝛽 = 120 𝛽 = 120
IB RB
IE 270 k IE
-9 V -9 V
(a) (b)
Fig.5-44: Circuit for Example 5-17

𝑉𝐸𝐸 − 𝑉𝐵𝐸 9 V − 0.7 V

Using Equ.(5-73), 𝐼𝐵𝑄 = = ≈ 30.7407 μA [Ans. ]
𝑅𝐵 270 kΩ
Using Equ.(5-74), 𝐼𝐶𝑄 = 𝛽𝐼𝐵 = 120 × 30.7407 μA ≈ 3.69 mA [Ans. ]
Using Equ.(5-64), 𝑉𝐶𝐸𝑄 = 9 V + 9 V − (3.69 mA) × 2.4 kΩ ≈ 9.15 [Ans. ]
Comments: Using lower value resistor from ground to base same result can be found.

5.15 Emitter Bias with Split Voltage Supply

Emitter bias circuit with split voltage supply
VCC VCC
may also be constructed in two
configurations. One configuration is same RB IC RC IC RC
as previous emitter bias circuit [Fig.5-45(a)]
IB
and the other is with a base resistor
connected to ground [Fig.5-45(b)]. For the IB VBE
circuit of Fig.5-45(a) the equations will be, RB
IE RE IE RE

-VEE -VEE
𝑉𝐸𝐸 + 𝑉𝐶𝐶 − 𝑉𝐵𝐸 (a) (b)
𝐼𝐵 = (5-77)
𝑅𝐵 + (𝛽 + 1)𝑅𝐸
Fig.5-45: Emitter bias with split voltage supply

𝐼𝐶𝑄 = 𝛽𝐼𝐵 + (𝛽 + 1)𝐼𝐶𝐵𝑂 ≈ 𝛽𝐼𝐵

𝑉𝐶𝐸 = (𝑉𝐶𝐶 + 𝑉𝐸𝐸 ) − 𝐼𝐶 (𝑅𝐶 + 𝑅𝐸 ) (5-78)

In circuit of Fig.5-45(b), the collector is connected to positive terminal and the emitter is connected
to negative terminal of the split source. The base is connected to ground through a small resistor
𝑅𝐵 . This circuit is also called emitter current bias. Now applying KVL in the base-emitter circuit, we
get,
𝑉𝐸𝐸 − 𝐼𝐵 𝑅𝐵 − 𝑉𝐵𝐸 − 𝐼𝐸 𝑅𝐸 = 0
𝑉𝐸𝐸 − 𝐼𝐵 𝑅𝐵 − 𝑉𝐵𝐸 − (𝛽 + 1)𝐼𝐵 𝑅𝐸 = 0 [∵ 𝐼𝐸 = (𝛽 + 1)𝐼𝐵 ]
𝐼𝐵 [𝑅𝐵 + (𝛽 + 1)𝑅𝐸 ] = 𝑉𝐸𝐸 − 𝑉𝐵𝐸
Chapter 5: BJT Biasing Circuits 47

𝑉𝐸𝐸 − 𝑉𝐵𝐸
𝐼𝐵 = (5-79)
𝑅𝐵 + (𝛽 + 1)𝑅𝐸

∴ 𝐼𝐶𝑄 = 𝛽𝐼𝐵 + (𝛽 + 1)𝐼𝐶𝐵𝑂 ≈ 𝛽𝐼𝐵

This circuit needs 𝑅𝐵 with lower resistance compared to that of Fig.5-45(a). The lower value of 𝑅𝐵
provides better stability. As 𝑅𝐵 is very small, and the base circuit flowing through this resistance is
small, the voltage drop across 𝑅𝐵 will also be very small. If we neglect this voltage drop, we can
assume the base is connected to the ground potential. That is, if 𝑅𝐵 is selected so small that
𝐼𝐵(𝑚𝑎𝑥) 𝑅𝐵 is very small compared to 𝑉𝐵𝐸 . A good approximation is 𝐼𝐵(𝑚𝑎𝑥) 𝑅𝐵 = 𝑉𝐵𝐸 /10. Then, the
value of 𝐼𝐶𝑄 can be calculated very simply as,
𝑉𝐸𝐸 − 𝐼𝐵 𝑅𝐵 − 𝑉𝐵𝐸 − 𝐼𝐸 𝑅𝐸 = 0
𝑜𝑟, 𝑉𝐸𝐸 − 𝑉𝐵𝐸 − 𝐼𝐸 𝑅𝐸 = 0 [neglegting 𝐼𝐵 𝑅𝐵 ]
𝑉𝐸𝐸 − 𝑉𝐵𝐸
∴ 𝐼𝐸 =
𝑅𝐸
If 𝑉𝐸𝐸 is very larger than 𝑉𝐵𝐸 , we can write,
𝑉𝐸𝐸
𝐼𝐸 = ≈ 𝐼𝐶𝑄 (5-80)
𝑅𝐸
From Equ.(5-80), we find that 𝐼𝐶𝑄 in independent of 𝛽 and 𝑅𝐵 . Thus, the circuit will give a very
stable operating point.
For both the circuit the base-emitter voltage will be,
𝑉𝐶𝐸𝑄 = (𝑉𝐶𝐶 + 𝑉𝐸𝐸 ) − 𝐼𝐶𝑄 (𝑅𝐶 + 𝑅𝐸 ) (5-81)
5.16 Collector-to-Base Bias with VCC
Split Voltage Supply
RC RC
The collector-to-base bias with split VCC
power supply (+𝑉𝐶𝐶 , −𝑉𝐸𝐸 ) is shown in IB IC IB IC
Fig.5-46. All the equations derived for RB RB
single polarity voltage source can be VCE VCE
used to analyze this circuit by IB IB
VBE VBE -VEE
considering (𝑉𝐶𝐶 + 𝑉𝐸𝐸 ) instead of 𝑉𝐶𝐶 . IE IE
-VEE

(𝑉𝐶𝐶 + 𝑉𝐸𝐸 ) − 𝑉𝐵𝐸 Fig.5-46: Collector-to-base bias with split power supply.
𝐼𝐵𝑄 = (5-82)
𝑅𝐵 + (𝛽 + 1)𝑅𝐶
𝐼𝐶𝑄 = 𝛽𝐼𝐵 + 𝐼𝐶𝐸𝑂 ≈ 𝛽𝐼𝐵
𝑉𝐶𝐸𝑄 = (𝑉𝐶𝐶 + 𝑉𝐸𝐸 ) − (𝐼𝐶𝑄 + 𝐼𝐵𝑄 )𝑅𝐶 (5-83)
Chapter 5: BJT Biasing Circuits 48

5.17 Voltage Divider Bias with Split Supply

The voltage divider bias with split power supply is shown in Fig.5-47(a). A positive voltage is
supplied to the collector and a negative voltage is supplied to the emitter. The input and the output
to this circuit will be with respect to ground as shown in the figure. All the equations derived for
voltage divider bias with single voltage source can be used to analyze this circuit using (𝑉𝐶𝐶 + 𝑉𝐸𝐸 )
instead of 𝑉𝐶𝐶 .
VCC VCC
VCC
IC RC IC RC R1
R1 R1
C1 IB C1 IB C2
C2
RL RL
Vin R2 Vin R2 R2
IE RE RE VEE RE

-VEE -VEE
(a) (b) (c) Thevenin’s
Theorem

I1 I2
𝑉𝐶𝐶 𝑅1
VCC I1 R1 VCC R1 − VCC R1
𝑅1 + 𝑅2

′ ′′
𝐸Th 𝑅Th 𝑅Th
𝑉𝐶𝐶 𝑅2
VEE R2 + VEE R2 R2
𝑅1 + 𝑅2 I2 VEE

(d) (e) (f)

Fig.5-47: Voltage divider bias With split voltage source, (a) Biasing circuit with input and
output (b) DC equivalent circuit, (c) Same circuit drawn with two batteries and separated
the terminals, whre Thevenin’s Theorem is applied, (d,e) 𝐸Th calculation, and (f) 𝑅Th
calculations
However, in some literature, instead of using the same equations, 𝐸Th is calculated in different
way. To do that, look at the figures- Fig.5-47(b), which is the DC equivalent circuit. Fig.5-47(c) is the
same figure with two voltage sources connected with respect to ground and the terminals are
opened where Thevenin’s theorem has to be applied. Since, there are two voltage sources, we
have to use superposition theorem to calculate the value of 𝐸Th . 𝐸Th is the voltage to the base with
′
respect to ground. If we replace 𝑉𝐸𝐸 by a short circuit and consider only 𝑉𝐶𝐶 , the value of 𝐸Th will
be 𝑉𝐶𝐶 𝑅2 /(𝑅1 + 𝑅2 ). As shown in Fig.5-45(d), this voltage is positive. If we replace 𝑉𝐶𝐶 by a short
′′
circuit and consider only 𝑉𝐸𝐸 , the value of 𝐸Th will be −𝑉𝐶𝐶 𝑅1 /(𝑅1 + 𝑅2 ) [as shown in Fig.5-55(e)].
According to the superposition theorem, the value of 𝐸Th will be

′ ′′
𝑉𝐶𝐶 𝑅2 𝑉𝐸𝐸 𝑅1
𝐸Th = 𝐸Th + 𝐸Th = − (5-84)
𝑅1 + 𝑅2 𝑅1 + 𝑅2
Chapter 5: BJT Biasing Circuits 49

If we short both the source of Fig.5-45(f), we can find the

value of 𝑅Th as,
IC
𝑅1 𝑅2
𝑅Th = IB RTh B
𝑅1 + 𝑅2
Fig.5-48 shows the base-emitter loop of the biasing VBE
network with Thevenin’s equivalent circuit. Now the value ETh IE RE
B-E
of 𝐼𝐵 can be calculated by applying KVL in the base- loop
emitter loop as, VEE
𝐸Th − 𝐼𝐵 𝑅𝑇ℎ − 𝑉𝐵𝐸 − 𝐼𝐸 𝑅𝐸 + |𝑉𝐸𝐸 | = 0
𝐸Th − 𝐼𝐵 𝑅𝑇ℎ − 𝑉𝐵𝐸 − (𝛽 + 1)𝐼𝐵 𝑅𝐸 + 𝑉𝐸𝐸 = 0 Fig.5-48: Base-emitter loop with
Thevenin’s equivalent circuit
|𝑉𝐸𝐸 | + 𝐸Th − 𝑉𝐵𝐸
∴ 𝐼𝐵 = 𝐼𝐵𝑄 = (5-85)
𝑅Th + (𝛽 + 1)𝑅𝐸

∴ ∴ 𝐼𝐶𝑄 ≈ 𝛽𝐼𝐵𝑄 (5-86)

Value of 𝑉𝐶𝐸 can be calculated by apply KVL in the collector-emitter circuit. Its value will be,

∴ 𝑉𝐶𝐸𝑄 = (𝑉𝐶𝐶 + |𝑉𝐸𝐸 |) − (𝑅𝐶 + 𝑅𝐸 )𝐼𝐶𝑄 (5-87)

VCC VCC

IC RC IC RC
R1
IB
IB
𝑉𝐶𝐶 𝑅1
VB = 0 = RTh
𝑉𝐸𝐸 𝑅2
ETh= 0
R2 IE IE RE
RE
-VEE
-VEE
(a) (b)
Fig.5-49: Voltage divider bias equivalent to emitter current bias when 𝑉𝐵 = 0 V

5.18 Emitter Current Bias from Voltage Divider Bias:

The circuit of Fig.5-47(b) is redrawn in Fig.5-49(a) with the values of 𝑅1 and 𝑅2 selected in
proportion to the negative and positive voltages, i.e., 𝑉𝐶𝐶 /𝑉𝐸𝐸 = 𝑅1 /𝑅2. Now, from Equ.(5-84) the
value of 𝐸Th will be zero. However, the value of 𝑅Th will remain same. So, 𝐸Th of Fig.5-48 can be
replaced by a short circuit and the circuit can be redrawn as in Fig.5-49(b), which is same as the
emitter current bias circuit of Fig.5-45(b). Thus, we can say that the circuit of Fig.5-49(a) is the
voltage divider equivalent of emitter current bias circuit with the condition 𝑉𝐶𝐶 /𝑉𝐸𝐸 = 𝑅1 /𝑅2.

Example 5-18
For the voltage divider biasing circuit of Fig.5-50, determine the operating point, draw the load line
and place the operating point on the load line.
Chapter 5: BJT Biasing Circuits 50

IC (mA)
+9 V 3.0
2.77 mA
RC 2.5
R1 IC
5k Q-point
47 k 2.0
IBQ = 11.19 A
IB 1.5
𝛽 = 140
1.0 ICQ=1.56 mA
R2 VCEQ=7.82 V 18 V
RE 0.5
10 k IE
1.5 k 0
0 5 10 15 20 VCE (V)
-9 V

Fig.5-50: Voltage divider bias Fig.5-51: Load line and operating

circuit for Example 5-18 point of Example 5-18

Solution:
𝑉𝐶𝐶 𝑅2 𝑉𝐸𝐸 𝑅1 9 V × 10 kΩ 9 V × 47 kΩ
Using Equ.(5-84), 𝐸Th = − = − ≈ −5.84 V
𝑅1 + 𝑅2 𝑅1 + 𝑅2 47 kΩ + 10 kΩ 47 kΩ + 10 kΩ
𝑅1 𝑅2 47 kΩ × 10 kΩ
and the value of 𝑅Th , 𝑅Th = = ≈ 8.246 kΩ
𝑅1 + 𝑅2 47 kΩ + 10 kΩ
9 V − 5.84 V − 0.7 V
Using Equ.(5-85), 𝐼𝐵𝑄 = ≈ 11.185 μA [Ans. ]
8.246 kΩ + (140 + 1) × 1.5 kΩ
∴ 𝐼𝐶𝑄 ≈ 𝛽𝐼𝐵𝑄 = 140 × 11.185 μA ≈ 1.566 mA [Ans. ]
Using Equ.(5-83), 𝑉𝐶𝐸𝑄 = (9 𝑉 + 9 V) − (47 kΩ + 10 kΩ)(1.566 mA) ≈ 7.82 V [Ans. ]
The load line:
Using Equ.(5-83), when 𝐼𝐶 = 0, 𝑉𝐶𝐸 = 𝑉𝐶𝐶 + 𝑉𝐸𝐸 = 9 V + 9 V = 18 V
𝑉𝐶𝐶 + 𝑉𝐸𝐸 18 𝑉
when 𝑉𝐶𝐸 = 0, 𝐼𝐶 = = = 2.77 mA
𝑅𝐶 + 𝑅𝐸 5 kΩ + 1.5 kΩ
The load line is drawn by connecting two points: one is (18 V, 0) on the 𝑥-axis and the other is
(0,2.77) on the 𝑦-axis [Fig.5-51].
Comments: This problem can also be solved using the following equations:
(𝑉𝐶𝐶 + |𝑉𝐸𝐸 |)𝑅2
𝐸Th = (5-88)
𝑅1 + 𝑅2
𝑅1 𝑅2
𝑅𝑇ℎ = (5-89)
𝑅1 + 𝑅2
(𝐸Th − 𝑉𝐵𝐸 )𝛽
𝐼𝐶𝑄 = (5-90)
𝑅Th + (𝛽 + 1)𝑅𝐸
and, 𝑉𝐶𝐸𝑄 = (𝑉𝐶𝐶 + 𝑉𝐸𝐸 ) − (𝑅𝐶 + 𝑅𝐸 )𝐼𝐶𝑄 (5-91)
Chapter 5: BJT Biasing Circuits 51

5.19 Biasing Circuit for PNP Transistor with Split Power Supply
Like the NPN transistors, PNP transistors can be biased using split power supplies. All of the
biasing circuits of NPN transistors using split supplies can be used for PNP transistors too, only
changing the polarities of the supply voltages and the terminal voltages (like 𝑉𝐵𝐸 , 𝑉𝐶𝐸 etc.). So
the directions of currents will also be opposite to those of NPN transistors. Here, we will
discuss only the voltage divider biasing circuit as shown in Fig.5-52(a). The Thevenin’s
equivalent circuit can be determined as described for Fig.5-47. Now, changing the polarities of
the supply voltages, Equ.(5-84) can be used as,

𝑉𝐶𝐶 𝑅2 𝑉𝐸𝐸 𝑅1
𝐸Th = − + (5-92)
𝑅1 + 𝑅2 𝑅1 + 𝑅2
The value of 𝐸Th should be any value less than +𝑉𝐸𝐸 . The Thevenin’s resistance will be same as
before,
𝑅1 𝑅2
𝑅Th =
𝑅1 + 𝑅2

-VCC
IC
R1 IC RC IB RTh B

C1 IB VBE
C2
RL ETh B-E IE RE
Vin R2 loop
IE RE VEE
+VEE
(a) (b)

Fig.5-52: PNP transistor circuits for Example 5.15 (a) Negative voltage (b) Positive voltage

The circuit of Fig.5-52(a) can be redrawn as in Fig.5-52(b), using the Thevenin’s equivalent circuit.
Now applying KVL in this circuit, we can find the value of 𝐼𝐵 as,

|𝑉𝐸𝐸 | − 𝐸Th − 𝑉𝐵𝐸

𝐼𝐵 = 𝐼𝐵𝑄 = (5-93)
𝑅Th + (𝛽 + 1)𝑅𝐸
In deriving Equ.(5-93), 𝐸Th has been considered positive as shown in Fig.5-52(b). But Equ.(5-91) may
result negative value for 𝐸Th . In that case, 𝐸Th will positive in Equ.(5-93). Once the value of 𝐼𝐵 is
found other values of the operating point can be calculated as described for NPN transistor [Equ.(5-
86) and Equ.(5-87)].
For proper biasing of the PNP transistors, the value of 𝐸Th should be less than +𝑉𝐸𝐸 . Hence, we
may consider 𝐸Th = 0. From this consideration, the voltage divider bias circuit of Fig.5-52(a) can
also be designed just using only a sing base resistor, as shown in Fig.5-53.
Chapter 5: BJT Biasing Circuits 52

+VEE +VEE

IC RE IC RE
R1
IB
C1 IB C1
C2
RL C2
Vin R2
Vin RB RL
IE RC IE RC

-VCC -VCC

Fig.5-53: Biasing circuit for PNP Fig.5-54: Alternate

transistor using a base resistor representation of Fig.5-52(a)

Circuit of Fig.5-52(a) can also be redrawn as in Fig.5-54.

Example 5-19
For the voltage divider bias circuit of Fig.5-55, draw the load-line and calculate the operating point.

+16 V IC (mA)
RE
IC (0, 8)
2 kΩ 8
C1 IB

Q-point
4
Vin RB
RC C2 RL (17.24 V,
IE 3.69 mA)
2 kΩ 2 kΩ
(32,0) VCE (V)
-16 V 0
0 10 20 30 40
(a) (b)
Fig.5-55: PNP transistor circuits for Example 5.15 (a) Negative voltage (b) Positive voltage

Solution:
Load line:
The load-line of this circuit can be calculated using the following equation:
𝑉𝐶𝐸 = (𝑉𝐸𝐸 − 𝑉𝐶𝐶 ) − 𝐼𝐶 (𝑅𝐶 + 𝑅𝐸 )
𝑜𝑟, 𝑉𝐶𝐸 = (16 V + 16 V) − 𝐼𝐶 (2 kΩ + 2 kΩ)
𝑜𝑟, 𝑉𝐶𝐸 = 32 V − 𝐼𝐶 (4 kΩ)
From this equation we find that when, 𝐼𝐶 = 0, 𝑉𝐶𝐸 = 32 V and when 𝑉𝐶𝐸 = 0, 𝐼𝐶 = 32 V/4 kΩ =
8 mA. Putting these points on the 𝐼𝐶 vs. 𝑉𝐶𝐸 coordinate system and connecting them we will find
the load-line [shown in Fig.5-(b)]
Operating point:
The base current of this circuit can be calculated as,
Chapter 5: BJT Biasing Circuits 53

𝑉𝐸𝐸 − 𝑉𝐵𝐸 16 V − 0.7 V

𝐼𝐵 = 𝐼𝐵𝑄 = =
Using Equ.(5-), 𝑅𝐵 + (𝛽 + 1)𝑅𝐸 320 kΩ + (150 + 1)2kΩ
≈ 23.6 μA

Using Equ.(5-57), 𝐼𝐶 = 𝐼𝐶𝑄 = 𝐼𝐵𝑄 𝛽 = 23.6 μA × 150 ≈ 3.69 mA

Using Equ.(5-59), 𝑉𝐶𝐸 = 𝑉𝐶𝐸𝑄 = (𝑉𝐸𝐸 − 𝑉𝐶𝐶 ) − 𝐼𝐶 (𝑅𝐶 + 𝑅𝐸 )
𝑜𝑟, 𝑉𝐶𝐸𝑄 = 32 V − 3.69 mA(4 kΩ) ≈ 17.24 V
The position of the operating point (𝑉𝐶𝐸𝑄 , 𝐼𝐶𝑄 ) = (17.24 V, 3.69 mA) is shown on the load-line of
Fig.5-
Comments: Analysis of this biasing circuit of PNP transistor is similar to that of NPN transistors.

5.20 Comparison of Biasing Circuits

It is already discussed that the main target of a biasing circuit is to provide a stable operating point
irrespective of the change in temperature or the transistor current gain 𝛽. As the values of 𝛽 for a
particular transistor changes in a wide range (from 𝛽min to 𝛽max ), the biasing circuit must have the
ability to compensate this wide change of 𝛽. Suppose an electronics company has designed a
biasing circuit using the typical value of 𝛽 for transistor. But when the circuit is manufactured, the
transistor may have maximum value of 𝛽. If the biasing circuit doesn’t have the ability of
VCC = 12 V VCC = 12 V

RB RC 3k RB RC 1.5 k
820 k IC 600 k IC 
IB IB
𝛽 = 145 𝛽 = 145
IE
IE
RE 1.5 k

IC (mA) IC (mA)
Q-point: max = 250
4 4
IBQ = 13.781 A Q-point: max = 250

3 3 IBQ = 11.57 A
Design Q-point
Design Q-point: =250
IBQ = 13.781 A
2 2
IBQ = 13.8 A

1
Q-point: min=40 1
Q-point: min=40
IBQ = 13.781 A IBQ = 17.08A

0 0
0 2 4 6 8 10 12 VCE (V) 0 2 4 6 8 10 12 VCE (V)

(b) (a)
Fig.5-56: Comparison of biasing circuits, (a) Base bias, and (b) Emitter bias
Chapter 5: BJT Biasing Circuits 54

compensate this change, the transistor may be saturated and the circuit will not work. In actual
design, a circuit is tested whether it works for the minimum and maximum value of 𝛽. Thus, the
performance of a biasing circuit is evaluated by the change in operating point due to the change in
𝛽. This is the main parameter of evaluation. Moreover, we can consider the number of
components required, thermal stability, power loss etc. to compare the quality of biasing circuits.
So far we have studied four types of biasing circuits. We have already designed four biasing circuits
considering 𝛽 = 145. For every circuit the quiescent collector currents have been set
approximately 2 mA and 𝑉𝐶𝐸𝑄 at the middle of the load line. The total resistance in the collector
and emitter is kept 3 kΩ for every circuit. Then, the change in operating point for 𝛽𝑚𝑖𝑛 = 40 and
𝛽𝑚𝑎𝑥 = 250 has also been calculated. For better comparison the circuits and the graphs are
reproduced here in Fig.5-56 and 5-57. The positions of the operating points are also plotted in a
single load line in Fig.5-58.
From these graphs we can say that the voltage divider biasing circuit gives the highest stability and
the base bias gives the lowest stability against the change of 𝛽. The emitter bias has stability
greater than the base bias but lower than, collector-to-base bias and voltage divider bias. Although,
here, the effect of change of 𝛽 has been shown, the voltage divider bias gives the best thermal
stability as well. That’s why voltage divider bias is mostly used. The main disadvantages of voltage
divider bias are, it needs more components, and the voltage divider network produces some power
loss. On the other hand, the base bias needs the fewest components and produces minimum losses
in biasing component. For this reason, the base bias is used for switching purpose.
VCC = 12 V
VCC = 12 V

RC RC
3 k R1 IC
2k
18 k
RB IB IC
390 k 𝛽 = 145
IB
IB R2
5.6 k IE RE
IE
1k

IC (mA) IC (mA)
4 4
Q-point: max = 250
Q-point: max = 250
3 Q-point:  =145 3
IBQ = 9.89 A Q-point:  =145
2 IBQ = 13.65 A 2
Q-point: min = 40 Q-point: min= 40
1 1
IBQ = 22.039A
0 0
0 2 4 6 8 10 12 VCE (V) 0 2 4 6 8 10 12
(a) (b)
Fig.5-57: Comparison of biasing circuits, (a) Collector-to-base bias, and (b) Voltage divider bias
Chapter 5: BJT Biasing Circuits 55

IC (mA) VCC = 12 V
RC = 3 kor, (RC + RE) = 3 k
4
max = 250
Base bias
3
min = 40

Emitter bias
2

1 Voltage divider
bias
Collector-to-base
0 bias
0 2 4 6 8 10 12 VCE (V)
Fig.5-58: Change of operating points due to change in 𝛽 in four biasing circuits

5.21 Biasing Circuit Design

Designing any circuit means to determine the appropriate values of the components and also
selection of the devices. Designing a bias circuit depends on a lot of decisions, for example, supply
voltage, the load to be driven, level of stability, position of operating point, level of collector
current etc. However, for a given supply voltage, collector current and the transistor current gain 𝛽,
the design process is quite simple. Unless otherwise specified normally the biasing circuit is
designed to keep the operating point more or less middle of the load line. If the level of collector
current is not given and the load is also not known, then the collector current level can be
considered in the range of 1 mA to 5 mA. After selecting the value of 𝐼𝐶 , the voltage levels of 𝑉𝑅𝐶 ,
𝑉𝐶𝐸 and 𝑉𝐸 are determined. Dividing the collector current by 𝛽, base current is calculated and
solving standard equations of the bias circuit, values of different resistors are calculated. Once, we
get the resistance values, we have to find the nearest standard values. Then we may have to
recalculate the current or voltage using the standard values of the resistance. The list of the
standard resistors is given in Appendix. We have to calculate the currents and voltage levels using
𝛽𝑚𝑖𝑛 and 𝛽𝑚𝑎𝑥 as well.

5.22 Base Bias Circuit Design

If 𝑉𝐶𝐶 is known, to set the operating point at middle of the load line, we have to set 𝑉𝐶𝐸 = 𝑉𝑅𝐶 =
𝑉𝐶𝐶 /2, or if the value of 𝑉𝐶𝐸 is given, voltage drop across the collector resistor will be 𝑉𝑅𝐶 = 𝑉𝐶𝐶 −
𝑉𝐶𝐸 . Now, if the value of 𝐼𝐶 is given or selected, dividing 𝑉𝑅𝐶 by 𝐼𝐶 will give the value of 𝑅𝐶 . Value of
𝐼𝐵 can be calculated simply dividing 𝐼𝐶 by 𝛽. Finally, the value of 𝑅𝐵 can be calculated as 𝑅𝐵 =
(𝑉𝐶𝐶 − 𝑉𝐵𝐸 )/𝐼𝐵 .
Chapter 5: BJT Biasing Circuits 56

VCC
𝑉𝐶𝐶 − 𝑉𝐵𝐸
𝑅𝐵 = 𝑉𝐶𝐶 − 𝑉𝐶𝐸
𝐼𝐵 RC 𝑅𝐶 =
RB 𝐼𝐶
IC
IB
𝑉𝐶𝐶
𝐼𝐶 𝑉𝐶𝐸 = (or given)
𝐼𝐵 = VBE 2
𝛽
IE

(a)

Fig.5-59: Base bias circuit design

Example 5-20
Design a base bias circuit that will be operated by a supply voltage of 𝑉𝐶𝐶 = 12 V. Assume the
current gain of the transistor is ℎ𝐹𝐸 = 120.

Solution:
As the collector current level is not given, let it be 2 mA.
Value of 𝑉𝐶𝐸 is not given as well. So, VCC = 12 V

𝑉𝐶𝐶 12 V RB RC 3 k 
𝑉𝐶𝐸 = = =6V 680 k IC 2 mA
2 2
The value of base current will be, I B
VCE = 6 V
𝐼𝐶 2 mA 16.67 A
𝐼𝐵 = = ≈ 16.67 μA IE
ℎ𝐹𝐸 120
Therefore,
𝑉𝐶𝐶 − 𝑉𝐵𝐸 12 V − 0.7 V Fig.5-60: Designed base bias
𝑅𝐵 = = ≈ 678 kΩ = 680 kΩ
𝐼𝐵 16.67 μA circuit of Example 5-19
Value of 𝑅𝐶 can be calculated as,
𝑉𝐶𝐶 − 𝑉𝐶𝐸 12 V − 6 V
𝑅𝐶 = = ≈ 3 kΩ
𝐼𝐶 2 mA
The designed base bias circuit is shown in Fig.5-54.
Comments: Here, the operating point will be at the middle of the load-line. The gain of an amplifier
depends on 𝑅𝐶 . To increase the value of 𝑅𝐶 , we can decrease the value of 𝐼𝐶 to 1 mA, and 𝑉𝐶𝐸 =
2 V, as this type of biasing circuit is used as small signal amplifier.

5.23 Emitter Bias Circuit Design

The design procedure of emitter bias circuits is almost similar to that of base bias circuits except to
determine the level of emitter voltage and hence the value of 𝑅𝐸 . The values of collector current
Chapter 5: BJT Biasing Circuits 57

should be decided by the current drawn by the load. To keep the voltage gain unchanged, 𝐼𝐶 should
be very large compared to load current (2 to 10 times). But, if the values of 𝐼𝐶 and 𝐼𝐿 are unknown,
𝐼𝐶 can be set in the range of 1 mA to 5 mA. Once 𝐼𝐶 is decided, next we have to determine the
values of 𝑉𝐸 and 𝑉𝐶𝐸 . Well, a larger value of 𝑉𝐸 will result in a larger value of 𝑅𝐸 and a larger 𝑅𝐸
provides better stability. Question is how large should we set the value of 𝑉𝐸 . A larger value of
𝑉𝐸 or 𝑅𝐸 produces smaller AC voltage swing across the load resistor 𝑅𝐶 . Therefore, we can achieve
stability at the cost of voltage gain. As the target of the

VCC
𝑉𝐶𝐶 − 𝑉𝐵𝐸
𝑅𝐵 = − (𝛽 + 1)𝑅𝐸 𝑉𝐶𝐶 − 𝑉𝐸
𝐼𝐵 RC 𝑅𝐶 =
RB
2𝐼𝐶
IC
IB
𝑉𝐶𝐶 − 𝑉𝐸
𝐼𝐶 𝑉𝐶𝐸 = (or given)
𝐼𝐵 = VBE 2
𝛽
IE
𝑉𝐸
RE 𝑅𝐸 =
𝐼𝐸

Fig.5-61: Emitter bias circuit design

biasing circuit is to provide voltage amplification, we must trade-off between the stability and the
voltage gain. A thumb rule is to allocate more or less one-fourth [intuitively said by experience] of
the supply voltage to the emitter, that is 𝑉𝐸 ≈ 𝑉𝐶𝐶 /4. The rest of the voltage should be equally
divided between 𝑉𝐶𝐸 and 𝑉𝑅𝐶 . Now the values of 𝑅𝐶 and 𝑅𝐸 can easily be calculated by dividing
their voltages by their current. Next by dividing 𝐼𝐶 by 𝛽, the value of 𝐼𝐵 can be calculated. Using this
𝐼𝐵 , 𝑅𝐵 can be found solving the equation of base current. The equations required to design a
emitter bias circuit are shown in Fig.5-61. To make the concept clear, refer to the Example 5-20.

Example 5-21
Design an emitter bias circuit that will be operated by a supply voltage of 𝑉𝐶𝐶 = 20 V. Assume that
the transistor has the current gain of 150.
VCC = 20 V
Solution:
RB RC 4.3 k
Let, 𝐼𝐶𝑄 = 2 mA 1.2 M IC = 2.1 mA
𝑉𝐶𝐶 20 V IB
and, 𝑉𝐸 = = = 2.5 V VCE = 8.5 V
8 8 14 A
𝑉𝐸 2.5 V 2.5 V IE
∴ 𝑅𝐸 = ≈ = = 1.25 kΩ RE
𝐼𝐸 ICQ 2 mA 1.2 k
VE = 2.5 V

Use 𝑅𝐸 = 1.2 kΩ (standard).

𝐼𝐶𝑄 2 mA Fig.5-62: Emitter bias circuit
𝐼𝐵𝑄 = = ≈ 13.3333 μA
𝛽 150 designed in Example 5-20
Chapter 5: BJT Biasing Circuits 58

𝑉𝐶𝐶 − 𝑉𝐵𝐸 20 V − 0.7 V

𝑅𝐵 = − (𝛽 + 1)𝑅𝐸 = − (150 + 1) × 1.2 kΩ ≈ 1.27 MΩ
𝐼𝐵 13.3333 μA
Use 𝑅𝐵 = 1.2 MΩ standard. Actual value of 𝐼𝐵 will be
𝑉𝐶𝐶 − 𝑉𝐵𝐸 20 V − 0.7 V
𝐼𝐵𝑄 = = ≈ 14 μA
𝑅𝐵 + (𝛽 + 1)𝑅𝐸 1.2 MΩ + (150 + 1)1.2 kΩ
The value of actual 𝐼𝐶𝑄 = 14 μA × 150 ≈ 2.1 mA.
𝑉𝐸 = 1.2 kΩ × 2.1 mA ≈ 2.5 V
1 1
∴ ∴ 𝑉𝐶𝐸 = 𝑉𝑅𝐶 = (𝑉𝐶𝐶 − 𝑉𝐸 ) = (20 V − 2.5 V) = 8.75 V
2 2
Let, 𝑉𝐶𝐸 = 8.5 V and 𝑉𝑅𝐶 = 9 V
𝑉𝑅𝐶 9V
∴ 𝑅𝐶 = = ≈ 4.3 kΩ
𝐼𝐶𝑄 2.1 mA
The designed circuit is shown in Fig.5-56.
Comments: Here, we have considered 𝑉𝐸 = 2.5 V, but if the swing of the amplified signal is small
we can assign more voltage at emitter terminal for better stability.

5.24 Collector-to-Base Bias Circuit Design

The design procedure of collector-to-base bias circuits is almost similar to that of base bias circuits.
But the voltage and current levels are different for calculating 𝑅𝐵 and 𝑅𝐶 . So, different equations
have to be used to calculate their values. As found earlier, for this circuit the voltage across 𝑅𝐵 is
𝑉𝐶𝐸 − 𝑉𝐵𝐸 and the current through 𝑅𝐶 is 𝐼𝐵 + 𝐼𝐶 . The design equations are shown in Fig.5-63. To
make the concept clear, refer to the Example 5-21.
VCC
𝑉𝐶𝐸 − 𝑉𝐵𝐸 IB+IC 𝑉𝐶𝐶 − 𝑉𝐶𝐸
𝑅𝐵 = RC 𝑅𝐶 =
𝐼𝐵 𝐼𝐶 + 𝐼𝐵
IB
IC
RB
𝐼𝐶 𝑉𝐶𝐶
𝐼𝐵 = IB 𝑉𝐶𝐸 = (or given)
ℎ𝐹𝐸 2
VBE
IE

Fig.5-63: Collector-to-base bias circuit design

Example 5-22
Design a collector-to-base bias circuit to have 𝑉𝐶𝐸 = 12 V and 𝐼𝐶 = 5 mA. Assume that the supply
voltage is 20 V and the transistor has 𝛽 = 120.
Chapter 5: BJT Biasing Circuits 59

Solution:
𝐼𝐶 5 mA VCC = 20 V
𝐼𝐵 = = ≈ 41.67 μA
𝛽 120 RC
IB+IC
The value of collector resistor can be found as, 1.6 k
𝑉𝐶𝐶 − 𝑉𝐶𝐸 20 V − 12 V IB
𝑅𝐶 = = ≈ 1.6 kΩ RB IC = 5 mA
𝐼𝐶 + 𝐼𝐵 5 mA + 41.67 μA 270 k
IB
Now, the value 𝑅𝐵 can be calculated as, VCE = 12 V
41.67 A
VBE
𝑉𝐶𝐸 − 𝑉𝐵𝐸 12 V − 0.7 V IE
𝑜𝑟, 𝑅𝐵 = =
𝐼𝐵 41.67 μA
𝑜𝑟, 𝑅𝐵 ≈ 271.18 kΩ (use standard 270 kΩ) Fig.5-64: Collector-to-base bias
circuit for Example 5-21
The designed circuit is shown in Fig.5-58.
Comments: Here larger voltage has been assigned to 𝑉𝐶𝐸 , so the value of 𝑅𝐶 is found lower.

5.25 Voltage Divider Bias Circuit Design

The design procedure of voltage divider bias circuit is almost similar to that of emitter bias circuits
except the calculation of 𝑅1 and 𝑅2 . Here also, the value of collector current should be decided
depending on the current drawn by the load. To keep the voltage gain unchanged, 𝐼𝐶 should be
very large compared to load current (2 to 10 times). If the values of 𝐼𝐶 and 𝐼𝐿 are unknown, 𝐼𝐶 can
be set as before, i.e., in the range of 1 mA to 5 mA. Determination process of 𝑉𝐸 is discussed in
emitter bias circuit design. The same concept can be applied here. That is, 𝑉𝐸 ≈ 𝑉𝐶𝐶 /8. The rest of
the voltage should be equally divided between 𝑉𝐶𝐸 and 𝑉𝑅𝐶 . Values of 𝑅𝐶 and 𝑅𝐸 can be calculated
simply from Ohm’s law. Next by dividing 𝐼𝐶 by 𝛽, the value of 𝐼𝐵 can be calculated. The base voltage
will be 𝑉𝐵 = 𝑉𝐸 + 𝑉𝐵𝐸 .

VCC
𝑉𝐶𝐶 − 𝑉𝐵
𝑅1 = 𝑉𝐶𝐶 − 𝑉𝐸
𝐼2 IC RC 𝑅𝐶 =
R1 2𝐼𝐶

IB
𝑉𝐶𝐶 − 𝑉𝐸
𝐼2 = 10 𝐼𝐵 𝑉𝐶𝐸 =
I2 VBE 2

R2 VB
IE RE 𝑉𝐶𝐶
𝑉𝐶𝐶 − 𝑉𝐵 𝑉𝐸 =
𝑅2 = 8
𝐼2

Fig.5-65: Voltage divider bias circuit design

The values of 𝑅1 and 𝑅2 should be as small as possible to keep 𝑉𝐵 constant. Moreover, smaller
values of 𝑅1 and 𝑅2 ensure better stability. But, too small 𝑅1 and 𝑅2 cause two problems. One is
Chapter 5: BJT Biasing Circuits 60

loss of power, and the other is the lower input resistance. Hence, here we have to make another
trade-off. There are a lot of processes to calculate 𝑅1 and 𝑅2 , that produce satisfactory results. We
can assume,
𝐼𝐶
𝐼2 ≥ 10𝐼𝐵𝑄 𝑜𝑟, 𝐼2 =
10
𝛽𝑅𝐸
𝑜𝑟, 𝑅2 ≤
10
Using the values of 𝑉𝐵 and 𝐼2 , 𝑅2 can be calculated. Voltage across 𝑅1 will be 𝑉𝐶𝐶 − 𝑉𝐵 and its
current can also be assumed approximately 𝐼2 . Using these value 𝑅1 can be calculated. The
equations required to design a voltage divider bias circuit are shown in Fig.5-65. To make the
concept clear, refer to the Example 5-22.

Example 5-23
Design a voltage divider bias circuit considering the supply voltage 16 V and the transistor has 𝛽 =
100.
VCC = 16 V
Solution:
IC RC
Let, 𝐼𝐶𝑄 = 2 mA and R1 3.6 k
𝑉𝐶𝐶 16 V 62 k 1.9 mA
𝑉𝐸 = = =2V VCE = 7.5 V
8 8 𝛽 = 100
𝑉𝐶𝐶 − 𝑉𝐸 16 V − 2 V IB
𝑉𝐶𝐸 = 𝑉𝑅𝐶 = = =7V VE = 1.86 V
2 2 R2
13 k IE RE
𝑉𝐸 𝑉𝐸 2V 1k
∴ 𝑅𝐸 = = = = 1 kΩ
𝐼𝐸 𝐼𝐶𝑄 2
𝑉𝑅𝐶 7 V
𝑅𝐶 = = = 3.5 kΩ use standard 3.6 kΩ Fig.5-66: Voltage divider bias
𝐼𝐶𝑄 2 circuit designed in Example 5-22
𝑉𝐵 = 𝑉𝐸 + 𝑉𝐵𝐸 = 2 V + 0.7 V = 2.7 V
𝐼𝐶𝑄 2 mA
Let, 𝐼2 = = = 0.2 mA
10 10
𝑉𝐵 2.7 V
∴ 𝑅2 = = = 13.5 kΩ use standare 13 kΩ
𝐼2 0.2 mA
2.7 V
Actual 𝐼2 will be 𝐼2 = ≈ 0.208 mA
13 kΩ
𝑉𝐶𝐶 − 𝑉𝐵 16 V − 2.7 V
𝑅1 = = ≈ 64 kΩ use standared 62 kΩ
𝐼2 0.208 mA
The designed circuit is shown in Fig.5-66.
Comments: The actual value of 𝐼1 can be calculated as 𝐼2 + 𝐼𝐶𝑄 /𝛽.
Chapter 5: BJT Biasing Circuits 61

5.26 Biasing Circuit for Common Base Amplifier

We have already learnt that in com mon-base amplifier, the input signal is applied to the emitter
and base terminals and the output is taken from collector and base as shown in Fig.5-67(a). That is,
the base is common to both the input and output circuit. The base-emitter junction is forward
biased by 𝑉𝐸𝐸 and 𝑅𝐸 and the collector-base junction is reverse biased by 𝑉𝐶𝐶 and 𝑅𝐶 . To prevent
the loading effect on the DC biasing condition, the input source and the output load are connected
through two coupling capacitors. In electronics, these amplifiers have some special applications,
because they have very small input impedance and very large output impedance and provide
maximum voltage gain among all three conbinations.
-VEE +VCC

RE RC
C1 IE IC C2 C1 IE IC C2

VBE VBE
RE RC
vi RL vo vi RL vo
IB IB
VEE VCC

(a) (b)
+VCC +VCC

IC RC IC RC
C2 R1 C2

IB C3 IB
RL vo RL vo
C1 C1

R2
IE RE Vin IE RE Vin

-VEE
(c) (d)
Fig.5-67: Biasing circuit for common–base amplifier, (a) Using two separate voltage source,
(b) and (c) Same circuit represented alternately, (d) Voltage divider bias for CB amplifier.
The circuit of Fig.5-67(a) can easily be redrawn as in the Fig.5-67(b) and (c). Thus, using a split
voltage source a CB amplifier can be biased as shown in Fig.5-67(c). This circuit is exactly same as
emitter bias or emitter current bias with 𝑅𝐵 = 0. However, we can also bias this circuit using a
single voltage source as in Fig.5-67(d). In this circuit, the base is at a higher potential than the
emitter which will be determined by 𝑅1 and 𝑅2 as CE voltage divider bias circuit. But, for the AC
signal the base will be at the ground potential. In common base amplifier, the output current (𝐼𝐶 ) is
related to the input current (𝐼𝐸 ) by 𝛼. The value of 𝛼 is almost constant (≈ 1). Hence, the biasing
circuit of CB amplifier is completely 𝛽 independent.
Now, applying KVL in the input circuit (B-E loop in Fig.5-68(a), we get,
Chapter 5: BJT Biasing Circuits 62

C-E loop
IE IC VCE
IE
VBE IE IC
RE RC
RE RC
B-E
loop IB IB
VEE VCC
VEE VCC

(a) VCE
IE IC (b)
IC
VBE VCB
RE RC
B-C-E IB B-C
VEE loop loop VCC

(c)
Fig.5-68: KVL applied to different loops of CB circuit (a) B-E loop,
(b) C-E loop and, (c) B-C and B-C-E loops

−𝑉𝐵𝐸 − 𝐼𝐸 𝑅𝐸 + 𝑉𝐸𝐸 = 0
𝑉𝐸𝐸 − 𝑉𝐵𝐸
∴ 𝐼𝐸 = (5-94)
𝑅𝐸
Again, applying KVL in the C-E loop of Fig.5-68(b), we get,
𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 − 𝑉𝐶𝐸 − 𝐼𝐸 𝑅𝐸 + 𝑉𝐶𝐶 = 0
𝑜𝑟, 𝑉𝐸𝐸 + 𝑉𝐶𝐶 − 𝐼𝐶 (𝑅𝐶 + 𝑅𝐸 ) − 𝑉𝐶𝐸 = 0[∵ 𝐼𝐸 ≈ 𝐼𝐶 ]
∴ 𝑉𝐶𝐸 = (𝑉𝐸𝐸 + 𝑉𝐶𝐶 ) − 𝐼𝐶 (𝑅𝐶 + 𝑅𝐸 ) (5-95)
Applying KVL around the transistor, i.e., C-E-B loop in Fig.5-68(c), we get
𝑉𝐶𝐵 − 𝑉𝐶𝐸 + 𝑉𝐵𝐸 = 0
∴ 𝑉𝐶𝐵 = 𝑉𝐶𝐸 − 𝑉𝐵𝐸 (5-96)
Again, from the output circuit [B-C loop of Fig.5-68.(c)] we get,
𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 − 𝑉𝐶𝐵 = 0
∴ 𝑉𝐶𝐵 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 (5-97)
In case of single power supply [Fig.5-67(d)], if we draw the DC equivalent circuit (all the capacitors
open), then we will get the voltage divider biasing circuit as before. So, by using the equations of
previous analysis, we can solve this circuit of CB configuration.
To see the variation of output voltage and current, we draw the load line on the output
characteristic curve. For common-base configuration, we have seen in Chapter 4, the output
characteristics is a 𝐼𝐶 versus 𝑉𝐶𝐵 graph. Hence, the load line of CB amplifier has to be drawn using
Equ.(5-95). From Equ.(5-95), we get,
Chapter 5: BJT Biasing Circuits 63

𝑉𝐶𝐵 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 (5-98)

When, 𝐼𝐶 = 0, 𝑉𝐶𝐵 = 𝑉𝐶𝐶 : this is represented as point 𝐴 and lies on 𝑥-axis.
When, 𝑉𝐶𝐵 = 0, 𝐼𝐶 = 𝑉𝐶𝐶 /𝑅𝐶 : this point is represented by 𝐵 and lies on 𝑦-axis.
By joining these two points, the load line can be drawn.

Example 5-24
For the biasing circuit of common-base configuration in Fig.5-69, determine the load line and the
operating point.

+9 V IC (mA)
RC
IC
3k C2
B Load line
3
VCB Q-point
IB
𝛽 = 100 RL
C1 2 IE = 1.63 mA

RE 1 IC  1.63 mA
IE vi
5.1 k VCB = 4.12 V
0 A
-9 V
0 2 4 6 8 9 10 VCB (V)
Fig.5-69: CB circuit for Example 5-23 Fig.5-70: Load line and Q-point for Example 5-23

Solution:
Though the circuit has both positive and negative voltage, load line will use the positive one. So it
will start from point 𝐴(9 V, 0) on 𝑥-axis, and will end at point 𝐵(0, 9 V/3k) = (0, 3 mA) on 𝑦-axis.
It is shown in Fig.5-70.
Using Equ.(5-94) the emitter current is,
𝑉𝐸𝐸 − 𝑉𝐵𝐸 6 V − 0.7 V
𝐼𝐸 ≈ 𝐼𝐶 = = ≈ 1.63 mA
𝑅𝐸 5.1 kΩ
Using Equ.(5-95), the collector-base voltage will be,
𝑉𝐶𝐵 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 = 9 V − 1.63 mA × 3 kΩ = 4.12 V
Comments: Swing of the Q-point will be limited by the value of 𝑉𝐶𝐶 . 𝑉𝐸𝐸 will only forward bias the
input circuit.

5.27 Biasing Common Base Circuits Using PNP Transistor

The same biasing circuits can be used for PNP transistors. Only the supply voltage has to be
reversed. For PNP transistors, the emitter has to be connected to higher potential and the collector
to the lower potential. The base should be at higher potential than the collector and lower
potential than the emitter. This can be easily done by either a split voltage source as in Fig.5-65 (a)
or by using a single-ended voltage source as in Fig.5-65(b). Fig.5-65(a) is emitter bias and the Fig.5-
Chapter 5: BJT Biasing Circuits 64

65(b) is the voltage divider bias. All the equations derived for the NPN transistor can also be used
to analyze these circuits.

-VCC +VCC

IC RC IE RE
C2 R1 C1

IB C3 IB
RL vo vi
C1 C2

R2
IE RE vi IC RC RL vo

VEE
(a) (b)

Fig.5-71: Biasing of PNP transistors in CB configuration, (a) Emitter bias with a split
voltage supply, (b) Voltage divider bias with a single source

Example 5-25
Design a common-base amplifier with emitter bias using a PNP transistor of ℎ𝐹𝐸 = 150. Assume
the supply voltage is ± 12 V.
-12 V
Solution: RC
3k IC
Let, 𝐼𝐶𝑄 = 2 mA ≈ 𝐼𝐸 C2
𝐼𝐶𝑄 2 mA
∴ 𝐼𝐵𝑄 = = ≈ 13.3333 μA IB
𝛽 150 𝛽 = 150 RL vo
Using Equ.(5-94), C1

𝑉𝐸𝐸 − 𝑉𝐵𝐸 12 V − 0.7 V

𝑅𝐸 = = ≈ 5.6 kΩ RE
𝐼𝐸 2 mA 5.6 k IE vi

From Fig.5-72, for the base-emitter circuit we can +12 V

write,
Fig.5-72: Designed circuit of Example 5-24
𝑉𝐸𝐸 − 𝑉𝐵𝐸
𝐼𝐵𝑄 =
𝑅𝐵 + (𝛽 + 1)𝑅𝐸

𝑉𝐸𝐸 − 𝑉𝐵𝐸
𝑜𝑟, 𝑅𝐵 = − (𝛽 + 1)𝑅𝐸
𝐼𝐵𝑄
12 V − 0.7 V
∴ 𝑅𝐵 = − (100 + 1) 3 kΩ ≈ 394 kΩ use standard 390 kΩ
20.0 μA
1 1
Let, 𝑉𝐶𝐵 = 𝑉𝑅𝐶 = (|𝑉𝐶𝐶 |) = 12 V = 6 V
2 2
Chapter 5: BJT Biasing Circuits 65

𝑉𝑅𝐶 6V
∴ 𝑅𝐶 = = ≈ 3 kΩ
𝐼𝐶𝑄 2 mA
The designed circuit is shown in Fig.5-72.
Comments: The output voltage of this circuit is 𝑉𝐶𝐵 . Here, 𝑉𝐶𝐶 is divided between 𝑉𝐶𝐵 and 𝑅𝐶 .

5.28 Biasing Circuits for Common Collector Amplifier

In Chapter 3, we have seen how to bias a transistor in common-collector configuration using two
voltage sources. That biasing circuit is redrawn in Fig.5-73(a). Here, the voltage sources 𝑉𝐵𝐵 and
𝑉𝐸𝐸 with two series resistors (𝑅𝐵 and 𝑅𝐸 ) are used to bias the transistor. The input signal (𝑣𝑖 ) is
applied to the base through a coupling capacitor 𝐶1 and the output is taken from the emitter
through another coupling capacitor 𝐶2. The collector is common to both the input and output
circuits. Fig.5-73(b) is just the alternate representation of the first figure.
If we carefully look at the Fig.5-73(a) and (b), we find that the base current is flowing from the
negative terminal to the base of the transistor. We know that conventional current cannot flow
from the negative terminal of a source. But, here it is possible because −𝑉𝐵𝐵 will be comparatively
at higher potential than – 𝑉𝐸𝐸 . We know that the base of this circuit should be at higher potential
then the emitter. Instead of using – 𝑉𝐸𝐸 , if we connect the base terminal to ground through a
resistor, then we will find the same result, as ground is in higher potential than – 𝑉𝐸𝐸 . Hence, we
can represent the circuit of Fig.5-73(b) as in Fig.5-73(c).
C2 -VBB -VEE
IE
vo
C1 IB VBE IE RE
IB RB
vi VCE RE vo
VBE
VCB
IB RB vi VCE
VEE IB
IC VCB
VBB
IC
(a) (b)
VCC
IC IC
RB
VCB VCB
vi IB
VCE vi VCE
VBE IB VBE
RB vo vo
IE RE IE RE
-VEE
(c) (d)
Fig.5-73: Biasing circuit for common–collector amplifier, (a) Using two separate voltage sources,
(b) Same circuit represented alternately, (c) CC biasing circuit using negative voltage and (d) CC
biasing circuit using positive voltage
Chapter 5: BJT Biasing Circuits 66

Alternately, we can keep the base and collector at higher potential than the emitter, by connecting
the positive terminal of a voltage source to the base and collector and the ground of the source to
the emitter as shown in Fig.5-73(d). Finally, we can say
VCC
that the circuit of Fig.5-73(c) is the common-collector
amplifier with negative biasing system and the circuit R1 IC
of Fig.5-73(d) is that with positive voltage system. C1 IB
Here, 𝑅𝐸 provides negative feedback and better C2
stability as discussed for emitter bias circuit. These two VCE
circuits are called emitter bias for CC configuration. As vi R2
IE RE RL vo
shown in Fig.5-74, voltage divider bias can also be used
for common-collector amplifier. For all of these biasing
circuits, a relation between the input and the output
voltage can be found, which is, Fig.5-74: Voltage divider bias for CC
𝑣𝑜 = 𝑣𝑖 − 𝑉𝐵𝐸 = 𝑣𝑖 − 0.7 V (5-99) configuration.

From this equation, we see that the output voltage is

slightly smaller than the input voltage. If we neglect the voltage drop of the base-emitter junction
(𝑉𝐵𝐸 ), we can say the output is equal to the input. That is the voltage gain of this amplifier is
(approximately) unity. For this reason, this circuit is called the voltage follower or emitter follower.
In spite of its unity voltage gain, it provides a very large current gain. The input impedance of this
amplifier is very high and the output impedance is low. Therefore, this amplifier is used at the final
stage of a system for impedance matching or current
amplification.
IC
Analysis of Fig.5-73(a) to (c), will result in the same
IB
equations. Applying KVL in the input circuit of Fig.5-73(c)
[redrawn in Fig.5-75(a)], we get VBE
IE
−𝐼𝐵 𝑅𝐵 − 𝑉𝐵𝐸 − 𝐼𝐸 𝑅𝐸 + 𝑉𝐸𝐸 = 0 RB B-E
loop RE
𝑜𝑟, −𝐼𝐵 𝑅𝐵 − 𝑉𝐵𝐸 − (𝛽 + 1)𝐼𝐵 𝑅𝐸 + 𝑉𝐸𝐸 = 0
𝑜𝑟, 𝐼𝐵 [𝑅𝐵 + (𝛽 + 1)𝑅𝐸 ] = 𝑉𝐸𝐸 − 𝑉𝐵𝐸
VEE (a)
|𝑉𝐸𝐸 | − 𝑉𝐵𝐸
∴ 𝐼𝐵 = (5-100)
𝑅𝐵 + (𝛽 + 1)𝑅𝐸
Value of output current will be, IC
IB
𝐼𝐸 = (𝛽 + 1)𝐼𝐵 (5-101) VCE
B-E
Applying Kirchhoff’s voltage law at the output circuit, we get IE loop
RB
[Fig.5-75(b)], RE
𝑉𝐸𝐸 − 𝑉𝐶𝐸 − 𝐼𝐸 𝑅𝐸 = 0
𝑜𝑟, 𝑉𝐶𝐸 = 𝑉𝐸𝐸 − 𝐼𝐸 𝑅𝐸 (5-102) (b) VEE

For the positive voltage system, Fig.5-73(d) the base current

Fig.5-75: Input and output loops of
will be, common collector circuit.
Chapter 5: BJT Biasing Circuits 67

𝑉𝐶𝐶 − 𝑉𝐵𝐸
∴ 𝐼𝐵 = (5-103)
𝑅𝐵 + (𝛽 + 1)𝑅𝐸
𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐸 𝑅𝐸 (5-104)
For the voltage divider biasing circuit, we have to find out the Thevenin’s equivalent circuit as
before and the equations will be,
𝐸Th − 𝑉𝐵𝐸
𝐼𝐵 = (5-105)
𝑅Th + (𝛽 + 1)𝑅𝐸
𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐸 𝑅𝐸 (5-106)
For common-collector configuration, we have seen in Chapter 3, the output characteristic is 𝐼𝐸
versus 𝑉𝐶𝐸 graph. Hence, the load line of CC amplifier can be drawn using Equ.(5-106)
𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐸 𝑅𝐸 (5-107)
When, 𝐼𝐸 = 0, 𝑉𝐶𝐸 = 𝑉𝐶𝐶 : this is represented by point 𝐴 and lies on 𝑥-axis.
When, 𝑉𝐶𝐸 = 0, 𝐼𝐸 = 𝑉𝐶𝐶 /𝑅𝐸 : this point is represented by 𝐵 and lies on 𝑦-axis [See Fgi.5-76(b)].
By joining these two points, we will find the load line.

Example 5-26
For the common-collector biasing circuit in Fig.5-76(a) determine the load line and operating point.

IE (mA)
3.0
IC B(0, 2.4 mA)
2.5
𝛽 = 150
2.0 Q-point
vi VCE
IB VBE 1.5 IBQ = 10.14 A
RB vo
510 k 1.0
RE IEQ=1.23 mA
IE
5k 0.5 VCEQ=5.87 V A(12 V, 0)
-12 V 0
0 2 4 6 8 10 12 14 VCE (V)
Fig.5-76(a): CC circuit for Example 5-25 Fig.5-76 (b): Load line and Q-point for Example 5-25

Solution:
Load line can be drawn by joining point 𝐴(12 V, 0) on 𝑥-axis, and point 𝐵(0,12 V/5 k) =
(0, 2.4 mA) on 𝑦-axis. It is shown in Fig.5-76(b).
Using Equ.(5-100) the base current is,
|𝑉𝐸𝐸 | − 𝑉𝐵𝐸 12 V − 0.7 V
𝐼𝐵𝑄 = = ≈ 10.1345 μA [Ans. ]
𝑅𝐵 + (𝛽 + 1)𝑅𝐸 510 kΩ + (120 + 1)5 kΩ
Using Equ.(5-101), the output current is,
𝐼𝐸𝑄 = (𝛽 + 1)𝐼𝐵 = (120 + 1)10.1345 μA ≈ 1.2262 mA [Ans. ]
Chapter 5: BJT Biasing Circuits 68

Using Equ.(5-102), the collector-emitter voltage will be,

𝑉𝐶𝐸 = 𝑉𝐸𝐸 − 𝐼𝐸 𝑅𝐸 = 12 V − (1.2262 mA)5 kΩ ≈ 5.87 V [Ans. ]
Comments: The process of determining load line and operating point of this circuit is same as those
for emitter bias circuit.

5.29 Common Collector Biasing Circuits for PNP Transistor

The emitter bias and the voltage divider bias discussed for CC NPN transistors can also be used for
CC PNP transistors. For PNP transistors, the emitter has to be placed at higher potential than the
other two terminals. This can easily be done by either a positive voltage system as in Fig.5-77(a) or
by using a negative voltage system as in Fig.5-77(b) and (c). Fig.5-77(a) and (b) are emitter bias and
Fig.5-77(c) is voltage divider bias. We can also use positive voltage system for the voltage divider
bias, connecting the ground of the source to upper terminal and the positive terminal to the lower
terminal as shown in Fig.5-78 of Example 5-26. All the equations derived for the NPN transistor can
also be used for the circuits with PNP transistors.

-VCC -VCC
IC IC R1 IC
RB
VCB VCB C1 IB
vi VCE vi VCE
C2
IB VBE IB VBE VCE
vo vo R2
RB vi
IE RE IE RE IE RE RL vo

VEE (c)
(a) (b)

Fig.5-77: Biasing of PNP transistors in CC configuration, (a) Emitter bias with positive
voltage supply, (b) Emitter bias with negative voltage supply, and (c) Voltage divider bias
with a negative voltage source

Example 5-27
VEE = 12 V
Design a common-collector amplifier with voltage
divider bias using a PNP transistor of ℎ𝐹𝐸 = 120. R1 IE 3 k
RE
Assume the supply voltage is 12 V. 39 k V1
I1 VBE

Solution:
IB RL vo
Let, vi R2 30 k IC
𝐼𝐸𝑄 ≈ 𝐼𝐶𝑄 = 2 mA
and,
1 Fig.5-78: Common collector circuit
𝑉𝐸 = 𝑉𝐶𝐶 = 6 V
2 designed in Example 5-26
Chapter 5: BJT Biasing Circuits 69

𝑉𝐸 6 mA
∴ 𝑅𝐸 = = = 3 kΩ
𝐼𝐸𝑄 2V
and 𝑉1 = 𝑉𝑅𝐸 + 𝑉𝐵𝐸 = (𝑉𝐶𝐶 − 𝑉𝐸 ) + 𝑉𝐵𝐸 = (12 V − 6 V) = 6 V + 0.7 V = 6.7 V
𝐼𝐶𝑄 2 mA
The value of base current will be 𝐼𝐵𝑄 = = ≈ 16.67 μA
𝛽 120
Let, 𝐼1 = 10𝐼𝐵𝑄 = 166.7 μA
𝑉𝐵 6.7 V
∴ 𝑅1 = = ≈ 40.2 kΩ use 39 kΩ standard
𝐼2 166.7 μA
𝑉𝐶𝐶 − 𝑉𝐵 12 V − 6.7 V
∴ 𝑅2 = = ≈ 29 kΩ use standard 30 kΩ
𝐼2 + 𝐼𝐵𝑄 166.7 μA + 16.67 μA
The designed circuit is shown in Fig.5-72.
Comments: In common collector biasing circuit, the emitter voltage should be half of the supply
voltage instead of one eighth as used for CE amplifier. Moreover, B-E junction will be forward
biased by the voltage across 𝑅1 not 𝑅2 .

5.30 Transistor as a Switch

So far varieties of biasing circuits for different configurations of transistors have been discussed.
The targets of these biasing circuits were to set the operating point of the transistor in the active
region, so that the circuit can be used as an amplifier. However, in some applications a BJT may be
used as a switch. Though for high power switching circuits, MOSFET (Metal-Oxide-Semiconductor.
Field Effect Transistor) is most suitable, for low power switching BJT is also used. When used as a
switch, a transistor is biased is such way that it can operate either in the cutoff region (OFF switch)
or in the saturation region (ON switch). For a switch, we want that the load will consume power but
the switch will consume zero power. How the transistor-switches consume ideally zero power
(practically very small power) will be described next with a circuit. As the common emitter
configuration gives both current gain and voltage gain, this configuration is mainly used as a switch.
The schematic diagram of a switching circuit is given in Fig.5-79(a). This circuit is like a fixed bias
configuration, but here the base resistor 𝑅𝐵 is not directly connected to the supply voltage 𝑉𝐶𝐶 ,
rather it is connected to the system that will drive the switch ON/OFF. Here, 𝑅𝐶 is the load for the
switch. The driving system may be any kind of controlling circuit like a microcontroller based
system, an Arduino system or a digital circuit or even and analog circuit. In our home, we use
manual switch, but the transistor is a voltage controlled switch. When the driving system, gives
high voltage (greater that 1 V), the B-E junction will be forward biased and current will flow through
the load. The circuit will be designed such a way that the transistor will be saturated, i.e., the value
of 𝑉𝐶𝐸 will be minimum (𝑉𝐶𝐸(𝑠𝑎𝑡) ≈ 0.2 𝑉) and the transistor will work as an ON switch. Almost the
full supply voltage will be dropped across the load, and it will be powered up. But if the driving
system provides low voltage (less than 0.5 V), the B-E junction will not be forward biased, and
hence, the transistor will work in the cutoff region and only the leakage current 𝐼𝐶𝐸𝑂 will flow
through the load. Almost the full supply voltage will be dropped across the transistor, i.e., 𝑉𝐶𝐸 =
Chapter 5: BJT Biasing Circuits 70

𝑉𝐶𝐶 . As the current is almost zero, the load will not get power. In this way, the transistor will
operate either in saturation or cutoff region as shown in Fig.5-79.

VCC = VL VCC = VL VCC = VL

IL = IC RL IC = 0 RL IC = IL RL

RB IB IB = 0 I B = I L /
vi VCE  0 vi = LOW vi = HIGH
VCE = VCC VCE = 0
or VCC RB RB
VBE VBE VBE
OFF switch ON switch
(a) (b) (c)

Fig.5-79: Switching action of transistor (a) Switching circuit, (b) Transistor is

open (OFF), and (c) Transistor of closed (ON).

If we neglect 𝑉𝐶𝐸(𝑠𝑎𝑡) and 𝐼𝐶𝐸𝑂 , when the transistor is ON, it carries maximum current but voltage
drop across it (𝑉𝐶𝐸 ) is zero, so the power loss by the transistor will be zero. On the other hand,
when the transistor is OFF, it drops the maximum voltage (𝑉𝐶𝐸 = 𝑉𝐶𝐶 ) but current through it is
zero. So the power loss in the transistor will be zero. However, note that for very high power
switching circuit, we have to used power transistor that has a metal body or plastic body with

IC (mA) IC (mA)
Q-point
Q-point (ON switch)
(ON switch)

Load line Load line

Q-point Q-point
(OFF switch) (OFF switch)
ICEO

VCE VCE(sat) VCE

(a) (V) (b) (V)
Fig.5-80: Load line of transistor switch (a) Ideal transistor, and (b) Practical switch

metal collector (TO-218, TO-220, TO-264 as shown in Chapter 3). In this case, the leakage current
and the saturation voltage produce a substantial amount of power loss. So we have to use heat sink
with the transistor. The heat sink is connected to the metal collector of the transistor. It absorbs
heat and keeps the transistor-temperature in tolerable range. Here, it is described how a transistor
can control power of a load (load ON/OFF). There is another application of a transistor switching
circuit which is called the inverter.
The inverter circuit is shown in Fig.5-81. Here, 𝑅𝐶 is not the load, rather the load is connected to
the collector as shown in the figure. Well, we will see its operation with a square-wave input at the
input terminal. When the input signal is high, the transistor will be ON and the output voltage will
Chapter 5: BJT Biasing Circuits 71

be almost zero (𝑣𝑜 = 𝑉𝐶𝐸(𝑠𝑎𝑡) ). Again, when the input voltage is low, the transistor will be OFF and
the output voltage will high (𝑣𝑜 = 𝑉𝐶𝐶 ). In this way, when the input is HIGH (logic 1) the output is
LOW (logic 0), and when the input is LOW (logic 0) the output is HIGH (logic 1) as shown in Fig.5-
81(b). Therefore, we find that the circuit just inverts the input signal- hence it is called inverter.

VCC vi
HIGH
IC + IL R C
IC IL LOW t
RB IB vo
vi vo  0.2 V
RL
or VCC HIGH

LOW t

(a) (b)
Fig.5-81 (a): Inverter circuit, (b) Input and output waveform.

5.31 Design of the Switch Circuit:

To design a power switch, we must know the specifications of the load, that is, its power and
voltage ratings (𝑃𝐿 and 𝑉𝐿 ). Dividing the rated power (𝑃𝐿 ) by the rated voltage (𝑉𝐿 ), we will get the
current consumed by the load (𝐼𝐿 ). The value of 𝑉𝐶𝐶 of the switching circuit will be equal to the
rated voltage (𝑉𝐿 ) of the load. Now we have to select a BJT, that has 𝑉𝐶𝐸(𝑚𝑎𝑥) ≥ 𝑉𝐶𝐶 and 𝐼𝐶(𝑚𝑎𝑥) ≥
𝐼𝐿 . To calculate the value of 𝐼𝐵 , ℎ𝐹𝐸(𝑚𝑖𝑛) has to be used. If we use the typical value of ℎ𝐹𝐸 the
transistor will not be saturated, if it is replaced by a transistor with lower ℎ𝐹𝐸 .
From the load current 𝐼𝐿 , base current has to be calculated as,
𝐼𝐿 𝐼𝐶 (5-
𝐼𝐵 = =
ℎ𝐹𝐸(𝑚𝑖𝑛) ℎ𝐹𝐸(𝑚𝑖𝑛) 108)
To calculate the base resistor, the HIGH voltage of the input signal has to be used,
𝑉𝑖𝑛(HIGH) − 𝑉𝐵𝐸 (5-
∴ 𝑅𝐵 =
𝐼𝐵 109)
For 𝑅𝐵 use the lower standard values, not the higher values, no matter which one are closest. If we
use the higher standard values the transistors will not be saturated and will cause unnecessary
power loss.
If the 𝑉𝐶𝐶 of a system is fixed, but the load needs lower voltage, then we have to use a resistor in
series with the load. Its value can be calculated as,
𝑉𝐶𝐶 − 𝑉𝐿 (5-
𝑅𝐶 =
𝐼𝐶 110)
But, remember this collector resistor will produce power loss. So this type of arrangement can be
used only in low power circuits.
Chapter 5: BJT Biasing Circuits 72

If any inductive load is used in the collector, a PN junction diode has to be used across the load as
shown in Fig.5-82. Otherwise, the induced voltage of the inductive load may destroy the transistor.

Example 5-28
A controlling circuit requires to ON/OFF a 220 V CFL light by a 12 V relay. If the output of the
controlling circuit is TTL standard, design a transistor switching circuit to drive the relay and draw
the schematic diagram of the full system.

Solution:
The controlling system will drive the transistor switch by TTL logic voltage, i.e., 2.5 V to 5.5 V in
HIGH level and 0 to 0.8 V in LOW level. The transistor will drive the relay and the relay will drive the
CFL lamp.
Let, 𝑉𝐶𝐶 = 𝑉𝐿 = 12 V and 𝐼𝐿 = 80 mA [typically a 12 V really needs 30 to 80 mA]
We need a transistor that has 𝑉𝐶𝐸(𝑚𝑎𝑥) ≥ 12 V and 𝐼𝐶(𝑚𝑎𝑥) > 80 mA.
VCC = 12 V
NO Neutral of
Pole 220 V AC
D1 Phase of
220 V AC
NC
IC
Controlling circuit RB IB
vi BC547
HIGH = 2.5 to 5.5 V  = 120
LOW = 0 to 0.8V 2.7 k
VBE

Fig.5-82: Light controlling circuit of Example 5-27

Small signal (low power) transistor like, BC547 has 𝑉𝐶𝐸(𝑚𝑎𝑥) = 45 V, 𝐼𝐶(𝑚𝑎𝑥) = 100 mA
and ℎ𝐹𝐸(𝑚𝑖𝑛) = 120. We can also use 2N2222 in place of BC547.
Normally
Closed (NC)
Pole or supply
Normally
Open (NO)
Solenoid/coil

(a) Photograph of relay (b) Relay with no casing

Fig.5-83: Photographs of relay

𝐼𝐶 80 mA
𝐼𝐵 = = = 0.6667 mA
ℎ𝐹𝐸(𝑚𝑖𝑛) 120
Chapter 5: BJT Biasing Circuits 73

𝑉𝑖𝑛(HIGH) − 𝑉𝐵𝐸 2.5 V − 0.7 V

𝑅𝐵 = = = 2.7 kΩ (is a standard value)
𝐼𝐵 0.6667 mA
The relay coil has to be connected to the collector and 𝑉𝐶𝐶 . One terminal of the CFL light has to be
connected to the normally open (NO) terminal of the relay and the other terminal to the neutral
line of the supply. The phase of the power line has to be connected to the pole of the relay. To
protect the transistor a diode has to be connected across the relay coil as shown in Fig.5-76.
Comments: Relay is an electromechanical switch that has been discussed in Chapter 1. In place of
the CFL any kind of load can be controlled using this circuit. Note that in calculating the base
resistance the minimum value of HIHG level has to be considered to ensure the saturation of the
transistor in ON state.

The inverter is used mainly for signal conditioning, so the required output current is comparatively
low. If the load current is known, use 𝐼𝐶 = 5 to 10 times of 𝐼𝐿 . If the load current is not known,
chose a collector current of 5 to 10 mA. The value of 𝑉𝐶𝐶 should be equal to HIGH logic value (e.g.,
for TTL it should be 5 V). As the values of 𝐼𝐶 and 𝑉𝐶𝐶 are low, any transistor can tolerate these
values. But here, the frequency of the transistor has to be large enough to follow the input signal.
The value of 𝐼𝐵 , and 𝑅𝐵 can be calculated using Equ.(5-108) and (5-109). The value of 𝑅𝐶 has to be
calculated as,
𝑉𝐶𝐶 (5-
∴ 𝑅𝐶 =
𝐼𝐶 111)
In selecting the value of 𝑅𝐶 , we have to use the higher standard values, not the lower values, no
matter which one is closest. If we use the lower standard values the transistors will not be
saturated as before.

Example 5-29
Design an inverter circuit to drive a 5 kΩ load that requires TTL logic levels. Assume ℎ𝐹𝐸(𝑚𝑖𝑛) =
100.
VCC = 5 V VCC = 5 V
RC IL RC
1 k 1 k
IC = 5 mA IL IC = 0 mA IL
R B IB vo  0.2 V R B IB = 0
vi RL RL 𝑉𝐶𝐶 𝑅𝐿
vi 𝑣𝑜 =
36 k 5 k or 4.17 V 5 k 𝑅𝐶 + 𝑅𝐿
36 k

(a) (b)

Fig.5-84: (a) Designed inverter of Example 5-28, (b) Output at HIGH state

Solution:
In TTL logic, the value of HIGH logic is 5.5 V to 2.5 V. So let, 𝑉𝐶𝐶 = 5 V.
Chapter 5: BJT Biasing Circuits 74

5V 5V
Load current, 𝐼𝐿 = = = 1 mA
𝑅𝐿 5 kΩ
Let, 𝐼𝐶 = 5 × 𝐼𝐿 = 5 mA
𝑉𝐶𝐶 5V
∴ 𝑅𝐶 = = = 1 kΩ
𝐼𝐶 5 mA
𝐼𝐶 (5 mA)
𝐼𝐵 = = = 50 μA
ℎ𝐹𝐸(min) 100
𝑉𝑖𝑛(HIGH) 2.5 V − 0.7 V
∴ 𝑅𝐵 = = = 36 kΩ
𝐼𝐵 50 μA
The designed circuit is shown in Fig.5-84.
Check for the HIGH logic level: When the transistor is OFF, according to the voltage divider rule the
load voltage will be
𝑉𝐶𝐶 × 𝑅𝐿 5 V × 5 kΩ
𝑉𝐿 = = ≈ 4.17 V > 3.5 V(checked)
𝑅𝐶 + 𝑅𝐿 1 kΩ + 5 kΩ
Comments: Smaller value of 𝐼𝐶 results in larger value of 𝑅𝐶 and reduces the HIGH state output
voltage. Whereas, very larger value of 𝐼𝐶 produces larger power loss and reduces the switching
speed. On the other hand, larger value of 𝑅𝐵 will results in unsaturation of the transistor and
produces power loss, while smaller value of 𝑅𝐵 will produce hard saturation and lower switching
speed.

5.32 Switching Circuit using PNP Transistor

Already we have studied that it is possible to ON/OFF the power of a load using an NPN transistor
[Fig.5-79(a)]. Here the load is connected to 𝑉𝐶𝐶 and collector of the transistor. But, sometimes it is
required that one terminal of the load must be connected to ground (grounded load). In that case
we have to design the switch using a PNP transistor instead of an NPN transistor. Such a switching

VEE
VEE
IE
B-E IE
VBE loop
RB VBE
Vin IB VCE  0 Vin
HIFH/ or VCC LOW VCE  0
RB IB
LOW
IC RL IC RL

(a) (b)
Fig.5-85: PNP transistor as a switch, (a) Switching circuit, and (b) B-E loop of the circuit.
Chapter 5: BJT Biasing Circuits 75

circuit is shown in Fig.5-85. Here, the load is connected to the collector and ground terminals and
the emitter is connected to supply voltage. The main difference of this switching circuit is, for the
LOW input voltage the load will be ON and for the HIGH input voltage the load will be OFF. Any
input voltage less than 𝑉𝐸𝐸 can turn the switch ON, but to turn the switch OFF the level of HIGH
input should be equal to 𝑉𝐸𝐸 . Here, also 𝑉𝐸𝐸 = 𝑉𝐿 and 𝐼𝐶 = 𝐼𝐿 . The value of 𝐼𝐵 will be 𝐼𝐶 /𝛽(𝑚𝑖𝑛).
From B-E loop of Fig.5-85(b), the value of the base resistor can easily be calculated as,
𝑉𝐸𝐸 − 𝑉𝐵𝐸
𝑅𝐵 = (5-112)
𝐼𝐵

5.33 Limitation of Transistor as High Power Switch

If the current requirement of the load is very
high, the 𝐼𝐶(𝑚𝑎𝑥) of the transistor should also be
very high as the load current flows through the VCC = 12 V
collector of the transistor. But a transistor with 198 W
higher (collector) current capacity has lower Load
IC = 15
value of 𝛽. For example TIP3055 transistor has Control circuit A
180 W
𝐼𝐶(𝑚𝑎𝑥) = 15 A, but its current gain (𝛽) is as low IB = 1.5 A
TIP3055
as 10. So if we design a 15 A switch using this
RB  = 10
transistor the value of base current will be 𝐼𝐵 = VBE
1.5 A. This base current will produce inefficiency
of the switching circuit. If the value of supply
voltage (𝑉𝐶𝐶 ) is 12 V, the load will consume
12 V × 15 A = 180 W, while the power drawn Fig.5-86: High power switch: 198 W is drawn
from the source will be 12 V × (15 + 1.5) A = from source, 180 W is used by load, 18 W loss in
198 W. That is, 18 W is lost is the switching the circuit
circuit as shown in Fig.5-86. This loss is due to the larger value of base current. For this reason, for
high power switching instead of BJT, power MOSFET is used (will be described later).

5.34 Transistor as a Current Source

We all use voltage source either
constant or variable. A constant VCC VEE
voltage source provides a fixed level of IE
voltage irrespective of the output VBE
RL IC = Io IB
current. That is, if we change the load RB
VCE
resistance the value of load current IB
will change but the voltage will remain VCE
fixed. A battery, a power supply are RB RL IC = Io
VBE
the examples of the constant voltage
source. On the other hand, in solving
problems of electrical currents, we use
Fig.5-87: Transistor used as a current source
current source or constant current
source. But do we know any source
Chapter 5: BJT Biasing Circuits 76

that can be used as a current source? Although, there are some current sources, like solar cell, they
are not common. However, a transistor can be used as a constant current source if properly biased.
For the common emitter configuration 𝐼𝐶 is the output current that flows through the load 𝑅𝐶 . The
variation of 𝑅𝐶 will not change the value of 𝐼𝐶 as it depends only on 𝐼𝐵 . Thus, we can say that a
transistor circuit can behave as a constant current source. Generally, it is necessary to connect one
terminal of the load to the current source and the other terminal to the ground. In that case, we
have to design a current source using a PNP transistor. The schematic diagram of a current source
is shown in Fig.5-87.

Example 5-30
For the constant current source of Fig.5-88, calculate the output current and output voltage.
Determine the maximum value of 𝑅𝐿 that can be used with this
current source. VEE = 12 V
IE
Solution: VBE
IB
The value of base current will be, 𝛽 = 120
𝑉𝐸𝐸 − 𝑉𝐵𝐸 12 V − 0.7 V
𝐼𝐵 = = ≈ 43.46154 μA RB
RL
𝑅𝐵 260 kΩ 260 k Io
100 
Here, the output current is the collector current and its value
will be,
𝐼𝑜 = 𝐼𝐶 = 𝛽𝐼𝐵 = 120 × 43.46154 μA ≈ 15.2154 mA [Ans. ]
The output voltage will be, Fig.5-88: Constant current
source for Example 5-30
𝑉𝑜 = 𝐼𝑜 𝑅𝐿 = (15.2154 mA) × 100 Ω = 1.52 V [Ans. ]
The circuit will work as constant current source, before being
saturated. Considering 𝑉𝐶𝐸(𝑠𝑎𝑡) = 0.5 V,
𝑉𝐸𝐸 − 𝑉𝐶𝐸(𝑠𝑎𝑡) 12 𝑉 − 0.5 V
𝑅𝐿 = = ≈ 756 Ω
𝐼𝑜 15.2154 mA
Comments: For very low value of 𝑅𝐿 , the value of 𝑉𝐶𝐸 will be high. In that case, the transistor will
dissipate a very high power. Hence, in designing this circuit the power rating of the transistor has to
be considered.

5.35 Trouble-Shooting of Transistor Bias Circuits

It is a very common fact in laboratory that a biasing circuit is constructed using a transistor, but the
circuit does not work. Then we have to find out the fault and make the circuit functioning. In
servicing an electronic circuit, we may also need to check whether a transistor is ok or not. In a
transistor circuit the supply voltage (𝑉𝐶𝐶 ) and the voltage levels at the transistor terminals
(𝑉𝐶 , 𝑉𝐵 , and 𝑉𝐸 ) are measured with respect to the ground terminal or negative terminal of the
supply source as shown in Fig.5-89. Generally, the circuits are constructed in bread board using
connecting wires (in laboratory). The connecting points of the bread board, the connecting wires,
resistors, supply source or even the transistor itself may cause the fault. For a faulty circuit
Chapter 5: BJT Biasing Circuits 77

different situations may found. We may not find any voltage at any terminal of the transistor. In
that case there must have an open-circuit. To find out the open-circuit, first connect a voltage
meter to the positive and negative terminals of the supply source. The voltmeter should read the
required voltage level for the transistor circuit. If not, fault is in the power supply. Then measure
the voltage at the positive point of the bread board, then to resistor-terminals which are connected
to the positive point of the bread board. Then check
whether the resistors are properly connected to the +VCC
transistor terminals. In this way, measure voltage
R1 IC RC
and proceed to the terminals of the transistor. If
any point does not give voltage reading, that point IB
is not connected to proper position. In this way, we VC 
can find out the location of the open circuit. If the 1/2 VCC
open circuit fault is cleared, we may get incorrect IE
R2 VB VE  1
voltage levels at transistor terminals. The reasons of RE
to 6 V
these inaccurate voltage levels depend on the types
of biasing circuits as described below.
 VE + 0.7V
5.35.1 Base Bias
Fig.5-89: For testing a bias circuit,
Fig.5-90 Illustrates typical error sources in a base terminal voltages should be measured
biased circuit. Normal voltage levels in a base bias with respect to ground or negative supply
circuit are 𝑉𝐵𝐸 ≈ 0.7 V, and 𝑉𝐶 approximately half
of 𝑉𝐶𝐶 or anywhere in the range of 2 V to (𝑉𝐶𝐶 −
2 V). If 𝑉𝐶 = 𝑉𝐶𝐶 as shown in Fig.5-90(a), it means that the transistor is open. Either 𝑅𝐵 is not
supplying base current or emitter terminal is not connected to the ground, or the transistor itself is
faulty (collector and emitter are open). Alternately, 𝑅𝐶 may be short. When 𝑉𝐶𝐸 ≈ 0, 𝑅𝐶 could be
of higher value than 𝑅𝐵 . Other possibilities are either the collector and emitter terminals are short
or 𝑅𝐶 is short.
VCC VCC
RC short
RB RC RC
RB short or RC open
Transistor RB
IC very small
RB open open
IB
IB
VBE VC = VCC Transistor VBE VC  0 V
short
E open

(a) (b)

Fig.5-90: Incorrect voltage levels of base bias circuit and their probable reasons, (a) Probable
reasons for 𝑉𝐶 = 𝑉𝐶𝐶 , and (b) Probable reasons for 𝑉𝐶 = 0

5.35.2 Emitter Bias

Some reasons for incorrect voltage levels across different terminals of a transistor in emitter bias
are shown in Fig.5-91. If 𝑉𝐶 = 𝑉𝐶𝐶 , the base resistor 𝑅𝐵 and emitter resistor 𝑅𝐸 may not be
properly connected (open). The device may be open or the collector resistor may be short
Chapter 5: BJT Biasing Circuits 78

circuited. The situation is same as depicted in Fig.5-91(a). If 𝑉𝐶 ≈ 0 or 𝑉𝐶𝐸 ≈ 0, 𝑅𝐵 may be short

or very small. Alternately, 𝑅𝐶 may be open or very large or the transistor may be internally short as
shown in Fig.5-91(b).
VCC VCC
RC short
RB RC RC RC open/
RB short or
RB Very large
IC Transistor very small
RB open open
IB
IB
VBE Transistor VBE VC  0 V
VC = VCC short VCE  0 V
RE open
RE
RE

(a) (b)
Fig.5-91: Inaccurate voltage levels of emitter bias circuit and their probable causes, (a) Probable
causes for 𝑉𝐶 = 𝑉𝐶𝐶 , and (b) Probable causes for 𝑉𝐶 = 0 or 𝑉𝐶𝐸 ≈ 0

5.35.3 Collector-base Bias

Some reasons for incorrect voltage levels across different terminals of a transistor in collector-to-
bias are shown in Fig.5-92. If 𝑅𝐵 is not connected properly, transistor will not conduct, so 𝑉𝐶 = 𝑉𝐶𝐶 .
Another reasons of 𝑉𝐶 = 𝑉𝐶𝐶 are emitter terminal is open and the transistor itself is open as shown
in Fig.5-92(a). If 𝑉𝐶 ≈ 0, the transistor is short or saturated. The reasons behind this are: 𝑅𝐵 my be
short or very low, or the collector and emitter terminals of the transistor may be short as shown in
Fig.5-92(b).
VCC VCC
RC short
RC RC

C open
RB IC Transistor RB short or RB
IB open very small
RB open
IB V VC  0 V
VBE VC = VCC Transistor BE
short
E open
(a) (b)

Fig.5-92: Incorrect voltage levels of collector-to-bias circuit and their probable reasons, (a)
Probable reasons for 𝑉𝐶 = 𝑉𝐶𝐶 , and (b) Probable reasons for 𝑉𝐶 ≈ 0

5.35.4 Voltage Divider Bias

Fig.5-93 shows some probable reasons for malfunctioning of a voltage divider bias circuit. If 𝑉𝐶 =
𝑉𝐶𝐶 , either 𝑅1 or 𝑅𝐸 might be open circuited. Alternately, 𝑅2 or 𝑅𝐶 might be short circuited. Even
the collector and emitter terminals of the transistor may be open circuited [Fig.5-93(a)]. If 𝑉𝐶 =
Chapter 5: BJT Biasing Circuits 79

0 𝑜𝑟 𝑉𝐶𝐸 ≈ 0 , 𝑅𝐶 and 𝑅2 might be open or very larger than the required values or collector and
emitter terminals of the transistor may be short circuited [Fig.5-93(b)].
VCC VCC
RC open/
RC short Very large
RC
R1 RC
Transistor R1 short R1 Transistor
R1 open open short

VC = VCC VC  0 V
R2 open
VCE  0 V
R2 short R2 RE open R2 RE
RE

(a) (b)
Fig.5-93: Inaccurate voltage levels of voltage divider bias circuit and their probable causes,
(a) Probable causes for 𝑉𝐶 = 𝑉𝐶𝐶 , and (b) Probable causes for 𝑉𝐶 = 0 or 𝑉𝐶𝐸 ≈ 0

5.36 Miscellaneous Biasing Circuits used with BJT

So far we have discussed four types of biasing circuits for different transistor configurations and
different types of transistors (NPN or PNP). Besides these biasing circuits, some other variations can
be used to improve some parameters of the circuits. Some of them are discussed here.
5.36.1 Voltage Feedback Biasing Circuit:
As shown in Fig.5-94, this is the combination of collector-to-base bias and emitter bias and called
collector-to-base bias with emitter feedback resistor. In this circuit, both the collector resistor and
the emitter resistor provide feedback for better stabilization.
The equations to calculate its operating point will be the VCC
combination of those of collector-to-base bias and emitter RC
bias. By applying KVL in the input circuit and output circuit vo
the equations can easily be found. The equations are given IB
RB I C
below.
IB
𝑉𝐶𝐶 − 𝑉𝐵𝐸 vi VCE
𝐼𝐵 = (5-113) VBE
𝑅𝐵 + (𝛽 + 1)(𝑅𝐶 + 𝑅𝐸 ) IE

𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 (𝑅𝐶 + 𝑅𝐸 ) (5-114) RE

If the total resistance of output circuit (𝑅𝐶 + 𝑅𝐸 ) of this

circuit and the collector resistance (𝑅𝐶 ) of collector-to-base Fig.5-94: Voltage feedback bias
bias is same, then the two biasing circuits provide the same
stability against the 𝛽 variation.
5.36.2 Emitter Bias with 𝑰𝑪𝑬𝑶 Compensation using Diode
Chapter 5: BJT Biasing Circuits 80

We know that with the increase in temperature, 𝐼𝐶𝐵𝑂 increases

VCC
and hence, 𝐼𝐶𝐸𝑂 increases more rapidly. This problem can be
overcome, up to a certain extend using a diode with different RB IC RC
biasing circuits. Fig.5-95 shows an emitter biasing circuit with IB
diode compensation. Look, the diode is connected in reverse VCE
bias polarity. So, normally it will draw a very small leakage IS VBE
current (or reverse saturation current) 𝐼𝑆 . With the increase in D1
temperature, the leakage current of the transistor (𝐼𝐶𝐵𝑂 ) will IE RE
increase and so does the reverse saturation current (𝐼𝑆 ) of the
diode. As 𝐼𝑆 increases the voltage drop across 𝑅𝐵 will increase
and hence 𝐼𝐵 decrease which is clear from Equ.5-115. If the Fig.5-95: 𝐼𝐶𝐵𝑂 compensated
temperature decreases, the base current adjustment will take
emitter bias
place in the same method.
Using KVL in the base circuit, we can write,
𝑉𝐶𝐶 − (𝐼𝐵 + 𝐼𝑆 )𝑅𝐵 − 𝑉𝐵𝐸 − 𝐼𝐸 𝑅𝐸 = 0
𝑉𝐶𝐶 − 𝑉𝐵𝐸 − 𝐼𝐸 𝑅𝐸 − 𝐼𝑆 𝑅𝐵
∴ 𝐼𝐵 = (5-115)
𝑅𝐵

5.36.3 Voltage Divider Bias with 𝑽𝑩𝑬 Compensation using Diode

As discussed earlier, 𝑉𝐵𝐸 decreases with the increase in temperature (2.5 mV/°C). Thus the base
current increases and shifts the operating point. This problem can be minimized using a diode in
voltage divider bias circuit as shown in Fig.5-96. Note that the diode is conned as forward biased.
VCC VCC

R1 IC RC R1 IC RC
IB IB
VCE VCE
D1 VBE D1 VBE
VB D2 VB
R2 IE RE R2 IE RE

Fig.5-96: 𝑉𝐵𝐸 compensated Fig.5-97: 𝑉𝐵𝐸 and 𝐼𝐶𝐵𝑂 compensated

voltage divider bias voltage divider bias

The value of base voltage (𝑉𝐵 ) for this circuit will be as given by Equ.5-116. If the base-emitter
voltage of the transistor (𝑉𝐵𝐸 ) changes with temperature, the forward voltage drop of the diode
(𝑉𝐷 ) will also change at the same rate. Thus, if the required voltage of the base-emitter junction
decreases due to temperature increase, according to Equ.5-116, the supply voltage will also
decrease and hence, the base current 𝐼𝐵 will remain constant.
𝑉𝐶𝐶 𝑅2
𝑉𝐵 = + 𝑉𝐷 (5-116)
𝑅1 + 𝑅2
Chapter 5: BJT Biasing Circuits 81

As shown in Fig.5-97, we can adopt both 𝑉𝐵𝐸 and 𝐼𝐶𝐵𝑂 compensation using two diodes.
5.36.4 Voltage Divider Bias with Zener Diode:
The emitter voltage (𝑉𝐸 = 𝐼𝐸 𝑅𝐸 ) of a biasing circuit provides negative feedback to compensate any
change of the collector current 𝐼𝐶 . The compensation will work better if the base voltage 𝑉𝐵
remains constant. In normal biasing circuit we try to do this, by flowing a very large current
compared to 𝐼𝐵𝑄 through the voltage divider network
(𝑅1 and 𝑅2 ). This can also be done by using a Zener VCC
diode. We have already known that a Zener diode can
R1 IC RC
give almost constant voltage. As shown in Fig.5-98, the
base voltage of the transistor will be equal to the Zener IB
break down voltage, i.e., 𝑉𝐵 = 𝑉𝑍 . In a Zener diode, for VCE
IZ VBE
𝑉𝑍 < 5 V, the breakdown mechanism is Zener
breakdown, while for 𝑉𝑍 > 5 V, the breakdown process VZ VB
IE RE
is avalanche breakdown. The Zener breakdown has the
negative temperature coefficient, while the avalanche
breakdown has positive temperature coefficient. Hence,
if 𝑉𝐵 = 𝑉𝑍 ≤ 5 V, 𝑉𝐵 will decrease with increase in Fig.5-98: Voltage divider bias
temperature as does 𝑉𝐵𝐸 . So, the Zener diode, used in using Zener diode.
the biasing circuit of Fig.5-98, will provide thermal
stabilization.

5.37 Multiple BJT Circuits

So far we have discussed different circuits with only a single transistor (BJT). In electronics, there
used some circuits with more than one transistor. Some of the common circuits are multistage
amplifier, cascode amplifier, Darlington pair, feedback pair, etc. Among these, multistage amplifier
will be discussed later in another chapter and other amplifiers are discussed here.
5.37.1 Cascode Amplifier
Cascode amplifier is a two-stage amplifier that consists of a common-emitter amplifier and a
common-base amplifier. As shown in Fig.5-99, the input signal is applied to the common-emitter
amplifier that drives the common-base amplifier. The output is taken from the common-base
amplifier. The main advantages of this amplifier is higher input impedance and higher output
impedance. It also provides better isolation between the input and output. As there is no coupling
between the input and output (by inter-electrode capacitance and resistance) it eliminates Miller
effect (will be discussed later). Thus, the cascode amplifier provides higher bandwidth.
Operation
The input signal is applied to the base of CE amplifier through coupling capacitor 𝐶1 and the output
is taken from the collector of CB amplifier through another capacitor 𝐶2. The base of the CB
amplifier is connected to ground by 𝐶3. As for the AC signal all the capacitors behave like a short
circuit, the base of CB amplifier can be considered connected to ground. Now due to the input AC
signal, the collector voltage of the CE amplifier will change which will also be applied to the emitter
Chapter 5: BJT Biasing Circuits 82

of the CB amplifier. The common-base amplifier will again amplifies this signal to the collector and
the load will get this amplified signal.

VCC VCC
IC2 RC IC2 RC
R1 C2 R1

C3 IB2 IB2
Q2 VCE2 RL vo Q2 VCE2
VB2
VBE2 VBE2
R2 R2
C1 IB1 IB1
Q1 VCE1 Q1 VCE1
VB1
VBE1 VBE1
vi R3 R3
IE1 RE CE Loop 1 IE1 RE Loop 2

(a) (b)
Fig.5-99 (a): Cascode amplifier, (b) DC equivalent circuit (with loops for KVL)

DC Analysis
The DC equivalent circuit of this amplifier can be drawn considering all the capacitors open which is
shown in Fig.5-99(b). To simplify the analysis we will assume that the values of 𝛽 of the transistors
are very high. So 𝐼𝐵1 and 𝐼𝐵2 will be very small and will be neglected. Alternately, if the current
flowing through the voltage divider network is quite larger than the transistors base currents, then
also 𝐼𝐵1 and 𝐼𝐵2 can be neglected. Using voltage divider rule, the values of base voltages will be,
𝑉𝐶𝐶 𝑅3
𝑉𝐵1 = (5-117)
𝑅1 + 𝑅2 + 𝑅3
𝑉𝐶𝐶 (𝑅3 + 𝑅2 )
and, 𝑉𝐵2 = (5-118)
𝑅1 + 𝑅2 + 𝑅3
As 𝐼𝐵1 and 𝐼𝐵2 are neglected, 𝐼𝐶2 ≈ 𝐼𝐸2 ≈ 𝐼𝐶1 ≈ 𝐼𝐸1 .
Now applying KVL to B-E loop [loop 1 in Fig.5-99(b)] of transistor 𝑄1,
𝑉𝐵1 − 𝑉𝐵𝐸1 − 𝐼𝐸1 𝑅𝐸 = 0
𝑉𝐵1 − 𝑉𝐵𝐸1
∴ 𝐼𝐸1 = (5-119)
𝑅𝐸
From the previous assumption, we can write
𝑉𝐵1 − 𝑉𝐵𝐸1
∴ 𝐼𝐶2 = 𝐼𝐸2 = 𝐼𝐶1 = (5-120)
𝑅𝐸
Again we can apply KVL starting from 𝑉𝐵2 up to ground [loop 2 in Fig.5-99(b)] as,
𝑉𝐵2 − 𝑉𝐵𝐸2 − 𝑉𝐶𝐸1 − 𝐼𝐸1 𝑅𝐸 = 0
Chapter 5: BJT Biasing Circuits 83

∴ 𝑉𝐶𝐸1 = 𝑉𝐵2 − 𝑉𝐵𝐸2 − 𝐼𝐸1 𝑅𝐸 (5-121)

Once 𝑉𝐶𝐸1 is known, 𝑉𝐶𝐸2 can be calculated as,
∴ 𝑉𝐶𝐸2 = 𝑉𝐶𝐶 − 𝑉𝐶𝐸1 − 𝐼𝐶 (𝑅𝐸 + 𝑅𝐶 ) (5-122)
If a split power supply is used, i.e., instead of ground if – 𝑉𝐸𝐸 is connected to the emitter of 𝑄1, we
have to add 𝑉𝐸𝐸 with 𝑉𝐶𝐶 as,
(𝑉𝐶𝐶 + 𝑉𝐸𝐸 )𝑅3
𝑉𝐵1 = (5-123)
𝑅1 + 𝑅2 + 𝑅3
(𝑉𝐶𝐶 + 𝑉𝐸𝐸 )(𝑅3 + 𝑅2 )
𝑉𝐵2 = (5-124)
𝑅1 + 𝑅2 + 𝑅3
𝑉𝐵1 + 𝑉𝐸𝐸 − 𝑉𝐵𝐸1
𝐼𝐸1 = (5-125)
𝑅𝐸
∴ 𝑉𝐶𝐸1 = 𝑉𝐵2 − 𝑉𝐵𝐸2 − 𝐼𝐸1 𝑅𝐸 (5-126)
∴ 𝑉𝐶𝐸2 = 𝑉𝐶𝐶 + 𝑉𝐶𝐸 − 𝑉𝐶𝐸1 − 𝐼𝐶 (𝑅𝐸 + 𝑅𝐶 ) (5-127)

Example 5-31
For the cascade amplifier of Fig.5-100, calculate the operating point of transistors. Assume 𝐼𝐵1 =
𝐼𝐵2 ≈ 0.
VCC =
24 V
IC2 RC
R1 4.7 k
13 k
IB2 C2
VB2
Q2 VCE2 RL
C3 vo
VBE2 33 k
R2
5.6k
IB1
Q1 VCE1
C1 VB1
VBE1
vi R3
5.6k RE
IE1 CE
2.7 k

Fig.5-100: Cascode amplifier for Example 5-31

Solution:
𝑉𝐶𝐶 𝑅3 24 V × 5.6 k
Using Equ.(5-117), 𝑉𝐵1 = = ≈ 5.55 V
𝑅1 + 𝑅2 + 𝑅3 13 k + 5.6 k + 5.6 k
𝑉𝐶𝐶 (𝑅3 + 𝑅2 ) 24 V × (5.6 k + 5.6 k)
Using Equ.(5-118), 𝑉𝐵2 = = ≈ 11.1 V
𝑅1 + 𝑅2 + 𝑅3 13 k + 5.6 k + 5.6 k
Chapter 5: BJT Biasing Circuits 84

𝑉𝐵1 − 𝑉𝐵𝐸1 5.55 V − 0.7 V

Using Equ.(5-119), 𝐼𝐸1 = = ≈ 1.796 mA ≈ 𝐼𝐶1 ≈ 𝐼𝐶2
𝑅𝐸 2.7 k
Using Equ.(5-121), 𝑉𝐶𝐸1 = 11.1 V − 0.7 V − 1.796 mA × 2.7 k
𝑜𝑟, 𝑉𝐶𝐸1 ≈ 5.55 V [Ans. ]
Using Equ.(5-122), 𝑉𝐶𝐸2 = 24 V − 5.55 V − 1.796 mA × (4.7 k + 2.7 k)
𝑜𝑟, 𝑉𝐶𝐸1 ≈ 5.16 V [Ans. ]
Comments: As the supply voltage (𝑉𝐶𝐶 ) has to bias two amplifiers connected in series, so its value
has to be higher compared to the supply voltage for a single stage amplifier.

5.37.2 Darlington Pair

To drive an output load, sometimes it is required to amplify an input current to a high output
current. In that case, CC amplifiers are used with a transistor with higher current capacity, i.e., very
high value of 𝐼𝐶(𝑚𝑎𝑥). But one problem is, a transistor with high current capacity has very low
current gain (as described in section 5-22). This
problem can be overcome by cascading a low power C
transistor (𝑄1) with a high power transistor (𝑄2 ) as IC IC1 + IC2
shown in Fig.5-101 (sometimes identical transistors
are also used). The arrangement is called Darlington IB1 = IB IC1
pair. As shown in the figure, the collectors of two B Q1 IC2
IC2
transistors are connected together, that work as the VBE1 I E1
IC2 IC2
collector of the combination (𝐶). The emitter of 𝑄1 is Q2
connected to the base of 𝑄2. The base of the first IB2 VBE2
transistor and the emitter of the second transistor are (a) Current direction Iof
C2
IE2 = IE
the base (𝐵) and the emitter (𝐸) of the Darlington individual transistor
pair, respectively. Darlington pair can be constructed IC2 E
by connecting two transistors or it is available as a C
single package. For example, TIP120 is a single I C

package that contains a Darlington pair.

IB 1
Now assuming proper biasing of the configuration, we Q1 2 D =12
will determine the overall current gain of the B +1+2
Q2
combination. Let us consider that a certain amount of VBED
current (𝐼𝐵 ) is flowing through the base of 𝑄1, i.e.,
(b) Current direction of IE
through 𝐵. If the current gain of the first transistor is the Darlington pair
𝛽1 and that of the second transistor is 𝛽2 , the value of E
𝐼𝐸1 and 𝐼𝐶1 will be, Fig.5-101: Darlington pair
𝐼𝐸1 = (𝛽1 + 1)𝐼𝐵 and 𝐼𝐶1 = 𝛽1 𝐼𝐵
From the circuit it is clear that 𝐼𝐸1 = 𝐼𝐵2. The collector current of 𝑄2 will be
𝐼𝐶2 = 𝛽2 𝐼𝐵2 = 𝛽2 𝐼𝐸1 = 𝛽2 (𝛽1 + 1)𝐼𝐵
Now the total current flowing through 𝐶 terminal is 𝐼𝐶1 + 𝐼𝐶2 . That is,
𝐼𝐶 = 𝐼𝐶1 + 𝐼𝐶2 = 𝛽1 𝐼𝐵 + 𝛽2 (𝛽1 + 1)𝐼𝐵
Chapter 5: BJT Biasing Circuits 85

𝑜𝑟, 𝐼𝐶 = 𝛽1 𝐼𝐵 + 𝛽2 𝛽1 𝐼𝐵 + 𝛽2 𝐼𝐵
𝑜𝑟, 𝐼𝐶 = (𝛽1 𝛽2 + 𝛽1 + 𝛽2 )𝐼𝐵
𝐼𝐶
∴ = (𝛽1 𝛽2 + 𝛽1 + 𝛽2 )
𝐼𝐵
Now if we consider the whole combination as a single transistor, its three terminal currents will be
𝐼𝐶 , 𝐼𝐵 and 𝐼𝐸 as shown in Fig.5-101(b). Thus, the current gain of the combination (𝛽𝐷 ) will be,
𝐼𝐶
𝛽𝐷 = = (𝛽1 𝛽2 + 𝛽1 + 𝛽2 ) (5-128)
𝐼𝐵
As 𝛽1 𝛽2 ≫ (𝛽1 + 𝛽2 ), generally we write 𝛽𝐷 ≈ 𝛽1 𝛽2 .
To calculate the emitter current of the combination (𝐼𝐸 ), we can write
𝐼𝐸 = 𝐼𝐸2 = 𝐼𝐵2 (𝛽2 + 1) = 𝐼𝐸1 (𝛽2 + 1) [∵ 𝐼𝐸1 = 𝐼𝐵2 ]
Putting the value of 𝐼𝐸1 , we get
𝐼𝐸 = (𝛽1 + 1)𝐼𝐵 (𝛽2 + 1) = (𝛽1 𝛽2 + 𝛽1 + 𝛽2 + 1)𝐼𝐵 VCC
𝐼𝐸 = (𝛽𝐷 + 1)𝐼𝐵 [same as a single transistor]
IC C
Generally, 𝑄1 will be a low power transistor, but its RB
maximum collector current capacity should be IB
1
sufficient to drive 𝑄2, i.e., 𝐼𝐶1(𝑚𝑎𝑥) ≥ 𝐼𝐶2(𝑚𝑎𝑥) /𝛽2. Q1 2
The drawbacks of this configuration is the higher C1 B D
Q2
base-emitter voltage, that is now, 𝑉𝐵𝐸𝐷 = 𝑉𝐵𝐸1 +
RS C2
𝑉𝐵𝐸2. Another disadvantage is that the saturation VBED
voltage. If a single transistor has a saturation voltage E
vi
of 0.2 V, the Darlington pair has a saturation voltage IE RE RL vo
of 0.7V.
The AC resistance seen at the emitter terminal of this
Darlington pair will,
Fig.5-102: Common collector amplifier
𝑟𝑒(𝐷) = 𝑟𝑒1 + 𝑟𝑒2 using Darlington pair
where, 𝑟𝑒1 ≈ 26 mV/𝐼𝐶1, and 𝑟𝑒2 ≈ 26 mV/𝐼𝐶2 (at
room temperature). If this resistance is seen from base of the Darlington pair, its value will be
𝛽1 (𝑟𝑒1 + 𝛽2 𝑟𝑒2 ). As 𝐼𝐶2 is very small, we can write 𝐼𝐶 ≈ 𝐼𝐶1 . Then, 𝑟𝑒2 ≈ 26 mV/𝐼𝐶 . It can be prove
that the total emitter resistance of the Darlington pair will be, 𝑟𝑒𝐷 = 2𝑟𝑒 = 2(26 mV/𝐼𝐶 ).
Although, Darlington pair can be used for any configuration, but it is most commonly used as a
common collector amplifier as shown in Fig.5-102 for power amplification or impedance matching.
This circuit is exactly same as that of Fig.4-67(d), except the Darligton pair. So the equations
derived for that circuit can be used here by replacing 𝛽 and 𝑉𝐵𝐸 by 𝛽𝐷 and 𝑉𝐵𝐸𝐷 . The required
expressions for DC analysis of this circuit will be as follows:
𝑉𝐶𝐶 − 𝑉𝐵𝐸𝐷
𝐼𝐵 =
𝑅𝐵 + (𝛽𝐷 + 1)𝑅𝐸
𝑉𝐶𝐶 − 𝑉𝐵𝐸1 − 𝑉𝐵𝐸2
𝑜𝑟, 𝐼𝐵 =
𝑅𝐵 + (𝛽𝐷 + 1)𝑅𝐸
Chapter 5: BJT Biasing Circuits 86

𝐼𝐶 = 𝐼𝐵 𝛽𝐷
𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐸 𝑅𝐸 = 𝑉𝐶𝐶 − (𝛽𝐷 + 1)𝐼𝐵 (5-129)

Example 5-32
Design a common-collector amplifier using a Darlington pair for 𝐼𝐶𝑄 = 1.5 A and 𝑉𝐶𝐸𝑄 = 12 V.
Assume the supply voltage is 24 V.

Solution:
As the quiescent current 𝐼𝐶𝑄 = 1.5 A, maximum current may be as high as 3 A. So 𝑄2 must be a
power transistor with 𝐼𝐶2(𝑚𝑎𝑥) ≥ 3 A. Let us use a 5 A transistor MJE105 with 𝛽𝑚𝑖𝑛 = 25. The
maximum base current of this transistor will be 𝐼𝐵2(𝑚𝑎𝑥) = 3𝐴/25 = 120 mA. Thus the maximum
collector current of 𝑄1 should be 𝐼𝐶1(𝑚𝑎𝑥) ≥ 120 mA. KSC1815YTA is 150 mA transistor with
𝛽(𝑚𝑖𝑛) = 25. Using these two transistors the current gain of the Darlington pair will be
𝛽𝐷 = 𝛽1 𝛽2 + 𝛽1 + 𝛽2 = 25 × 25 + 25 + 25 = 675 (minimum)
𝑉𝐸𝑄 = 𝑉𝐶𝐶 − 𝑉𝐶𝐸 = 24 V − 12 V = 12 V
𝑉𝐸𝑄 𝑉𝐸𝑄 12 𝑉
∴ 𝑅𝐸 = ≈ = =8Ω
𝐼𝐸𝑄 𝐼𝐶𝑄 1.5 𝐴
𝐼𝐶𝑄 1.5 𝐴
𝐼𝐵𝑄 = = ≈ 2.2222 mA
𝛽𝐷 675
𝑉𝐶𝐶 − 𝑉𝐵𝐸1 − 𝑉𝐵𝐸2
Using Equ.(5-105), 𝐼𝐵 =
𝑅𝐵 + (𝛽𝐷 + 1)𝑅𝐸
𝑜𝑟, 𝑉𝐶𝐶 − 𝑉𝐵𝐸1 − 𝑉𝐵𝐸2
𝑅𝐵 = − (𝛽𝐷 + 1)𝑅𝐸
𝐼𝐵
24 V − 0.7 V − 0.7 V
𝑜𝑟, 𝑅𝐵 = − (675 + 1) × 8 Ω ≈ 4.76 kΩ
2.2222 mA
Results: 𝑄1 = KSC1815YTA, 𝑄2 = MJE105 , 𝑅𝐸 = 8 Ω and 𝑅𝐵 = 4.7 kΩ (standard)
Comments: This amplifier can be used as a power amplifier, e.g., to drive an 8 Ω loud speaker.

5.37.3 Feedback Pair

Feedback pair is also known as a Sziklai pair according to George C. Sziklai who popularized the
configuration. It is also called the complementary feedback pair or complementary Darlington
pair. The arrangement is same as the Darlington pair, but here an NPN transistor and a PNP
transistor are used as shown in Fig.5-103. Interchanging the position of the PNP and the NPN
transistor, feedback pair can be constructed in two configurations as shown in Fig.5-103(a) and
Fig.5-103(b). Here, the collector of the first transistor drives the base of the second transistor.
Though Darlington pair is available in a single package, feedback pair is not. This arrangement has
the same advantage of high current gain. For the circuit of Fig.5-103(a), 𝛽𝑆 = 𝛽1 𝛽2 + 𝛽1 and for
that of Fig.5-103(b) 𝛽𝑆 = 𝛽1 𝛽2 + 𝛽1 + 1. It has one important difference from the Darlington pair.
Chapter 5: BJT Biasing Circuits 87

The value of 𝑉𝐵𝐸 of a feedback pair is just half of that Darlington pair. For Si transistor Darlington
pair 𝑉𝐵𝐸𝐷 ≈ 1.4 V, but for a feedback pair its value (𝑉𝐵𝐸𝑆 ) is 0.7 V, same as a single transistor. The
saturation voltage is also higher than a single transistor (≈ 0.7 V). Biasing of the circuit of Fig.5-
103(a) will be same as the Darlington pair. But the input side of the feedback pair

C C
IC = IE2 IC IE1 + IC2
VBE2
Q2  2 VBE1 IE1
IC2
IC1 = IB2 IC2 B Q1  1 IC2
IB1 = IB
IB1 = IB
B Q1  1 IC2 IC1= IB2
IC2
Q2  2
VBE1 IE1
IC2
IC2 VBE2
IC2 IC2
(a) NPN transistor driving IE = IE1+ IE2 (b) PNP transistor driving IE2 = IE
IC2 E E
the PNP transistor the NPN transistor

Fig.5-103: Feedback pair or Sziklai pair

of Fig.5-103(b) has to be biased as a PNP transistor, i.e., low input voltage to turn the pair ON. The
biasing circuit of feedback pair of Fig.5-103(b) is shown in Fig.5-104. The base resistor 𝑅𝐵 is
connected to ground instead of 𝑉𝐶𝐶 . The analysis procedure is same as Darlington pair, except
𝑉𝐵𝐸𝑆 = 0.7 V.
VCC
IC
VBES C

1
B
Q1  2 S
C1 IB
Q1
RS C2
RB E
vi
IE RE RL vo

Fig.5-104: Common collector

amplifier using Sziklai pair

5.38 Sample Questions

1. What is load line and operating point? Explain how the load line and operating point of a
transistor circuit can be determined.
2. Explain how the position of load line changes with the load resistance.
3. Explain how the position of load line changes with the change in supply voltage, 𝑉𝐶𝐶 .
4. Explain how the position of load line changes with the change in base circuit, 𝐼𝐵𝑄 .
Chapter 5: BJT Biasing Circuits 88

5. Explain how the operating point swings when an AC signal is applied to the input of a
properly biased transistor circuit.
6. Discuss how the cutoff and saturation region limit the swing of the operating point.
7. Why we try to set the DC operating point at the middle of the load line?
8. Explain the parameters of a transistor that are sensitive to temperature.
9. What is thermal runaway? Explain how thermal runaway may occur in transistor circuits.
10. What is stability factor? Define various types of stability factors.
11. Why biasing is necessary for transistors? Write the names of different types of transistor
biasing circuits.
12. Draw the schematic diagram of a fixed bias circuit and explain how we can determine its
operating point.
13. Derive the expression for the stability factor, 𝑆(𝐼𝐶𝐵𝑂 ), for the fixed bias circuit.
14. Draw the schematic diagram of a emitter bias circuit and explain how we can determine
its operating point.
15. Derive the expression for the stability factor, 𝑆(𝐼𝐶𝐵𝑂 ), for the emitter bias circuit.
16. Draw the schematic diagram of a collector-to-base bias circuit and explain how we can
determine its operating point.
17. Derive the expression for the stability factor, 𝑆(𝐼𝐶𝐵𝑂 ), for the collector-to-base bias circuit.
18. Draw the schematic diagram of a voltage divider bias circuit and explain how we can
determine its operating point.
19. Derive the expression for the stability factor, 𝑆(𝐼𝐶𝐵𝑂 ), for the voltage divider bias circuit.
20. Why there has less possibility for a transistor to operate in cutoff region in a biasing circuit,
due to wrong parameters and components selection.
21. Why there has more possibility for a transistor to operate in saturation region than cutoff
region in a biasing circuit, due to wrong parameters and components selection.
22. Explain how a resistance is feedback from emitter to base in a transistor circuit.
23. Explain how a resistance is feedback from base to emitter in a transistor circuit.
24. Draw the base bias circuit with a PNP transistor and explain how its operating point can be
determined.
25. Draw the collector feedback bias circuit with a PNP transistor and explain how its operating
point can be determined.
26. Draw the collector feedback bias circuit with a PNP transistor and explain how its operating
point can be determined using exact analysis and approximate analysis.
27. What is single polarity power supply and dual polarity power supply?
28. Draw the base bias circuit with split power supply and explain.
29. Draw the schematic diagram of emitter to base bias with split power supply and describe.
30. Draw the schematic diagram of collector to base bias with split power supply and describe.
31. Draw the schematic diagram of voltage divider bias circuit with split power supply and
determine its operating point using both exact method and approximate method.
32. Draw the schematic diagram of emitter current bias circuit and explain.
33. Describe the design procedure of i) base bias, ii) emitter bias, and iii) voltage divider bias
circuits.
34. Draw the biasing circuit of an NPN transistor in Common Base Configuration (CBC) and
describe.
Chapter 5: BJT Biasing Circuits 89

35. Draw the biasing circuit of a PNP transistor in Common Base Configuration (CBC) and
describe.
36. Draw the biasing circuit of an NPN transistor in Common Collector Configuration (CCC) and
describe.
37. Draw the biasing circuit of a PNP transistor in Common Collector Configuration (CCC) and
describe.
38. Explain how a transistor can be used as a power switch.
39. Explain how a transistor can be used as an inverter (A low power switch).
40. Explain the design procedure of a transistor switch.
41. When should we use a PNP transistor in a switching circuit? – Explain.
42. Explain the limitations of transistor switch for high power controlling.
43. Draw the circuit diagram of a constant circuit source using BJT and explain.
44. In trouble shooting a fixed biased BJT circuit, the transistor is found open (𝑉𝐶𝐸 = 𝑉𝐶𝐶 ).
What are the probable regions – explain.
45. In trouble shooting a fixed biased BJT circuit, the transistor is found short (𝑉𝐶𝐸 = 0). What
are the probable regions – explain.
46. In trouble shooting a self biased BJT circuit, the transistor is found open (𝑉𝐶𝐸 = 𝑉𝐶𝐶 ). What
are the probable regions – explain.
47. In trouble shooting a self biased BJT circuit, the transistor is found short (𝑉𝐶𝐸 = 0). What
are the probable regions – explain.
48. In trouble shooting a self biased BJT circuit, the transistor is found open (𝑉𝐶𝐸 = 𝑉𝐶𝐶 ). What
are the probable regions – explain.
49. In trouble shooting a voltage divider biased circuit for BJT, the transistor is found short
(𝑉𝐶𝐸 = 0). What are the probable regions – explain.
50. In trouble shooting a voltage divider biased circuit for BJT, the transistor found open. What
are the probable regions – explain.
51. Draw the voltage feedback biasing circuit and explain.
52. How 𝐼𝐶𝐸𝑂 variation in a BJT circuit can be compensated using diodes – explain.
53. Draw the voltage divider bias circuit with 𝑉𝐵𝐸 compensation using diode and explain this
compensation is achieved.
54. Explain how Zener diode can be used to design transistor biasing circuit.
55. What is cascade amplifier and what are the advantages of cascade amplifiers?
56. Draw the biasing circuit diagram of a cascade amplifier and describe how to determine its
operating point.
57. What is Darlington pair? Why we need a Darlington pair?
58. Draw the schematic diagram of Darlington pair and determine its current gain (𝛽𝐷 ) and
base emitter voltage (𝐵𝐵𝐸𝐷 ).
59. Draw a CCC circuit using Darlington pair and explain how to determine its operating point.
60. Draw the schematic diagram of a feedback pair and determine its current gain (𝛽𝑆 ) and
base emitter voltage (𝐵𝐵𝐸𝑆 ).
61. Draw a CCC circuit using feedback pair and explain how to determine its operating point.
Chapter 5: BJT Biasing Circuits 90

5.39 Exercise:
1. Calculate the terminal currents (𝐼𝐵 , 𝐼𝐶 , and 𝐼𝐸 ) and the terminal voltages (𝑉𝐵𝐸 𝑉𝐶𝐸 , and 𝑉𝐶𝐵 )
for the circuits given in Fig.5-1. Assume Si transistor and 𝛽 = 120.

VCC = 12 V

IC
RC 2.2 k
IB 750 k RB
RC 2.2 k
VCE IC
270 k RB VBE IB
VCC = 12 V VCE
VBB = IE VBE
5V
IE
(b)
(a)
Fig.5-1: Biasing circuit for Exercise no. 1

2. Draw the DC load line and operating point for the BJT circuits of Fig.5-1.
3. Draw the DC load line and operating point for the BJT circuits of Fig.5-1 considering 𝑉𝐶𝐶 =
6 V, 12 V, 18 V, and 24 V on the same coordinate system.
4. Draw the DC load line and operating point for the BJT circuits of Fig.5-1 considering 𝑅𝐶 =
1 k, 2 k, and 3 k on the same coordinate system.
5. The values of 𝐼𝐶𝐸𝑂 and 𝑉𝐶𝐸(𝑠𝑎𝑡) of a power transistor are 0.5 mA and 1.2 V, respectively.
Considering 𝑉𝐶𝐶 = 20 V and 𝑅𝐿 = 10 Ω, (i) Draw the load line, (ii) Maximum swing span of
the operating point and (iii) Position of the operating point. Show them in a graph.
6. For the biasing circuit of Fig.5-2, determine the operating point and load line. Also
calculate the value of 𝐼𝐶 and 𝐼𝐵 for which the transistor saturates that is 𝑉𝐶𝐸 = 𝑉𝐶𝐸(𝑠𝑎𝑡) =
0.5 V.

VCC = 18 V VCC = 12 V VCC = 15 V

RC RC 3k RB RC 3 k
2 k RB
173 k RB 570 k IC
570 k IC
IC IB
IB IB 𝛽 = 100
VCE 𝛽 = 110
IE
VBE
IE RE 1.5 k
IE

Fig.5-2: Biasing circuit of a Fig.5-3: Biasing circuit of a

Fig.5-4: Emitter bias for Ex 10
transistor for Exercise 6 transistor for Exercise 6

7. Assuming 𝑉𝐶𝐶 = 15 V, 𝑅𝐵 = 160 kΩ, 𝑅𝐶 = 1.2 kΩ and a silicon transistor with 𝛽 = 120
for the circuit of Fig.5-2, draw the load line and show the position of the operating point.
8. A fixed bias circuit is designed with 𝑉𝐶𝐶 = 12 V and a transistor with 𝛽 = 140 which is
shown in Fig.5-3. Calculate the operating point. To check how higher values of 𝛽 and 𝑅𝐶
and lower value of 𝑅𝐵 saturate the transistor, calculate the operating points considering
𝛽 = 260, 𝑅𝐵 = 250 kΩ and 𝑅𝐶 = 8.3 kΩ, one by one.
Chapter 5: BJT Biasing Circuits 91

9. The following table shows the parameter values for a typical transistor at temperature
10°C and 50°C. Find the total change in DC collector current over the temperature range
for a base bias circuit. Assume the values of 𝑉𝐶𝐶 = 12 V and 𝑅𝐵 = 220 kΩ.
10°C 50°C Change
𝐼𝐶𝐵𝑂 0.02 μA 0.17 μA Δ𝐼𝐶𝐵𝑂 = 0.15 μA
𝑉𝐵𝐸 0.74 V 0.59 V Δ𝑉𝐵𝐸 = −0.15 V
𝛽 80 100 Δ𝛽 = 20
10. Fig.5-4 shows a fixed bias circuit. Calculate the operating point for the given values of
components in the figure. To get idea of saturation, calculate the operating points
considering 𝛽 = 280, 𝑅𝐵 = 120 kΩ and 𝑅𝐶 = 10 kΩ, one by one. Also to prove that 𝑅𝐸
cannot saturate the transistor repeat the problem for 𝑅𝐸 = 100 Ω and 𝑅𝐸 = 520 kΩ.
11. Fig.5-23(a) shows a fixed bias circuit with emitter resistor. The circuit has been designed to
set the operating point at the middle of load line considering a typical 𝛽 value of 150.
Calculate the load line and operating point of this circuit. If the transistor has 𝛽𝑚𝑖𝑛 = 50
and 𝛽𝑚𝑎𝑥 = 250, calculate the lowest and the highest position of operating point.

VCC = 12 V VCC = -12 V VEE = +12 V

RB RC 1.5 k RC IE RE
RB IC
600 k  1.5 k 1.5 k
IC 600 k VBE
IB IB IB
𝛽 = 150 𝛽=145 𝛽=145
IE VBE RB
IC RC
RE 1.5 k IE RE 600 k 1.5 k
 1.5 k
(a) (b)
Fig.5-5: Circuit diagram and
graph for Example 11 Fig.5-6: Emitter feedback bias with PNP for Ex. 12

12. Calculate the values of 𝐼𝐵𝑄 , 𝐼𝐶𝑄 , and 𝑉𝐶𝐸𝑄 for the emitter bias circuits of PNP transistor
given in Fig.5-26.
13. Calculate the operating point of the circuit of Fig.5-7. Verify the collector current using
Equ.(5-37).
Chapter 5: BJT Biasing Circuits 92

VCC = 8 V VCC = 10 V VCC = 12 V

3k RC RC RC
2.2 k 3.2 k

IB IB
380 k RB RB IC RB IC
 =140 320 k 420 k
IB IB
IE IE
(a)
(b)
Fig.5-7: Circuit for Example 5-10
Fig.5-8: Circuit for Example 15-

14. If the value of 𝛽 of the transistor of Fig.5-7 increases from 140 to 200, calculate the change
in collector current using normal procedure and using Equ.(5-53).
15. Fig.5.8 shows a collector-to-base bias circuit, designed to set the operating point at the
middle of load line considering a typical 𝛽 value of 150. Calculate the load line and
operating point of this circuit. If the transistor has 𝛽𝑚𝑖𝑛 = 50 and 𝛽𝑚𝑎𝑥 = 240, calculate
also the lowest and the highest operating point.

+12 V -10 V
-12 V
IE IC + IB RC
IC + IB RC
VBE 3.1 k
3.3 k
𝛽=200 RB IB IC
IB RB IB IC
RB 220 k
420 k
450 k IB 𝛽=180
𝛽=180 IB
IB VBE
RC VBE
IC + IB IE
4k IE

(a) (b) (c)

Fig.5-9: Collector feedback bias for PNP transistor

16. For the voltage divider biasing circuit of Fig.5-9, calculate (i) 𝐼𝐵𝑄 , (ii) 𝐼𝐶𝑄 , (iii) 𝑉𝐶𝐸𝑄 , (iv) 𝑉𝐸 ,
and (v) 𝑉𝑅𝐶 using exact analysis and approximate analysis and compare the results.
Chapter 5: BJT Biasing Circuits 93

VCC = 16 V VCC = 15 V VCC = 12 V

R1 RC RC RC
IC R1 IC R1 IC
4.7 k 6.2 k 3.2 k
24 k 530 k 500 k

 = 120 𝛽=140 𝛽=140

IB IB IB
R2 R2 R2
5k RE 120 k RE 100 k RE
IE IE IE
1.2k 1.5 k 1.2 k

(b) (c)
(a)
Fig.5-10: Voltage divider bias circuit for Ex.17
17. Even the condition for approximate analysis is not true for the voltage divider bias circuit
of Fig.5-10, determine the operating pint using exact and approximate method and show
the differences in the results.
18. Fig.5.39(a) shows a voltage divider bias circuit considering a typical 𝛽 value of 145.
Calculate the load line and operating point of this circuit. If we consider BD135 transistor,
that has 𝛽𝑚𝑖𝑛 = 50 and 𝛽𝑚𝑎𝑥 = 250, calculate the lowest and the highest operating point
corresponding to these 𝛽 values. Compare the results with the results of Fig.5-19, and
Fig.5-23.
VCC =16 V VCC = -15 V VEE = 15 V

R1 RC RC RE
IC R1 IC R1 IE
22 k 2.2 k 3.2 k 1.3 k
120 k 33 k
IB
𝛽= 150 𝛽 = 150 𝛽 = 150
IB IB
R2 R2 R2
6.5 k RE RE 120 k RC
IE 33 k IE IC
1.2 k 1.3 k 3.2 k

(a) (b)
Fig.5-11: Voltage divider bias
circuit for Example 4.14 Fig.5-12: PNP transistor biasing circuits for Ex. 19

19. For the voltage divider circuits of Fig.5-12, calculate the operating points.
20. Calculate the operating point of the base bias circuit of Fig.5-13.
Chapter 5: BJT Biasing Circuits 94

+10 V +10 V +16 V

RC
RB IC RC 3.2 k RB IC RC
570 k 3.2 k IC 860 k 4.2 k
IB
𝛽 = 140
𝛽 = 140 𝛽 = 150
IB RB IB
IE 280 k IE IE
-10 V -10 V -10 V
(a) (b) (c)
Fig.5-13: Circuit for Example 5-20

21. For the voltage divider biasing circuit of Fig.5-14, determine the operating point, draw the
load line and place the operating point on the load line.

+12 V +16 V
RC RE
R1 IC IC
5.2 k 2 kΩ
55 k
C1 IB
IB
𝛽 = 150 C2
R2 vi RB 200 kΩ
RE RL
12 k IE RC
2.2 k IE 20 kΩ
2 kΩ
-12 V
-16 V
Fig.5-14: Voltage divider bias Fig.5-15: PNP transistor biasing circuits with
circuit for Example 5-21 split power supply for Example 5.15

22. For the voltage divider bias circuit of Fig.5-15, draw the load-line and calculate the
operating point.
23. Design a bias circuit that will be operated by two batteries - 𝑉𝐶𝐶 = 14 V and 𝑉𝐵𝐵 = 5 V.
Assume the current gain of the transistor is ℎ𝐹𝐸 = 150.
24. Design a base bias circuit that will be operated by a supply voltage of 𝑉𝐶𝐶 = 20 V. Assume
the current gain of the transistor is ℎ𝐹𝐸 = 120.
25. Design an emitter bias circuit that will be operated by a supply voltage of 𝑉𝐶𝐶 = 16 V.
Assume that the transistor has the current gain of 150.
26. Design a collector-to-base bias circuit to have 𝑉𝐶𝐸 = 16 V and 𝐼𝐶 = 4 mA. Assume that the
supply voltage is 12 V and the transistor has 𝛽 = 130.
27. Design a voltage divider bias circuit considering the supply voltage of 18 V and the
transistor has 𝛽 = 120.
28. For the biasing circuit of common-base configuration in Fig.5-16, determine the load line
and the operating point.
Chapter 5: BJT Biasing Circuits 95

+10 V VCC = 18 V
RC IC RC
IC R1 3.3 k
3.2 k C2 70 k IB
VCB 𝛽 = 150
IB RL VBE
𝛽 = 100 12 k D1
C1 VB
R2 IE RE
7k 1.3 k
IE RE
4.7 k vi

-10 V Fig.5-96: 𝑉𝐵𝐸 compensated

Fig.5-16: CB circuit for Example 28 voltage divider bias

29. Design a common-base amplifier with emitter bias using a PNP transistor of ℎ𝐹𝐸 = 140.
Assume the supply voltage is ± 15 V.
30. For the common-collector biasing circuit in Fig.5-76(a) determine the load line and
operating point.

VEE = 16 V
IE
IC VBE
IB
𝛽 = 140
vi 𝛽 = 140
VCE
IB VBE RB
RB vo RL
230 k Io
520 k 80 
IE RE
4.7 k
-15 V
Fig.5-18: Constant current
Fig.5-17: CC circuit for Example 5-30
source for Example 5-30

31. Design a common-collector amplifier with voltage divider bias using a PNP transistor of
ℎ𝐹𝐸 = 120. Assume the supply voltage is 16 V.
32. A controlling circuit requires to ON/OFF a 24 V, 500 W heating coil by a 12 V relay. If the
output of the controlling circuit is TTL standard, design a transistor switching circuit to
drive the relay and draw the schematic diagram of the full system.
33. Design an inverter circuit to drive a 2.2 kΩ load that requires TTL logic levels. Assume
ℎ𝐹𝐸(𝑚𝑖𝑛) = 80.
34. Design an inverter circuit to drive a 2.2 kΩ load that requires TTL logic levels. Assume
ℎ𝐹𝐸(𝑚𝑖𝑛) = 80 using PNP transistor.
35. For the constant current source of Fig.5-18, calculate the output current and output
voltage. Determine the maximum value of 𝑅𝐿 that can be used with this current source.
Chapter 5: BJT Biasing Circuits 96

VCC =
20 V
VCC IC2 RC
R1
12 k 5.7 k
R1 IC RC
VB2 C2
IB Q2 VCE2 RL vo
VCE C3
R2 20 k
IZ VBE 5.2k
VZ VB Q1 VCE1
IE RE C1 VB1
R3
5.2k RE
vi IE1 CE
2.5 k

Fig.5-19: Voltage divider bias

using Zener diode. Fig.5-21: Cascode amplifier for Exercise

36. For the cascade amplifier of Fig.5-19, calculate the operating point of transistors. Assume
𝐼𝐵1 = 𝐼𝐵2 ≈ 0.
37. The current gain of the transistors used in a Darlington pair are: 𝛽1 = 120 and 𝛽2 = 40.
Determine the current gain of the Darlington pair.
38. The current gain of the transistors used in a Sziklai pair are: 𝛽1 = 110 and 𝛽2 = 50.
Determine the current gain of the Sziklai pair for the configurations shown in Fig.5-.
39. Design a common-collector amplifier using a Darlington pair for 𝐼𝐶𝑄 = 2.5 A and 𝑉𝐶𝐸𝑄 =
10 V. Assume the supply voltage is 30 V.
40. Design a common-collector amplifier using a Sziklai pair for 𝐼𝐶𝑄 = 3.5 A and 𝑉𝐶𝐸𝑄 = 12 V.
Assume the supply voltage is 35 V.
41. Fig.5- 106 shows a fixed bias circuit for an NPN transistor. The transistor has the following
maximum ratings: 𝑃𝐷(𝑚𝑎𝑥) = 500 mW, 𝑉𝐶𝐸(𝑚𝑎𝑥) = 16 V, and 𝐼𝐶(𝑚𝑎𝑥) = 100 mA.
Determine the maximum value of the supply voltage (𝑉𝐶𝐶 ) that can be applied to this
biasing circuit. Which rating will be exceeded first?
42. A BD145 transistor is used in the circuit of Fig.5-106. Determine the maximum value to
which 𝑉𝐶𝐶 can be increased without exceeding its maximum ratings. Refer to the datasheet
of Fig.4-39, given in Chapter 4.

RC
18 k
RB 𝛽DC = VCC
Q1 120
VBB = 18 k
5V

Fig.5-20: BJT biasing circuit for

Exercise 41 and 42
43. Fig5-21 shows a fixed bias circuit with emitter beedbac resistor. For some reason, the
transistor has been open. Now determine the value of 𝑅𝐶 for which the transistor will go
to the cutoff condition.
Chapter 5: BJT Biasing Circuits 97

44. As shown in Fig. 22 the emitter terminal of the transistor is open. For what value of 𝑅𝐶 the
entire supply voltage will be dropped across the transistor, i.e, 𝑉𝐶𝐸 = 𝑉𝐶𝐶 = 12 V.

VCC = 12 V VCC = 12 V VCC +12 V

RB RC 1.5 k RB RC 1.5 k RC
 Transistor 75 k R1 5.2 k
600 k IC 600 k 
open IB
IB 𝛽 = 150 VC = VCC
𝛽 = 150
IE RE open
12 k R2 RE 2.2 k
RE 1.5 k RE 1.5 k
 

Fig.5-21: Circuit diagram and Fig.5-22: Circuit diagram and Fig.5-23: Circuit diagram and
graph for Example 43 graph for Example 44 graph for Example 45

45. For what value of 𝑅1 , 𝑅2 , and 𝑅𝐸 the transistor’s operating pint in circuit of Fig. will shift to
the cutoff position, that is, 𝑉𝐶𝐸 = 𝑉𝐶𝐶 = 12 V.

VCC = 12 V
IC RC
4.3 kΩ
ID

vi RB IB
𝛽 = 100
HIGH 10 kΩ
VBE
5V

Fig.5-: Switching circuit to

turn ON/OFF an LED

46. A switching circuit is designed to turn ON/OFF a red LED as shwon in Fig.5-. Determine the
voltage dropped across the diode and the current flowing through the diode. The forward
voltage drop of a red LED is 1.8 V. [Ans. : 𝑉𝐷 ≈ 1.8 V and 𝐼𝐷 = 2.37 mA]