COLLEGE NAME:ADHIYAMAN ARTS AND SCIENCE COLLEGE

FOR WOMEN,UTHANGARAI

CLASS:[Link] COMPUTER SCIENCE

SUBJECT:MICROPROCESSOR AND MICROCONTROLLER

PAPER CODE:23UCS03

SUBJECT INCHARGE:[Link]
SYLLABUS

UNIT CONTENTS

Digital Computers - Microcomputer Organization-Computer

languages –Microprocessor Architecture and its operations –
Microprocessor initiated operations and 8085 Bus organization –
I Internal Data operations and 8085 registers -
Peripheral or External initiated operations.

II 8085 Microprocessor – Pinout and Signals – Functional

block diagram - 8085 Instruction Set and Classifications

BCD to Binary and Binary to BCD conversions - ASCII to BCD

and BCD to ASCII conversions - Binary to ASCII and ASCII to
Binary conversions. BCD Arithmetic - BCD addition and
III Subtraction - Multibyte Addition and Subtraction -
Multiplication and Division.

The 8085 Interrupts – RIM AND SIM instructions-8259

IV Programmable Interrupt Controller-Direct Memory Access
(DMA) and 8257 DMA controller.

Introduction to Microcontroller - Microcontroller Vs

Microprocessor - 8051 Microcontroller architecture - 8051 pin
description. Timers and Counters – Operating Modes- Control
V Registers. Interrupts – Interrupts in 8051 - Interrupts
Control Register – Execution of interrupt.
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UNIT I

Digital Computers - Microcomputer Organization-Computer languages –Microprocessor

Architecture and its operations – Microprocessor initiated operations and 8085 Bus
organization – Internal Data operations and 8085 registers - Peripheral or External initiated
operations.

Section No Topic

Unit Objectives
1.1 Digital Computers
1.1.1 Key Characteristics Of Digital Computers
1.1.2 Functional Components Of A Digital Computer
1.1.3 Basic Operation Of A Digital Computer
1.2 Microcomputer Organization
1.2.1 Introduction And Architecture Of Microcomputers
1.2.2 Microcomputer Architecture
1.3 Computer Languages
1.3.1 Machine Language
1.3.2 Assembly Language
1.3.3 High-Level Language
1.4 Microprocessor Architecture And Its Operations
1.4.1 Key Components Of 8085 Architecture
1.5 Microprocessor Initiated Operations And 8085 Bus
Organization
1.5.1 8085 Microprocessor Initiated Operations
1.5.2 8085 Bus Organization
1.6 Internal Data Operations And 8085 Registers
1.6.1 Internal Data Operations In 8085 Microprocessor
1.6.2 8085 Microprocessor Registers
1.7 Peripheral Or External Initiated Operations
1.7.1 Interrupt Handling
1.7.2 Direct Memory Access (DMA)
1.7.3 Input/Output Operations
1.7.4 Serial Communication
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1.1 DIGITAL COMPUTERS

A digital computer is an electronic device that processes data using binary digits (0s and 1s).
It performs a wide range of tasks by executing instructions from software programs, making
it capable of handling complex calculations, data storage, and information retrieval.
1.1.1 KEY CHARACTERISTICS OF DIGITAL COMPUTERS:
Binary System - Digital computers use the binary number system (0s and 1s) for data
representation, simplifying circuit design and ensuring reliable data processing.
High Speed and Accuracy - They perform billions of operations per second with high
precision, limited only by the hardware and software's inherent limitations.
Programmability - These computers can execute a wide range of software applications,
allowing them to perform diverse tasks and making them highly versatile.
Large Storage Capacity - Digital computers offer significant storage capabilities, enabling
the handling and processing of large volumes of data in both primary and secondary storage.
Automation - Once programmed, digital computers can perform tasks automatically without
human intervention, executing complex instruction sequences to achieve specific objectives.
1.1.2 FUNCTIONAL COMPONENTS OF A DIGITAL COMPUTER:
[Link] Central Processing Unit (CPU)
 The brain of the computer, responsible for executing instructions and processing data
through its Arithmetic Logic Unit (ALU) and Control Unit (CU).
[Link] Memory and Storage
 Memory (RAM and ROM): RAM provides temporary storage for active data and
instructions, while ROM stores permanent firmware essential for booting and basic
operations.
 Storage Devices: Hard drives and SSDs provide long-term data storage, retaining
information even when the computer is powered off.
[Link] Input and Output Devices
 Input Devices: Tools like keyboards, mice, and scanners that allow users to enter
data and commands into the computer.
 Output Devices: Devices such as monitors, printers, and speakers that present
processed data to the user in visual, printed, or audio formats.
[Link] Motherboard and Bus System
 Motherboard: The main circuit board that houses the CPU, memory, and other
components, providing connectivity and communication between them.
 Bus System: A communication system that transfers data between
components inside the computer, including data, address, and control buses.
[Link] Power Supply and Network Interface
 Power Supply Unit (PSU): Converts electrical power from an outlet into usable power
 [Link] Computer Science – SEMESTER -III

for the computer’s internal components, ensuring stable and reliable operation.
 Network Interface Card (NIC): Allows the computer to connect to a network,
enabling data exchange with other computers and internet connectivity.
1.1.3 BASIC OPERATION OF A DIGITAL COMPUTER:
Input: Receiving data and instructions from input devices like keyboards, mice, and scanners
for processing.
Processing: Executing instructions and performing calculations using the CPU to
transform input data into meaningful output.
Storage: Saving data and instructions in memory (RAM) for quick access or in storage devices
(HDD, SSD) for long-term retention.
Output: Presenting processed data to the user through output devices like monitors, printers,
and speakers in visual, printed, or audio formats.
Control: Managing and coordinating the operations of all computer components through
the Control Unit (CU) to ensure efficient processing and communication.
Let us sum up:

Digital Computers

1. Definition: Digital computers are electronic devices that process data in binary
form (0s and 1s) and perform computations based on predefined instructions.
2. Applications: They are used in various fields, including business, science,
engineering, healthcare, and entertainment, for tasks such as data processing,
calculations, and automation.
Key Characteristics of Digital Computers

1. Accuracy: Digital computers perform calculations with high precision,

minimizing errors compared to analog systems.
2. Speed: They can execute millions of instructions per second, enabling rapid
processing of data.
3. Storage Capacity: Digital computers can store vast amounts of data in various
formats, including text, images, and multimedia.
4. Versatility: They can perform a wide range of tasks, from simple arithmetic
operations to complex simulations and data analysis.
5. Automation: Digital computers can automate repetitive tasks and processes,
improving efficiency and reducing human intervention.
Functional Components of a Digital Computer

1. Central Processing Unit (CPU): The CPU is the brain of the computer,
responsible for executing instructions and managing operations.
2. Memory: This includes both primary memory (RAM) for temporary data storage and
secondary storage (e.g., hard drives) for long-term data retention.
3. Input Devices: Devices like keyboards, mice, and scanners that allow users to enter
data into the computer.
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4. Output Devices: Monitors, printers, and speakers that convey processed

information to the user.
5. Bus System: A communication system that transfers data between the CPU, memory,
and other components.
Basic Operation of a Digital Computer

1. Input: Data is entered into the computer through input devices.

2. Processing: The CPU processes the input data according to the instructions provided
by software applications.
3. Storage: Processed data can be temporarily stored in RAM or permanently saved
on storage devices.
4. Output: The results of the processing are displayed or printed using output
devices, making them available for user interpretation or further action.

Check Your Progress

1. What system do digital computers use for data representation?

A) Decimal B) Binary
C) Hexadecimal D) Octal
Answer: B) Binary
2. Which unit processes instructions in a computer?
A) GPU B) CPU
C) RAM D) ROM
Answer: B) CPU
3. What is the primary long-term storage device in a digital computer?
A) RAM B) ROM
C) HDD D) GPU
Answer: C) HDD
4. Which component allows a computer to connect to a network?
A) PSU B) RAM
C) NIC D) HDD
Answer: C) NIC
5. Which bus type is used to transfer memory addresses?
A) Address B) Data
C) Control D) Power
Answer: A) Address

1.2 MICROCOMPUTER ORGANIZATION

A microcomputer is a small, relatively inexpensive computer with a

microprocessor as its central processing unit (CPU).
Examples: Personal computers (PCs), laptops, tablets, and embedded systems.
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1.2.1 INTRODUCTION AND ARCHITECTURE OF MICROCOMPUTERS

Microcomputers, also known as personal computers (PCs), are compact, relatively

inexpensive digital computers that use a microprocessor as their central processing unit
(CPU). These machines are ubiquitous in modern society, found in
homes, offices, and embedded in various devices. They have evolved significantly from
early systems, becoming more powerful and capable over time.

Historical Background

The concept of microcomputers emerged in the 1970s with the development of the
microprocessor, which integrated the CPU on a single chip. This innovation led to the
creation of the first personal computers like the Altair 8800 and the Apple I. Since then,
microcomputers have undergone rapid advancement, with improvements in processing power,
memory capacity, and connectivity.

Examples of Microcomputers

Microcomputers come in various forms, including desktop PCs, laptops, tablets, and
embedded systems in appliances and vehicles. They are distinguished by their ability to
perform tasks ranging from basic computing operations to complex calculations and
multimedia processing. Today's microcomputers are essential tools in education, business,
scientific research, entertainment, and everyday life.

1.2.2 MICROCOMPUTER ARCHITECTURE

Microcomputer architecture consists of several key components:

1. Central Processing Unit (CPU):

o Arithmetic and Logic Unit (ALU): Performs arithmetic and logical
operations.
o Control Unit: Directs the operation of the processor.
o Registers: Small, fast storage locations for data and instructions.
2. Memory:
o RAM (Random Access Memory): Temporary storage for data and
instructions.
o ROM (Read-Only Memory): Permanent storage for essential programs.
3. Input/Output (I/O) Devices:
o Interfaces for external devices like keyboards, monitors, and printers.
4. Bus System:
o Data Bus: Transfers data.
o Address Bus: Transfers memory addresses.
o Control Bus: Transfers control signals.
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These components ensure efficient data processing and communication within a

microcomputer.

Fig 1. Microcomputer Architecture

Let us sum up:

Microcomputer Organization

1. Definition: Microcomputers are small computing devices that consist of a

microprocessor, memory, and input/output interfaces, designed for individual use or
specific tasks.
2. Applications: Commonly used in personal computers, embedded systems, and
various consumer electronics for tasks such as word processing, gaming, and data
analysis.
Introduction and Architecture of Microcomputers
1. Architecture Overview: Microcomputers typically follow a von Neumann
architecture, where the CPU, memory, and I/O devices share a common bus for
communication.
2. Key Components:
o Microprocessor: The central processing unit (CPU) that executes
instructions and performs calculations.
o Memory: Includes both volatile (RAM) and non-volatile (ROM) storage for
program instructions and data.
o Input/Output Interfaces: Components that allow the microcomputer to
interact with external devices, such as keyboards, mice, displays, and printers.

Microcomputer Architecture

1. Central Processing Unit (CPU): Comprises the arithmetic logic unit (ALU),
 [Link] Computer Science – SEMESTER -III

control unit (CU), and registers that handle data processing and instruction
execution.
2. Memory Organization:
o Primary Memory: RAM for temporary data storage and fast access.
o Secondary Memory: Hard drives, SSDs, and other storage devices for long-
term data retention.
3. Bus Structure:
o Data Bus: Transfers data between the CPU, memory, and I/O devices.
o Address Bus: Carries the address of the data to be accessed in memory.
o Control Bus: Transmits control signals to coordinate the operations of the
microcomputer components.
4. I/O System: Manages communication between the microcomputer and
peripheral devices, facilitating data input and output operations.

Check Your Progress

1. Which bus transfers data between components in a microcomputer?

A) Address Bus B) Data Bus C) Control Bus D) Power Bus

Answer: B) Data Bus

2. Which type of memory provides temporary storage for active data?

A) RAM B) ROM C) SSD D) HDD

Answer: A) RAM

3. What is the CPU of a microcomputer based on?

A) Mainframe B) Supercomputer

C) Microprocessor D) Minicomputer

Answer: C) Microprocessor

4. Which bus transfers memory addresses?

A) Data Bus B) Control Bus C) Power Bus D) Address Bus

Answer: D) Address Bus

5. Which part of the architecture interfaces with external devices like printers?
 [Link] Computer Science – SEMESTER -III

A) Bus System B) I/O Devices C) Control Unit D) Registers

Answer: B) I/O Devices

1.3 COMPUTER LANGUAGES
Computer languages are the means by which we communicate instructions to a computer.
They are categorized into various levels based on their closeness to machine code and their
abstraction from the hardware. The primary types of computer languages include machine
language, assembly language, and high-level languages.

1.3.1 Machine Language

Machine language is the most fundamental level of programming language. It consists of

binary code (0s and 1s) that the computer's central processing unit (CPU) directly executes.
 Binary Code: Instructions are in the form of binary digits.
 Direct Execution: Machine language instructions are executed directly by the
hardware.
 Hardware Specific: Each type of CPU has its own machine language.

1.3.2. Assembly Language

Assembly language is a low-level programming language that uses symbolic names to

represent machine-level instructions. It is one step above machine language and provides a
more readable way to program.
 Mnemonic Codes: Uses mnemonics (short codes) for instructions, such as ADD,
SUB, MOV.
 Assembler Required: An assembler converts assembly language code into machine
language.
 Hardware Specific: Assembly language is specific to a particular CPU
architecture.
Example:

MOV A, B ; Move the contents of register B into register A

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ADD A, C ; Add the contents of register C to register A

1.3.3. High-Level Languages

High-level languages provide a greater level of abstraction from the hardware, making
programming easier and more efficient. They are designed to be easy to read and write,
resembling natural languages or mathematical notation.

 Easy to Read: Uses English-like syntax, making the code more

understandable.
 Compiler or Interpreter Required: A compiler or interpreter translates high- level
language code into machine language.
 Portable: High-level language programs can run on different types of hardware with
minimal modification.
Common high-level languages include:

 C: Known for its performance and low-level access to memory.

 Java: Object-oriented, platform-independent, widely used in web and
enterprise applications.
 Python: Known for its simplicity and readability, widely used in web
development, data science, and automation.
Example in Python:

def add(a, b):

return a + b result
= add(5, 3)
print(result) # Output: 8

Let us sum up:

Computer Languages

1. Definition: Computer languages are formal languages comprising a set of

instructions used to communicate with computers for programming and
performing tasks.
2. Types: Computer languages can be broadly categorized into machine language,
assembly language, and high-level language, each serving different levels of
abstraction and usability.
Machine Language

1. Definition: Machine language is the lowest-level programming language,

consisting of binary code (0s and 1s) that the computer's CPU directly
understands and executes.
2. Characteristics:
o Hardware-Specific: Each type of CPU has its own machine language,
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making it non-portable across different systems.

o Efficiency: Programs written in machine language execute very
quickly as they require no translation.
o Complexity: Programming in machine language is error-prone and
difficult for humans to read or write due to its binary nature.

Assembly Language

1. Definition: Assembly language is a low-level programming language that uses

symbolic representations of machine instructions, making it more human-
readable than machine language.
2. Characteristics:
o Mnemonics: Uses mnemonic codes (e.g., MOV, ADD, SUB) to
represent machine instructions, allowing for easier coding and
debugging.
o Hardware-Specific: Like machine language, assembly language is also
specific to a particular CPU architecture.
o Assembler Required: Programs written in assembly language must be
translated into machine language by an assembler before execution.

High-Level Language

1. Definition: High-level languages are programming languages that provide a high

level of abstraction from the hardware, allowing programmers to write instructions
in a more human-friendly syntax.
2. Characteristics:
o Portability: High-level languages are generally portable across different
systems and require a compiler or interpreter to translate the code into
machine language.
o Ease of Use: They include features like data types, control structures (loops,
conditionals), and libraries, making them easier to learn and use for
complex applications.
o Examples: Common high-level languages include Python, Java, C++, and
JavaScript, which are widely used for application development and software
engineering.

Check Your Progress

1. What is used to convert assembly language into machine code?

a) Compiler b) Assembler c) Interpreter d) Emulator

Answer: b) Assembler
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2. What language uses mnemonic codes like ADD and MOV?

a) High-level b) Python c) Assembly d) C

Answer: c) Assembly
3. What does an interpreter translate?

a) Machine code b) High-level language

c) Assembly d) Binary code

Answer: b) High-level language

4. Which language is known for its simplicity and readability?

a) C b) Assembly c) Java d) Python

Answer: d) Python

5. Which high-level language is known for performance and memory access?

a) Java b) Python c) C d) Ruby

Answer: c) C
The 8085 microprocessor, introduced by Intel in 1976, is an 8-bit microprocessor widely used in the early
1.4 MICROPROCESSOR ARCHITECTURE AND ITS
OPERATIONS
stages of microprocessor development. It is a part of the MCS- 85 family and is designed to address
various computing tasks. Understanding its architecture is fundamental for grasping how
microprocessors function.
1.4.1 KEY COMPONENTS OF 8085 ARCHITECTURE:

1. Arithmetic and Logic Unit (ALU): The ALU performs arithmetic operations
(addition, subtraction) and logical operations (AND, OR, NOT, XOR). It works on 8-
bit data and sets the flags according to the result of operations.
2. Registers: The 8085 has several registers, including:
o Accumulator (A): An 8-bit register used in arithmetic and logical operations.
o General Purpose Registers (B, C, D, E, H, L): These six 8-bit registers can be
used individually or in pairs (BC, DE, HL) to hold 16-bit data.
o Program Counter (PC): A 16-bit register that holds the address of the next
instruction to be executed.
o Stack Pointer (SP): A 16-bit register that points to the top of the stack.
o Temporary Register: Used internally by the ALU for intermediate results.
o Instruction Register and Decoder: Holds the current instruction and decodes
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it to generate the necessary control signals.

o Flag Register: An 8-bit register with five flags (Sign, Zero, Auxiliary
Carry, Parity, and Carry) that indicate the status of the ALU operations.
3. Control Unit: The control unit coordinates all operations by generating timing and
control signals. It controls the data flow between the CPU and peripherals, memory,
and input/output devices. It includes the following:
o Timing and Control Circuitry: Generates the necessary control signals.
o Instruction Decoder: Interprets the instructions fetched from memory.
4. System Bus: The system bus is used to transfer data, addresses, and control signals
between the microprocessor and peripherals. It includes:
o Data Bus: An 8-bit bidirectional bus used for data transfer.
o Address Bus: A 16-bit unidirectional bus used to address memory locations.
o Control Bus: Carries control signals like RD (Read), WR (Write), ALE
(Address Latch Enable), etc.
5. Clock Generator: The 8085 uses a single-phase clock generator to synchronize its
operations. The typical clock speed is 3 MHz.
6. Interrupts: The 8085 microprocessor has five interrupt lines (TRAP, RST7.5,
RST6.5, RST5.5, INTR) which allow external devices to halt the normal execution of
instructions and execute an interrupt service routine.
7. Serial I/O Control: The microprocessor includes a serial input (SID) and a serial
output (SOD) line for simple serial communication.
The 8085 microprocessor's architecture consists of an ALU, a set of registers, a control
unit, a system bus, a clock generator, interrupt control, and serial I/O control. This
architecture forms the backbone of the microprocessor, enabling it to perform complex
computations and control operations effectively. Understanding these components and
their interactions is crucial for working with or designing systems based on the 8085
microprocessor.

Fig 2. 8085 Architecture

Let us sum up:

 [Link] Computer Science – SEMESTER -III

Microprocessor Architecture and Its Operations

1. Definition: Microprocessor architecture refers to the internal structure and

operational organization of a microprocessor, defining how it processes
instructions and manages data.
2. Functions: It encompasses the design of the CPU, memory interface, input/output
systems, and control mechanisms that enable the microprocessor to execute programs
effectively.
Key Components of 8085 Architecture
1. Central Processing Unit (CPU):
o Arithmetic Logic Unit (ALU): Performs arithmetic and logical
operations, including addition, subtraction, and comparisons.
o Control Unit (CU): Directs the operation of the microprocessor, fetching
instructions from memory and decoding them for execution.
2. Registers:
o General-Purpose Registers: Includes registers A, B, C, D, E, H, and L,
which store data and addresses temporarily during processing.
o Special Purpose Registers:
 Accumulator (A): Used for arithmetic and logic operations; it
holds the results of these operations.
 Program Counter (PC): Holds the address of the next
instruction to be executed.
 Stack Pointer (SP): Points to the top of the stack in memory, used
for storing return addresses and temporary data.
3. Memory Interface:
o Address Bus: A 16-bit bus used to address memory locations (up to 64KB
of memory).
o Data Bus: An 8-bit bus used to transfer data between the
microprocessor and memory or I/O devices.
4. Control Signals:
o Read and Write Signals: Control the flow of data to and from memory,
indicating when data should be read from or written to a specific address.
o Interrupt Signals: Allow the microprocessor to respond to external
events or interrupts, enabling multitasking and efficient handling of tasks.
5. Input/Output Ports:
o I/O Interface: Facilitates communication between the microprocessor and
peripheral devices (such as keyboards, displays, and printers) using various
I/O ports.
 [Link] Computer Science – SEMESTER -III

o Memory-Mapped I/O: The same address space is used for both memory
and I/O devices, allowing for flexible addressing and control.
6. Clock Generator:
o Provides the timing signals necessary for synchronizing the operations of the
microprocessor and coordinating data transfers.
1. Which unit in the 8085 microprocessor performs arithmetic and logical
operations?
a) Control Unit b) Program Counter c) ALU d) Stack Pointer

Answer: c) ALU
2. Which register is used to hold the address of the next instruction to be executed?
a) Accumulator b) Stack Pointer

c) Instruction Register d) Program Counter

Answer: d) Program Counter

3. Which of the following is a flag in the 8085 microprocessor?

a) Overflow b) Zero c) Negative d) Auxiliary

Answer: b) Zero
4. What is the size of the address bus in the 8085 microprocessor?

a) 8-bit b) 32-bit c) 16-bit d) 64-bit

Answer: c) 16-bit
5. Which of the following interrupts has the highest priority in the 8085
microprocessor?
a) RST5.5 b) INTR c) RST7.5 d) TRAP
Answer: d) TRAP

1.5 MICROPROCESSOR INITIATED OPERATIONS

AND 8085 BUS ORGANIZATION
1.5.1 8085 MICROPROCESSOR INITIATED OPERATIONS
The 8085 microprocessor initiates several operations to manage and control its internal
processes. These operations include control signals, status signals, and machine cycles.
Understanding these operations is essential for effective programming and hardware
interfacing.

1. Control Signals

Control signals are used by the microprocessor to manage data flow between itself and
external devices. The primary control signals in the 8085 microprocessor are:
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 RD (Read): This signal indicates that the microprocessor is reading data from
memory or an I/O device. It is active low.
 WR (Write): This signal indicates that the microprocessor is writing data to memory
or an I/O device. It is active low.
 ALE (Address Latch Enable): This signal is used to latch the lower byte of the
address into an external latch during the first clock cycle of a machine cycle. It is
active high.
 IO/M: This signal distinguishes between memory operations (when low) and I/O
operations (when high).
2. Status Signals

Status signals provide information about the current state of the microprocessor. They help in
coordinating operations with external devices. The primary status signals are:

 S0 and S1: These signals indicate the status of the microprocessor and are used to
differentiate between various machine cycles.
 READY: This signal is used to synchronize slower peripheral devices with the
microprocessor. When READY is low, the microprocessor enters a wait state until it
goes high.
3. Machine Cycles
The 8085 microprocessor executes instructions through a series of machine cycles, each
comprising several clock cycles. The main types of machine cycles are:
 Opcode Fetch Cycle: This cycle is used to fetch the opcode of an instruction from
memory.
 Memory Read/Write Cycle: These cycles are used to read data from or write data to
memory.
 I/O Read/Write Cycle: These cycles are used to read data from or write data to an
I/O device.
 Interrupt Acknowledge Cycle: This cycle is used to acknowledge an interrupt request
and transfer control to the interrupt service routine.
1.5.2 8085 BUS ORGANIZATION
Fig 3. Bus Organization
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The bus organization of the 8085 microprocessor is a critical aspect of its architecture,
enabling communication between the microprocessor and peripheral devices, memory,
and I/O ports. The 8085 microprocessor has three main types of buses: Address Bus,
Data Bus, and Control Bus.

1. Address Bus

The address bus is used to specify the address of the memory location or I/O port that the
microprocessor intends to read from or write to. Key characteristics include:
 Width: The address bus is 16 bits wide, allowing the 8085 to address up to 64KB
(2^16) of memory.
 Unidirectional: The address bus is unidirectional, meaning that the address flows
only from the microprocessor to the memory or I/O device.
The address bus consists of two parts:

 Higher Order Address Bus (A8-A15): These are the higher 8 bits of the address.
 Lower Order Address/Data Bus (AD0-AD7): These multiplexed lines serve as the
lower 8 bits of the address and data bus.
2. Data Bus

The data bus is used for transferring data between the microprocessor, memory, and I/O
devices. Key characteristics include:
 Width: The data bus is 8 bits wide, allowing the transfer of 8-bit data.
 Bidirectional: The data bus is bidirectional, meaning data can flow both to and from
the microprocessor.
3. Control Bus

The control bus carries control signals from the microprocessor to coordinate and manage the
operations of the system. Key control signals include:
 RD (Read): Indicates that the microprocessor is reading data from memory or an I/O
port (active low).
 WR (Write): Indicates that the microprocessor is writing data to memory or an I/O
port (active low).
 ALE (Address Latch Enable): Used to latch the lower 8 bits of the address during
the first clock cycle of a machine cycle (active high).
 IO/M: Distinguishes between memory operations (low) and I/O operations (high).
Other control signals include READY, S0/S1 (status signals), and INTA (interrupt
acknowledge).
Microprocessor Initiated Operations
1. Instruction Fetch:
o The microprocessor fetches the instruction from memory using the
Program Counter (PC) to identify the memory address.
o The instruction is loaded into the Instruction Register (IR) for decoding and
execution.
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2. Instruction Decode and Execute:

o After fetching, the instruction is decoded to determine the required
operation and the operands involved.
o The Control Unit (CU) generates the necessary control signals to
execute the instruction, which may involve ALU operations, data
transfer, or I/O operations.
3. Data Transfer:
o Data can be moved between registers, memory, and I/O devices based on the
instructions.
o The microprocessor initiates read or write operations, controlling data flow
through the data bus.
4. Arithmetic and Logic Operations:
o The Arithmetic Logic Unit (ALU) performs calculations or logical
operations as dictated by the instruction.
o Results are stored back in the accumulator or designated registers for further
processing or output.
5. Interrupt Handling:
o The microprocessor can respond to external interrupt signals, pausing its
current operations to handle high-priority tasks.
o This process involves saving the current state and jumping to the
appropriate interrupt service routine.
8085 Bus Organization
1. Bus Structure:
o The 8085 microprocessor utilizes a tri-state bus system, consisting of an 8-
bit data bus, a 16-bit address bus, and control signals.
o The address bus is used to specify memory locations, while the data bus
transfers actual data between the microprocessor and memory or I/O devices.
2. Address Bus:
o The 16-bit address bus can access 2^16 = 64KB of memory locations.
o Each address corresponds to a unique memory location, allowing the
microprocessor to read or write data as needed.
3. Data Bus:
o The 8-bit data bus allows the transfer of 8 bits of data at a time
between the CPU, memory, and I/O devices.
o This bus facilitates the flow of information during read and write
operations.
4. Control Signals:
o The control bus transmits control signals (such as READ, WRITE, and
INTERRUPT) that manage the timing and direction of data flow.
o Control signals coordinate communication between the microprocessor and
other components.
 [Link] Computer Science – SEMESTER -III

5. I/O Addressing:
o The 8085 microprocessor supports two I/O addressing modes:
Memory-Mapped I/O and I/O-Mapped I/O.
o In memory-mapped I/O, all devices share the same address space as memory,
while I/O-mapped I/O uses a separate address space for I/O devices.
1. What is the function of the ALE signal in the 8085 microprocessor?
a) Read data from memory b) Write data to I/O port
c) Latch the lower byte of the address d) Acknowledge an interrupt
Answer: c) Latch the lower byte of the address
2. Which signal is used to distinguish between memory and I/O operations?

a) RD b) IO/M c) WR d) S0/S1

Answer: b) IO/M

3. How many bits wide is the address bus of the 8085 microprocessor?
a) 16 bits b) 8 bits c) 32 bits d) 64 bits

Answer: a) 16 bits
4. The address bus in the 8085 microprocessor is:

a) Bidirectional b) Unidirectional c) Half-duplex d) Full-duplex

Answer: b) Unidirectional

5. Which lines in the 8085 microprocessor represent the higher 8 bits of the address
bus?
a) AD0-AD7 b) IO/M c) S0-S1 d) A8-A15
Answer: d) A8-A15

1.6 INTERNAL DATA OPERATIONS AND 8085

REGISTERS
1.6.1 INTERNAL DATA OPERATIONS IN 8085 MICROPROCESSOR
The 8085 microprocessor, an 8-bit microprocessor introduced by Intel, performs a variety of
internal data operations crucial for executing instructions and processing data. These
operations can be broadly categorized into arithmetic, logical, data transfer, and branching
operations. Understanding these operations is fundamental for programming and utilizing the
8085 microprocessor effectively.

1. Arithmetic Operations

Arithmetic operations in the 8085 microprocessor include addition, subtraction, increment,

and decrement. These operations are primarily performed using the accumulator and involve
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the following instructions:

 Addition (ADD): This instruction adds the contents of a specified register or memory
location to the contents of the accumulator. For example, ADD B adds the contents of
register B to the accumulator.
 Addition with Carry (ADC): Similar to ADD, but it also adds the carry flag to the
result. For example, ADC C adds the contents of register C and the carry flag to the
accumulator.
 Subtraction (SUB): This instruction subtracts the contents of a specified register or
memory location from the contents of the accumulator. For example, SUB D subtracts
the contents of register D from the accumulator.
 Subtraction with Borrow (SBB): Similar to SUB, but it also subtracts the borrow
(carry) flag from the result. For example, SBB E subtracts the contents of register E
and the carry flag from the accumulator.
 Increment (INR): Increments the contents of a specified register or memory location
by one. For example, INR H increments the contents of register H by one.
 Decrement (DCR): Decrements the contents of a specified register or memory
location by one. For example, DCR L decrements the contents of register L by one.
2. Logical Operations

Logical operations involve manipulating the bits of data within the registers. These include
AND, OR, XOR, compare, and rotate operations:

 AND (ANA): This instruction performs a bitwise AND operation between the
contents of the accumulator and a specified register or memory location. For example,
ANA B performs a bitwise AND between the accumulator and register B.
 OR (ORA): This instruction performs a bitwise OR operation between the contents of
the accumulator and a specified register or memory location. For example, ORA C
performs a bitwise OR between the accumulator and register C.
 XOR (XRA): This instruction performs a bitwise XOR operation between the
contents of the accumulator and a specified register or memory location. For example,
XRA D performs a bitwise XOR between the accumulator and register D.
 Compare (CMP): Compares the contents of the accumulator with a specified register
or memory location. For example, CMP E compares the accumulator with register E.
 Complement (CMA): This instruction complements (inverts) the bits of the
accumulator.
 Rotate: These instructions rotate the bits in the accumulator left or right. RLC rotates
bits to the left, and RRC rotates bits to the right.
3. Data Transfer Operations

Data transfer operations move data between registers, between registers and memory,
or between the accumulator and memory. Key instructions include:
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 Move (MOV): Transfers data from one register to another. For example, MOV A, B
copies the contents of register B to the accumulator.
 Move Immediate (MVI): Transfers an immediate value to a register. For example,
MVI C, 32H moves the immediate value 32H to register C.
 Load and Store (LDA, STA): LDA loads data from a specified memory location to the
accumulator. STA stores data from the accumulator to a specified memory location.
 Exchange (XCHG): Exchanges the contents of register pairs. For example, XCHG
exchanges the contents of register pairs DE and HL.
4. Branching Operations

Branching operations alter the sequence of instruction execution based on certain conditions.
These include jumps, calls, and returns:

 Jump (JMP): Transfers control to a specified memory address. For example, JMP
2000H jumps to address 2000H.
 Conditional Jump: Transfers control based on specific conditions (e.g., zero, carry,
parity). For example, JZ 3000H jumps to address 3000H if the zero flag is set.
 Call (CALL): Transfers control to a subroutine at a specified address. For example,
CALL 4000H calls the subroutine at address 4000H.
 Return (RET): Returns control from a subroutine to the main program.

These internal data operations enable the 8085 microprocessor to perform complex
computational tasks and process data efficiently. Understanding these operations is essential
for programming and optimizing microprocessor-based systems.
1.6.2 8085 MICROPROCESSOR REGISTERS
The 8085 microprocessor, designed by Intel, contains several registers that are used to store
data temporarily during the execution of instructions. Registers are faster to access than
memory and play a crucial role in the microprocessor's operation. The 8085 microprocessor
includes the following types of registers: Accumulator, General
Purpose Registers, Special Purpose Registers (Program Counter, Stack Pointer), and Status
Flags.
1. Accumulator (A)

The Accumulator is an 8-bit register used in arithmetic, logical, and data transfer operations.
It is one of the most important registers in the 8085 microprocessor because:

 It holds one of the operands in arithmetic and logical operations.

 It stores the result of these operations.
 It is often used in data transfer instructions to transfer data to and from memory.

2. General Purpose Registers

The 8085 has six general-purpose registers, each of 8 bits, which can be used individually or
as pairs for 16-bit operations. These registers are named B, C, D, E, H, and L.
 [Link] Computer Science – SEMESTER -III

 B and C: Used individually for 8-bit data or combined as a 16-bit register pair BC.
 D and E: Similarly used for 8-bit data or combined as the 16-bit register pair DE.
 H and L: Also used individually for 8-bit data or combined as the 16-bit register pair
HL.
The HL pair is particularly important as it is often used to store memory addresses that point to
data in memory.

3. Special Purpose Registers

Program Counter (PC)

 The Program Counter is a 16-bit register that holds the address of the next
instruction to be executed.
 It is automatically incremented after fetching an instruction.
 It is used to sequence the execution of the instructions in a program.
 If the current instruction is a branching instruction (e.g., JMP, CALL), the
Program Counter is updated to the new address.

Stack Pointer (SP)

 The Stack Pointer is a 16-bit register that points to the top of the stack.
 The stack is a special area of memory used for temporary storage of data and
addresses during program execution, especially during function calls and interrupts.
 The Stack Pointer is decremented or incremented by 2 as data is pushed onto or
popped off the stack.
4. Temporary Registers

The 8085 microprocessor uses several temporary registers that are not accessible to the
programmer but are crucial for its internal operations. These registers are used during the
execution of instructions to hold intermediate results.
5. Status Flags

The 8085 microprocessor has five status flags that indicate the results of arithmetic and
logical operations. These flags are part of the 8-bit flag register, where only five bits are used:

 Sign Flag (S): Set if the most significant bit (MSB) of the result is 1, indicating a
negative number in signed operations.
 Zero Flag (Z): Set if the result of the operation is zero.
 Auxiliary Carry Flag (AC): Set if there is a carry out of the lower nibble (4 bits)
during an arithmetic operation.
 Parity Flag (P): Set if the number of 1 bits in the result is even.
 Carry Flag (CY): Set if there is a carry out of the most significant bit during an
arithmetic operation or if the result is too large for the register.
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6. Instruction Register and Decoder

 The Instruction Register holds the opcode of the current instruction being
executed.
 The Decoder interprets the opcode and generates the necessary control signals to
execute the instruction.
Addition Example:

MVI A, 5H ; Load 5H into the accumulator

MVI B, 3H ; Load 3H into register B
ADD B ; Add the contents of B to the accumulator

In this example, the Accumulator (A) is used to store the operand and the result of the
addition operation. Register B holds another operand.
Data Transfer Example:

MVI H, 20H ; Load 20H into register H MVI

L, 30H ; Load 30H into register L
MOV A, M ; Move the data from memory location pointed by HL pair to
accumulator
Here, the HL pair points to a memory location, and the data from that location is
moved to the Accumulator.

Let us sum up:

Internal Data Operations in 8085 Microprocessor

1. Data Fetching:
o The microprocessor retrieves data from memory or I/O devices based on the
instructions fetched from memory.
o Data is loaded into the registers for processing, enabling efficient
manipulation during operations.
2. Data Processing:
o The Arithmetic Logic Unit (ALU) performs various operations such as
addition, subtraction, logical AND, OR, and NOT on the data stored in
registers.
o Intermediate results are temporarily stored in the accumulator or other
registers as the operations are executed.
3. Data Storage:
o After processing, the final results are written back to memory or stored in
registers for future use.
o This involves sending the data to the specified memory address or
register as dictated by the instruction set.
4. Status Flags:
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o The 8085 microprocessor utilizes status flags in the flag register to

indicate the outcome of arithmetic and logical operations (e.g., Zero flag,
Carry flag, Sign flag).
o These flags influence conditional branching and decision-making in
program execution.
5. Interrupt Handling:
o The microprocessor can temporarily halt its current operations to
address high-priority tasks initiated by external devices.
o The state of ongoing operations is saved, and upon completion of the
interrupt service routine, the microprocessor resumes normal operation.

8085 Microprocessor Registers

1. General-Purpose Registers:
o The 8085 microprocessor contains six 8-bit general-purpose registers: B, C,
D, E, H, and L.
o These registers can be used to hold data, addresses, or intermediate results
during computations.
2. Accumulator (A):
o The accumulator is a special 8-bit register used for arithmetic and
logical operations.
o It is the primary register for storing results from the ALU and is involved in
most instructions.
3. Program Counter (PC):
o The Program Counter is a 16-bit register that holds the address of the next
instruction to be executed.
o It increments automatically after each instruction fetch, ensuring
sequential execution of programs.
4. Stack Pointer (SP):
o The Stack Pointer is a 16-bit register that points to the top of the stack in
memory, facilitating temporary storage of data, return addresses, and
function parameters.
o It is essential for managing function calls and returns during program
execution.
5. Instruction Register (IR):
o The Instruction Register holds the current instruction being executed after it
has been fetched from memory.
o It plays a crucial role in instruction decoding, enabling the control unit to
generate the necessary control signals for execution.
6. Flag Register:
o The Flag Register is an 8-bit register that contains status flags (Zero, Carry,
Sign, Parity, and Auxiliary Carry) that reflect the outcome of arithmetic
and logical operations.
o These flags are used for decision-making in conditional instructions.
 [Link] Computer Science – SEMESTER -III

Check Your Progress

1. What does the INR instruction do in the 8085 microprocessor?

a) Decrements the contents of a register

b) Subtracts the contents of a register
c) Increments the contents of a register
d) Compares the contents of a register

Answer: c) Increments the contents of a register

2. Which operation does the XRA instruction perform in the 8085
microprocessor?
a) Bitwise XOR b) Bitwise AND c) Bitwise OR d) Bitwise shift

Answer: a) Bitwise XOR

3. Which instruction is used to transfer control to a subroutine in the 8085

microprocessor?
a) JMP b) CALL c) RET d) MOV

Answer: b) CALL

4. What does the Carry Flag (CY) indicate in the 8085 microprocessor?

a) Zero result in an operation

b) End of an instruction cycle
c) Even parity
d) Overflow of the most significant bit

Answer: d) Overflow of the most significant bit

5. The MOV A, M instruction in the 8085 microprocessor performs which of the

following operations?
a) Move data from accumulator to a memory location
b) Move data between registers
c) Move data from memory to accumulator
d) Move immediate data to a register

Answer: c) Move data from memory to accumulator

 [Link] Computer Science – SEMESTER -III

1.7 PERIPHERAL OR EXTERNAL INITIATED

OPERATIONS
The 8085 microprocessor can interact with peripheral devices and respond to external events
through a variety of operations. These interactions are crucial for implementing real-world
applications where the microprocessor must communicate with external hardware like
keyboards, displays, memory, and other I/O devices. Peripheral or external initiated
operations in the 8085 microprocessor include interrupt handling, direct memory access
(DMA), and input/output operations.

1.7.1. Interrupt Handling

Interrupts are signals that temporarily halt the current execution of the microprocessor to
attend to a high-priority task. The 8085 microprocessor supports several types of interrupts,
categorized as hardware and software interrupts.
Hardware Interrupts:

 TRAP: A non-maskable interrupt with the highest priority. It cannot be disabled and is
typically used for critical events like power failure.
 RST7.5, RST6.5, RST5.5: Maskable vectored interrupts with decreasing priority
from RST7.5 to RST5.5. They can be enabled or disabled using software instructions.
 INTR: A non-vectored interrupt with the lowest priority. It requires an external
device to provide the interrupt vector (address of the interrupt service routine).
Software Interrupts:

 These are instructions like RST0 to RST7, which cause the microprocessor to jump to
a predefined memory location to execute a subroutine.
Interrupt Process: When an interrupt occurs, the following steps are performed:

1. The microprocessor completes the current instruction.

2. The Program Counter (PC) and the status of the microprocessor are saved on the stack.
3. The microprocessor jumps to a fixed memory location (for vectored interrupts) or an
address provided by the external device (for non-vectored interrupts).
4. The interrupt service routine (ISR) is executed.
5. The microprocessor restores the PC and status from the stack and resumes the
execution of the interrupted program.

1.7.2. Direct Memory Access (DMA)

DMA allows peripheral devices to transfer data directly to or from memory without involving
the microprocessor, thereby freeing the microprocessor to perform other tasks. The 8085
supports DMA through the HOLD and HLDA signals.
 [Link] Computer Science – SEMESTER -III

 HOLD: An external device requests the use of the system buses by asserting the
HOLD signal.
 HLDA: The microprocessor acknowledges the HOLD request by asserting the HLDA
signal, indicating that it has relinquished control of the buses.
In DMA mode, the external device directly controls the memory address and data buses to
transfer data between memory and the peripheral device.

1.7.3. Input/Output Operations

The 8085 microprocessor communicates with peripheral devices through I/O ports using two
primary methods: I/O-mapped I/O and memory-mapped I/O.
I/O-mapped I/O:

 Uses special instructions IN and OUT to transfer data between the accumulator and I/O
ports.
 The I/O ports have an 8-bit address space, allowing for 256 distinct I/O ports.

Example:

IN 80H ; Read data from I/O port with address 80H into the accumulator OUT
81H ; Write data from the accumulator to I/O port with address 81H
Memory-mapped I/O:

 Treats I/O devices as memory locations, using standard data transfer

instructions.
 The I/O devices share the same address space as memory, allowing for more complex
data handling.
Example:

MVI A, 30H ; Load 30H into the accumulator

STA 5000H ; Store the accumulator content at memory location 5000H (which is an
I/O device in memory-mapped I/O)
1.7.4. Serial Communication

The 8085 microprocessor also supports serial communication through the SID (Serial Input
Data) and SOD (Serial Output Data) lines, allowing for bit-by-bit data transfer with external
devices.
SID: Used for receiving serial data. SOD: Used for transmitting serial data.
Example:
SIM ; Set Serial Output Data (SOD) based on accumulator content
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RIM ; Read Serial Input Data (SID) into the accumulator

Peripheral or external initiated operations in the 8085 microprocessor are essential for
effective communication with external devices and handling high-priority tasks.
Understanding interrupt handling, DMA, I/O operations, and serial communication enables
the implementation of responsive and efficient microprocessor-based systems. These
capabilities allow the 8085 to interact seamlessly with a wide range of peripherals, making it
suitable for various applications in embedded systems and real-time processing.

Let us sum up:

Peripheral or External Initiated Operations

1. Interrupt Handling:
o Definition: Interrupts are signals from peripheral devices indicating that they
require attention from the microprocessor, allowing it to pause its current
operations to respond to the event.
o Types of Interrupts: Includes hardware interrupts (triggered by external
devices) and software interrupts (initiated by programs). The 8085
microprocessor supports several interrupt types, such as RST (Restart) and
INTR (Interrupt Request).
o Process: Upon receiving an interrupt, the microprocessor saves the current
execution context, determines the type of interrupt, and executes the
corresponding interrupt service routine (ISR) to address the request before
resuming normal operations.
2. Direct Memory Access (DMA):
o Definition: DMA is a method that allows peripheral devices to transfer data to
and from memory independently of the CPU, improving system performance
by freeing up the processor for other tasks.
o Operation: A DMA controller takes control of the address and data buses,
allowing it to read from or write to memory directly. The microprocessor is
notified once the data transfer is complete, minimizing the need for constant
CPU intervention.
o Advantages: Reduces CPU overhead and increases data transfer efficiency,
making it suitable for high-speed data transfer applications like disk drives and
video processing.
3. Input/Output Operations:
o I/O Interfaces: The 8085 microprocessor interfaces with various peripheral
devices through memory-mapped I/O and I/O-mapped I/O addressing modes,
allowing it to read from and write to devices such as keyboards, displays, and
sensors.
o Control Signals: The microprocessor generates control signals (READ,
WRITE) to manage data flow between itself and I/O devices, coordinating
communication effectively.
 [Link] Computer Science – SEMESTER -III

o Polling vs. Interrupts: In polling, the CPU regularly checks the status of I/O
devices, which can be inefficient. In contrast, interrupts allow the CPU to react
only when an I/O device requires attention, improving efficiency.
4. Serial Communication:
o Definition: Serial communication refers to the process of transmitting data
one bit at a time over a single communication channel or wire, making it
suitable for long-distance communication and reducing wiring complexity.
o Protocols: Common serial communication protocols include UART
(Universal Asynchronous Receiver-Transmitter) and SPI (Serial Peripheral
Interface), which define the methods for data transmission, error checking, and
synchronization.
o Application: Used in various applications, including connecting
microprocessors to sensors, data acquisition systems, and communication
between devices in embedded systems.

Check Your Progress

1. Which interrupt in the 8085 microprocessor has the highest priority and cannot
be disabled?
a) RST7.5 b) INTR c) TRAP d) RST5.5

Answer: c) TRAP

2. What is the purpose of the HLDA signal in DMA operations?

a) To request use of the system buses

b) To acknowledge the HOLD request

c) To initiate a data transfer

d) To terminate the DMA operation

Answer: b) To acknowledge the HOLD request

3. How many distinct I/O ports can be addressed using I/O-mapped I/O in the 8085?
a) 128 b) 256 c) 512 d) 1024

Answer: b) 256

4. What is the purpose of the SID line in the 8085 microprocessor?

a) For transmitting serial data

 [Link] Computer Science – SEMESTER -III

b) For receiving serial data

c) For handling interrupts

d) For DMA operations

Answer: b) For receiving serial data
5. Which instruction is used to set the Serial Output Data (SOD) based on
accumulator content?
a) SIM b) RIM c) SOD d) OUT
Answer: a) SIM
 [Link] Computer Science – SEMESTER III UNIT – II

UNIT II: MICROPROCESSOR

8085 Microprocessor – Pinout and Signals – Functional block diagram - 8085 Instruction
Set and Classifications

Section No Topic Page

No
2.1 8085 MICROPROCESSOR
2.1.1 Introduction to Microprocessors
2.1.2 Pinout and Signals
2.1.3 Functional Block Diagram
2.1.4 Internal Architecture
2.1.5 Instruction Set and Classifications
2.1.6 Programming Model
2.1.7 Interrupts and I/O
2.1.8 Applications and Advantages
2.2 PINOUT AND SIGNALS
2.2.1 Address Bus (AD0-AD15)
2.2.2 Data Bus (D0-D7)
2.2.3 Control Signals
2.2.4 Interrupt Signals
2.2.5 Power Supply and Ground Pins
2.3 FUNCTIONAL BLOCK DIAGRAM
2.3.1 Arithmetic and Logic Unit (ALU):
2.3.2 Registers:
2.3.3 Control Unit:
2.3.4 Instruction Decoder:
2.3.5 Address and Data Bus Interface:
2.3.6 Clock Generator:
2.3.7 Interrupt Control Unit:
2.3.8 Memory Interface:
8085 INSTRUCTION SET ARCHITECTURE AND
2.4 CLASSIFICATIONS
2.4.1 Overview of Instruction Set
2.4.2 Instruction Format
2.4.3 Instruction Types and Examples
2.4.4 Addressing Modes
2.4.5 Instruction Classification
2.4.6 Instruction Execution Cycle
 [Link] Computer Science – SEMESTER III UNIT – II

2.1 8085 MICROPROCESSOR

Definition and Importance:

The 8085 microprocessor, developed by Intel in 1976, is an 8-bit microprocessor designed for
simple embedded systems and educational purposes. It was widely used in early
microcomputer systems due to its simplicity and ease of use. Understanding its architecture is
fundamental for grasping how microprocessors function.
2.1.1. Introduction to Microprocessors
A microprocessor is an integrated circuit (IC) that acts as the central processing unit (CPU) of
a computer. It processes data according to instructions stored in its memory. The 8085
microprocessor is an 8-bit processor, which means it processes data in 8- bit chunks. It has a
16-bit address bus, capable of addressing up to 64 KB of memory, and an 8-bit data bus.
2.1.2. Pinout and Signals
The 8085 microprocessor has a 40-pin dual in-line package (DIP). Each pin serves a specific
function, including addressing, data transfer, control, and power supply.
 Pin Configuration:
 Address Bus (A15-A8, AD7-AD0): These pins are used to transmit the address and
data signals between the microprocessor and memory or peripherals.
 Data Bus (D7-D0): These are bidirectional pins used for transferring data between
the microprocessor and external devices.
 Control and Status Signals (RD, WR, IO/M, etc.): These pins control the timing
and operation of data transfer and indicate the status of the microprocessor.
 Power Supply and Clock Signals (Vcc, Vss, CLK): These pins provide power and
clock signals to the microprocessor.
 Signal Description:
 Address Bus (A15-A8, AD7-AD0): The address bus carries the addresses of data or
instructions between the microprocessor and memory or I/O devices.
 Data Bus (D7-D0): The data bus carries data between the microprocessor and memory
or I/O devices.
 Control Signals (RD, WR, IO/M, etc.): These signals control the data flow between
the microprocessor and memory or I/O devices, specifying whether a read or write
operation is being performed.
 Clock Signal (CLK): The clock signal synchronizes the internal operations of the
microprocessor.
2.1.3. Functional Block Diagram
The functional block diagram of the 8085 microprocessor provides an overview of its internal
architecture and how different components interact with each other.
 Functional Units:
 Arithmetic and Logic Unit (ALU): Performs arithmetic and logical operations on
data.
 Registers: Holds data and addresses temporarily during processing.
 Control Unit: Directs the operations of the microprocessor by generating control
 [Link] Computer Science – SEMESTER III UNIT – II

signals.
 Instruction Register (IR): Holds the current instruction being executed.
 Timing and Control Unit: Generates timing and control signals for
coordinating operations.
 Interrupt Control: Manages interrupt signals from external devices.
 Block Diagram Components:
 ALU: Performs arithmetic (addition, subtraction) and logical (AND, OR, NOT, XOR)
operations.
 Registers (Accumulator, BC, DE, HL, SP, PC): Temporarily stores data and
addresses.
 Instruction Decoder: Decodes instructions fetched from memory to produce control
signals.
 Timing and Control Unit: Generates timing signals necessary for the
execution of instructions.
 Interrupt Control: Manages interrupts from external devices.
2.1.4. Internal Architecture
The internal architecture of the 8085 microprocessor consists of various registers, a control
unit, and an arithmetic and logic unit (ALU).
 Registers:
 Accumulator (A): Stores the result of most arithmetic and logical operations.
 General Purpose Registers (B, C, D, E, H, L): Used for various purposes, such as
storing operands and addresses.
 Special Purpose Registers:
 Program Counter (PC): Holds the memory address of the next instruction to be
fetched.
 Stack Pointer (SP): Points to the top of the stack.
 Flag Register: Contains flags that indicate the result of an operation (zero, carry,
etc.).
 Control Unit:
 Decodes instructions fetched from memory.
 Generates control signals to coordinate the activities of the other units.
 Arithmetic and Logic Unit (ALU):
 Performs arithmetic and logical operations on data.
 Uses the data from the registers and stores the result back into the registers.
 Timing and Control Signals:
 Machine Cycle: The execution of one instruction or operation.
 Instruction Cycle: The time taken to complete an instruction.
2.1.5. Instruction Set and Classifications
The instruction set of the 8085 microprocessor consists of 74 instructions, which are
classified based on their functions and addressing modes.
 Instruction Categories:
 Data Transfer Instructions: MOV, MVI, LXI, LDA, STA, SHLD, LHLD.
 Arithmetic Instructions: ADD, SUB, INR, DCR, ADC, SBB.
 [Link] Computer Science – SEMESTER III UNIT – II

 Logical Instructions: ANA, ORA, XRA, CMP, CMA, CMC.

 Branching Instructions: JMP, JC, JNC, JZ, JNZ, CALL, RET.
 Stack Operations: PUSH, POP.
 Addressing Modes:
 Immediate Addressing: Data is specified directly in the instruction.
 Direct Addressing: Data is stored in a memory location specified in the
instruction.
 Register Addressing: Data is stored in a register specified in the instruction.
 Indirect Addressing: Data is stored in a memory location whose address is specified
in a register pair.
 Instruction Execution:
 Fetch: The microprocessor fetches the next instruction from memory.
 Decode: The instruction is decoded to determine what operation to perform.
 Execute: The operation specified by the instruction is performed.
2.1.6. Programming Model
The programming model of the 8085 microprocessor describes how the registers are used in
programming.
 Register Usage:
 Accumulator (A): Primary register for arithmetic and logic operations.
 General Purpose Registers (B, C, D, E, H, L): Used for various purposes,
including arithmetic, data transfer, and address manipulation.
 Program Counter (PC): Holds the address of the next instruction.
 Stack Pointer (SP): Points to the top of the stack.
 Flag Register: Contains flags that indicate the status of the ALU operations.
 Programming Examples:
 Simple arithmetic operations.
 Data transfer between registers and memory.
 Branching and looping using conditional instructions.
2.1.7. Interrupts and I/O
The 8085 microprocessor supports interrupt-driven I/O operations.
 Interrupts:
 Types: Maskable and non-maskable interrupts.
 Handling: Interrupt service routine (ISR) and interrupt vector table.
 I/O Operations:
 Instructions: IN, OUT.
 Addressing: I/O ports are addressed separately from memory.
2.1.8. Applications and Advantages
The 8085 microprocessor was used in a wide range of applications due to its simplicity and
versatility.
 Applications:
 Embedded systems.
 Industrial control systems.
 [Link] Computer Science – SEMESTER III UNIT – II

 Educational purposes.
 Advantages:
 Simple and easy to understand.
 Low cost and power consumption.
 Suitable for basic control applications.

Let Us Sum Up:

1. Introduction to Microprocessors
 A microprocessor is an integrated circuit (IC) that contains the functions of a central
processing unit (CPU) of a computer.
 Performs arithmetic, logic, control, and input/output (I/O) operations.
 Acts as the brain of a computer or embedded system.
 Key components: Arithmetic Logic Unit (ALU), Control Unit (CU), and Registers.
 Examples: Intel 8085, Intel 8086, ARM processors.
2. Pinout and Signals
 Pinout refers to the arrangement of pins on the microprocessor, each with a specific
function.
 Common signals include:
 Power and Ground Pins: For powering the microprocessor (e.g., Vcc, GND).
 Data Bus: Carries data between the microprocessor and memory or
peripherals.
 Address Bus: Sends the address of memory locations to be accessed.
 Control Pins: Controls operations like reading, writing, and interrupt handling (e.g.,
RD, WR, RESET, INTR).
 Clock Signal: Synchronizes the microprocessor’s operations (CLK).
3. Functional Block Diagram
 A visual representation of the internal structure of the microprocessor.
 Main blocks:
 ALU: Performs arithmetic and logical operations.
 Control Unit: Manages the execution of instructions.
 Registers: Temporary storage for data and instructions.
 Bus Interface Unit (BIU): Manages data transfer between the processor and
memory/peripherals.
 Memory: Stores instructions and data.
4. Internal Architecture
 Describes the internal working of the microprocessor.
 Key components:
 ALU: Performs operations like addition, subtraction, AND, OR.
 Control Unit: Directs the operation of the processor by interpreting instructions.
 Registers: Small, fast storage locations for immediate data access.
 Instruction Decoder: Interprets the instructions fetched from memory.
 [Link] Computer Science – SEMESTER III UNIT – II

 Stack Pointer and Program Counter: Manage execution flow and memory
addressing.
5. Instruction Set and Classifications
 Instruction Set: A group of commands the microprocessor can execute.
 Classifications:
 Data Transfer Instructions: MOV, IN, OUT, etc.
 Arithmetic Instructions: ADD, SUB, MUL, DIV, etc.
 Logical Instructions: AND, OR, XOR, NOT, etc.
 Control Instructions: JMP, CALL, RET, etc.
 Branching Instructions: Conditional (JZ, JNZ) and unconditional (JMP).
 CISC (Complex Instruction Set Computing) vs. RISC (Reduced Instruction Set
Computing).
6. Programming Model
 Describes how the processor executes instructions and manipulates data.
 Components include:
 Registers: Program Counter (PC), Stack Pointer (SP), Accumulator (A), Flag Register.
 Memory: Program memory and data memory for instruction and data storage.
 Flags: Status indicators such as Zero Flag (Z), Carry Flag (CY), etc.
 Provides an abstraction for low-level programming.
7. Interrupts and I/O
 Interrupts: Signals that temporarily halt the microprocessor’s current task to attend
to high-priority tasks.
 Types of Interrupts: Maskable, Non-maskable, Software, and Hardware
interrupts.
 Examples: INTR, TRAP, RST in 8085 microprocessors.
 I/O (Input/Output): Interface for communication between the microprocessor and
external devices.
 Memory-mapped I/O: I/O devices treated as memory locations.
 Port-mapped I/O: Special instructions for I/O operations using ports.
8. Applications and Advantages
 Applications:
o Embedded systems: Automotive systems, consumer electronics.
o Computing systems: Laptops, desktops, servers.
o Communication systems: Routers, modems.
o Control systems: Industrial automation, robotics.
 Advantages:
o Compact size and low power consumption.
o High processing speed and efficiency.
o Versatility: Used in diverse fields from consumer electronics to industrial
systems.
o Programmable for different tasks and applications.
 [Link] Computer Science – SEMESTER III UNIT – II

Check your Progress:

1. The 8085 microprocessor has how many address lines?

a) 8
b) 16
c) 32
d) 64
Answer: b) 16
2. Which pin is used for providing the clock signal to the 8085
microprocessor?
a) X1, X2
b) CLK OUT
c) ALE
d) IO/M
Answer: a) X1, X2
3. What is the size of the data bus in the 8085 microprocessor?
a) 8-bit
b) 16-bit
c) 32-bit
d) 64-bit
Answer: a) 8-bit
4. What is the maximum memory that can be addressed by the 8085
microprocessor?
a) 1 KB
b) 32 KB
c) 64 KB
d) 128 KB
Answer:c) 64 KB
5. The 8085 microprocessor operates at a clock frequency of:
a) 1 MHz
b) 3 MHz
c) 10 MHz
d) 5 MHz
Answer: b) 3 MHz
 [Link] Computer Science – SEMESTER III UNIT – II

2.2 PINOUT AND SIGNALS

Here's a breakdown of the pinout signals for the 8085 microprocessor:
2.2.1. Address Bus (AD0-AD15):
 The Address Bus consists of 16 lines (AD0-AD15).
 These lines carry the memory address or I/O port address during memory
read/write or I/O operations.
 The 8085 microprocessor can address up to 64KB of memory and 256 I/O ports.
2.2.2. Data Bus (D0-D7):

 The Data Bus comprises 8 lines (D0-D7).

 These lines transfer data between the microprocessor and external devices such as
memory and I/O ports.
 During memory read/write or I/O operations, the data to be read from or written to
external devices is transmitted through these lines.

Fig. 1 Pin diagram of 8085

2.2.3. Control Signals:

 ALE (Address Latch Enable):

 ALE is a pulse generated by the microprocessor during the first clock cycle of each
machine cycle.
 It is used to latch the address from the address bus onto the external latch ICs.
 RD (Read) and WR (Write):
 RD and WR signals indicate whether the microprocessor is performing a read or write
operation.
 [Link] Computer Science – SEMESTER III UNIT – II

 RD is active low during a memory read operation, while WR is active low during a
memory write operation.
 IO/M (Input/Output and Memory):
 IO/M indicates whether the microprocessor is performing an I/O operation or a
memory operation.
 When IO/M is high, the microprocessor performs an I/O operation; when it's low, it
performs a memory operation.
 S0, S1, S2 (Status Signals):
 These signals provide status information about the current operation of the
microprocessor.
 Different combinations of S0, S1, and S2 indicate different machine cycles.
 INTA (Interrupt Acknowledge):
 INTA is generated by the microprocessor to acknowledge interrupt requests from
external devices.
 It indicates that the microprocessor has accepted the interrupt request and is ready to
proceed with the interrupt service routine.
2.2.4. Interrupt Signals:

 INTR (Interrupt Request):

 INTR is a hardware interrupt request signal generated by external devices.
 When an external device requests an interrupt, it asserts the INTR signal to the
microprocessor.
 INT (Interrupt):
 INT is a maskable interrupt request input.
 It can be enabled or disabled by the microprocessor using software instructions.
2.2.5. Power Supply and Ground Pins:

 Vcc (Power Supply):

 Vcc is the supply voltage pin for the microprocessor.
 It provides the necessary operating voltage for the microprocessor.
 GND (Ground):
 GND is the ground or reference voltage pin for the microprocessor.
 It provides the reference point for the electrical circuit and completes the circuit path.
 Understanding these pinout signals is essential for interfacing the 8085
microprocessor with external devices and designing systems around it.

Let us Sum Up

Address Bus (AD0-AD15)

 Carries memory addresses: Used to specify the location in memory or I/O where
data will be read or written.
 16-bit width: In systems like the 8085/8086, it allows addressing up to 64 KB (2^16)
of memory space.
 [Link] Computer Science – SEMESTER III UNIT – II

Data Bus (D0-D7)

 Transfers data: An 8-bit bus used to send and receive data between the
microprocessor, memory, and peripherals.
 Bidirectional: Data can flow both ways—into the processor during read
operations and out during write operations.
Control Signals
 Manage read/write operations: Signals like RD and WR control whether the
microprocessor reads data from or writes data to memory/I/O.
 Synchronize devices: ALE (Address Latch Enable) and READY signals help
coordinate operations with slower peripherals.
Interrupt Signals
 Handle external events: Signals like INTR (Interrupt Request) and TRAP notify the
processor of high-priority tasks or emergencies.
 Acknowledge interrupts: INTA (Interrupt Acknowledge) confirms that the
microprocessor is responding to an interrupt.
Power Supply and Ground Pins
 Vcc: Provides the operating voltage necessary for the microprocessor to function
(e.g., 5V for 8085).
 GND: Establishes the reference ground for the circuit, ensuring proper power flow
and operation stability.
[Link] of the following is a control signal of the 8085 microprocessor?
a) S0, S1
b) ALE
c) HOLD
d) All of the above
Answer:d) All of the above
2. The 8085 microprocessor has how many registers?
a) 6
b) 8
c) 10
d) 12
Answer: a) 6 (B, C, D, E, H, L)
3. What is the purpose of the ALE (Address Latch Enable) pin in the 8085?
a) To latch the higher-order address lines
b) To latch the lower-order address lines
c) To provide clock input
d) To reset the microprocessor
Answer:b) To latch the lower-order address lines
4. Which register pair is used as the Program Counter in 8085?
a) BC
b) DE
c) SP
d) None of the above
 [Link] Computer Science – SEMESTER III UNIT – II

Answer: d) None of the above

5. What is the function of the HOLD pin in the 8085?
a) Hold operation for DMA
b) Provides interrupt handling
c) Generates clock pulses
d) Restarts the microprocessor
Answer: a) Hold operation for DMA

2.3 FUNCTIONAL BLOCK DIAGRAM

The functional block diagram of the 8085 microprocessor illustrates its internal architecture and how
different functional units interact with each other. Here's a breakdown of the major components typically
depicted in the block diagram:
2.3.1. Arithmetic and Logic Unit (ALU):
 The ALU performs arithmetic and logic operations on data received from the registers
and memory.
 It can perform operations such as addition, subtraction, logical AND, logical OR, etc.
2.3.2. Registers:
 Accumulator (A): The primary register for arithmetic and logic operations.
Results of ALU operations are often stored here.
 General-Purpose Registers (B, C, D, E, H, L): These registers are used for various
data manipulation tasks.
 Stack Pointer (SP): Used to manage the stack for subroutine calls and returns.
 Program Counter (PC): Keeps track of the memory address of the next
instruction to be fetched and executed.
 Instruction Register (IR): Holds the current instruction being executed.
 Temporary Register (Temp): Provides temporary storage for data during certain
operations.
2.3.3. Control Unit:
 The Control Unit coordinates the execution of instructions by controlling the flow of
data between different functional units.
 It generates control signals to regulate the operation of the ALU, registers, and other
components.
2.3.4. Instruction Decoder:
 The Instruction Decoder decodes the instructions fetched from memory and generates
the necessary control signals to execute them.
 It interprets the opcode of each instruction and directs the microprocessor to perform
the corresponding operation.
2.3.5. Address and Data Bus Interface:
 The Address Bus carries the memory address or I/O port address during memory
read/write or I/O operations.
 The Data Bus transfers data between the microprocessor and external devices such as
memory and I/O ports.
 [Link] Computer Science – SEMESTER III UNIT – II

2.3.6. Clock Generator:

 The Clock Generator generates the clock signals required for synchronizing the
operation of different components within the microprocessor.
 It provides timing signals to control the execution of instructions and coordinate data
transfers.
2.3.7. Interrupt Control Unit:
 The Interrupt Control Unit manages interrupt requests from external devices.
 It prioritizes and handles interrupt requests, suspending the execution of the current
program to service the interrupt.
2.3.8. Memory Interface:
 The Memory Interface manages communication between the microprocessor and
external memory devices.
 It includes address buffers, data buffers, and control logic to facilitate memory
read/write operations.
 Processing Unit:
 Arithmetic and Logic Unit (ALU): Performs arithmetic and logical operations on
data fetched from memory or input/output devices. It operates on data provided by the
registers and produces results back to the registers.
 Instruction Unit:
 Instruction Register (IR): Holds the current instruction being executed.
 Instruction Decoder: Decodes the instructions fetched from memory to produce
control signals for the ALU, registers, and other units.
 Storage Interface Unit:
 Registers: Includes the Accumulator (A), General Purpose Registers (B, C, D, E, H,
L), Program Counter (PC), Stack Pointer (SP), and Flag Register. These registers
store data and addresses temporarily during processing.
By understanding the functional block diagram of the 8085 microprocessor, one can gain
insights into its internal structure and operation, facilitating the design and development of
software and hardware systems based on this architecture.
 [Link] Computer Science – SEMESTER III UNIT – II

Fig 2. Functional Block Diagram

Arithmetic and Logic Unit (ALU)
 Performs arithmetic operations: Handles basic arithmetic like addition,
subtraction, multiplication, and division.
 Logical operations: Executes logical operations such as AND, OR, NOT, and XOR,
and sets flags based on the results.
Registers
 Temporary data storage: Small, fast storage locations inside the CPU to hold data and
instructions during processing.
 Types of registers: Includes accumulator, general-purpose registers, program counter
(PC), and stack pointer (SP).
Control Unit
 Manages execution: Directs the flow of data between the ALU, memory, and I/O
devices, ensuring correct execution of instructions.
 Generates control signals: Issues control signals to synchronize and manage the
microprocessor’s operations.
Instruction Decoder
 Interprets instructions: Converts machine language instructions fetched from memory
into control signals for execution.
 Decodes opcodes: Reads the operation codes (opcodes) to determine the
appropriate operation for the microprocessor.
Address and Data Bus Interface
 Handles data transfer: Manages communication between the processor, memory,
and peripheral devices via the data and address buses.
 Multiplexing: In some microprocessors, it multiplexes address and data lines to reduce
pin count, separating address and data during different clock cycles.
Clock Generator
 Synchronizes operations: Generates a clock signal that governs the timing of all
operations inside the microprocessor.
 Controls execution speed: Defines the pace at which instructions are executed by the
processor.
Interrupt Control Unit
 Manages interrupts: Prioritizes and handles external interrupt signals,
temporarily halting current tasks to respond to urgent tasks.
 Interrupt vectors: Determines the appropriate interrupt service routine (ISR) to handle
the interrupt request.
Memory Interface
 Connects to memory: Manages reading from and writing to memory, controlling
address decoding and data flow.
 Supports different memory types: Interfaces with both RAM (for volatile data storage)
and ROM (for storing fixed instructions).
 [Link] – SEMESTER III UNIT - III

1. Which of the following is a machine cycle in the 8085 microprocessor?

a) Fetch
b) Execute
c) Write
d) All of the above
Answer: d) All of the above
2. Which interrupt has the highest priority in the 8085 microprocessor?
a) RST 7.5
b) INTR
c) TRAP
d) RST 5.5
Answer: c) TRAP
3. What is the function of the SID (Serial Input Data) pin?
a) Provides serial input data to the microprocessor
b) Provides serial output data from the microprocessor
c) Used to reset the microprocessor
d) Used for direct memory access
Answer: a) Provides serial input data to the microprocessor
4. The instruction "MOV A, B" does what in the 8085?
a) Moves data from register B to accumulator A
b) Moves data from accumulator A to register B
c) Moves data from memory to register A
d) Moves data from register A to memory
Answer: a) Moves data from register B to accumulator A
5. How many machine cycles are required for the "STA" instruction?
a) 2
b) 3
c) 4
d) 5
Answer: d) 5

2.4 8085 INSTRUCTION SET ARCHITECTURE AND

CLASSIFICATIONS
The 8085 microprocessor instruction set is a collection of instructions that the microprocessor
can execute. These instructions are classified based on their functions and addressing modes.
Understanding the instruction set architecture (ISA) of the 8085 microprocessor is essential
for programming and effectively utilizing its capabilities.
2.4.1. Overview of Instruction Set
 The 8085 microprocessor has a total of 74 instructions. Each instruction performs a
specific operation, such as data transfer, arithmetic and logical operations, branching,
and control operations. These instructions are encoded as binary codes and are stored
 [Link] – SEMESTER III UNIT - III

in memory for the microprocessor to fetch and execute.

2.4.2. Instruction Format
 The instructions in the 8085 microprocessor have varying formats depending on their
types and addressing modes. The basic instruction format includes an opcode and
operands, as described below:
 Opcode: Specifies the operation to be performed. Operands: Data or addresses on
which the operation is to be performed.
2.4.3. Instruction Types and Examples
 The instructions in the 8085 microprocessor can be categorized into several types
based on their functions. Here are the main types of instructions along with examples:
 Data Transfer Instructions:
 MOV Rd, Rs: Moves data from register Rs to register Rd or memory.
 MVI Rd, data: Moves immediate data into register Rd or memory.
 LDA address: Loads accumulator with data from memory location specified by
address.
 STA address: Stores accumulator contents into memory location specified by address.
 Arithmetic and Logical Instructions:
 ADD Rd: Adds contents of register Rd to accumulator.
 ADI data: Adds immediate data to accumulator.
 SUB Rd: Subtracts contents of register Rd from accumulator.
 INR Rd: Increments contents of register Rd.
 DCR Rd: Decrements contents of register Rd.
 ANA Rd: Performs bitwise AND operation between accumulator and register Rd.
 Branching Instructions:
 JMP address: Jumps to the memory location specified by address.
 JC address: Jumps to the specified address if carry flag is set.
 JZ address: Jumps to the specified address if zero flag is set.
 Control Transfer Instructions:
 CALL address: Calls a subroutine at the specified address.
 RET: Returns from subroutine.
 HLT: Halts the microprocessor.
 Stack Operations:
 PUSH Rp: Pushes contents of register pair Rp onto the stack.
 POP Rp: Pops contents from the stack into register pair Rp.
2.4.4. Addressing Modes
 Addressing modes specify how operands are specified in the instructions. The 8085
microprocessor supports various addressing modes:
 Immediate Addressing:
 MVI Rd, data: Loads immediate data into register Rd.
 Direct Addressing:
 LDA address: Loads accumulator with data from memory location specified by
address.
 Register Addressing:
 MOV Rd, Rs: Moves data from register Rs to register Rd.
 [Link] – SEMESTER III UNIT - III

 Indirect Addressing:
 LHLD address: Loads H and L registers with data from the memory location
specified by address.
2.4.5. Instruction Classification
 Instructions in the 8085 microprocessor are classified into groups based on their
functions and operational characteristics. The classifications include:
 Data Transfer Group:
 MOV, MVI, LXI, LDA, STA, SHLD, LHLD.
 Arithmetic Group:
 ADD, ADC, SUB, SBB, INR, DCR, CMP.
 Logical Group:
 ANA, XRA, ORA, CMP.
 Branching Group:
 JMP, JC, JNC, JZ, JNZ, CALL, RET.
 Control Group:
 NOP, HLT, RIM, SIM.
 Stack Operations:
 PUSH, POP.
2.4.6. Instruction Execution Cycle
 The execution cycle of an instruction in the 8085 microprocessor typically involves
three stages:
 Fetch: The instruction is fetched from memory into the instruction register (IR).
Decode: The opcode of the instruction is decoded. Execute: The instruction is
executed, and the result is stored back in the appropriate register or memory location.
Let Us Sum Up:

Instruction Format
 Structure of instructions: Typically includes the opcode (operation code) and
operands (data or memory addresses involved).
 Varying lengths: Instructions can be one-byte, two-byte, or three-byte
depending on the processor architecture and the number of operands.
Instruction Types and Examples
 Data transfer instructions: Move data between registers, memory, or I/O
devices (e.g., MOV, LDA).
 Arithmetic and logical instructions: Perform operations like addition,
subtraction, AND, OR, and XOR (e.g., ADD, SUB, AND).
Addressing Modes
 Immediate addressing: The operand is provided directly within the
instruction (e.g., MVI A, 05H).
 Direct, indirect, and register addressing: Specifies the location of operands
either directly, via registers, or through memory addresses (e.g., LDA 2500H,
MOV A, B).
Instruction Classification
 [Link] – SEMESTER III UNIT - III

 RISC vs. CISC:

o RISC: Simple instructions that execute in a single clock cycle.
o CISC: Complex instructions that may take multiple clock cycles.
 Classes of instructions: Include data transfer, arithmetic/logical,
branching, and control instructions.
Instruction Execution Cycle
 Fetch: The processor retrieves the instruction from memory.
 Decode and execute: The instruction is interpreted and carried out by the
control unit and ALU.

Check your Progress:

1. The "IN" instruction in the 8085 is used to:

a) Input data from a port to the accumulator
b) Output data from the accumulator to a port
c) Load data from memory to the accumulator
d) Store data from the accumulator to memory
Answer: a) Input data from a port to the accumulator
2. What does the instruction "NOP" do?
a) Clears the accumulator
b) No operation
c) Increments the program counter by 2
d) None of the above
Answer: b) No operation
3. The flag register of the 8085 has how many flags?
a) 4
b) 5
c) 6
d) 8
Answer:b) 5 (Sign, Zero, Auxiliary Carry, Parity, Carry)
4. The stack in the 8085 microprocessor grows:
a) Upward
b) Downward
c) Both directions
d) Randomly
Answer:b) Downward
5. Which instruction is used to load the stack pointer with a 16-bit address in 8085?
a) LXI SP
b) MOV SP
c) MVI SP
d) STA SP
Answer: a) LXI SP
 [Link] – SEMESTER III UNIT - III

UNIT III

BCD to Binary and Binary to BCD conversions - ASCII to BCD and BCD to ASCII
conversions - Binary to ASCII and ASCII to Binary conversions. BCD Arithmetic - BCD
addition and Subtraction - Multibyte Addition and Subtraction - Multiplication and Division.

Section No Topic Page

No

3.1 Introduction to Number

3.1.1 Binary Number System
3.1.2 Binary-Coded Decimal Number System
3.1.3 ASCII (American Standard Code for Information
Interchange)
3.2 BCD to Binary and Binary to BCD Conversion
3.2.1 BCD to Binary Conversion
3.2.2 Binary to BCD Conversion
3.3 BCD to ASCII and ASCII to BCD Conversion
3.3.1 BCD to ASCII Conversion
3.3.2 ASCII to BCD Conversion
3.4 Binary to ASCII and ASCII to Binary Conversion
3.4.1 Binary to ASCII Conversion
3.4.2 ASCII to Binary Conversion
3.5 BCD Addition and Subtraction
3.5.1 BCD Addition
3.5.2 BCD Subtraction
3.6 Multibyte BCD Addition and Subtraction
3.6.1 Multibyte BCD Addition
3.6.2 Multibyte BCD Subtraction
3.7 Multibyte BCD Multiplication and Division
Multibyte BCD Multiplication
Multibyte BCD Division
 [Link] – SEMESTER III UNIT - III

3.1 Introduction to Number

Number systems are fundamental to the fields of mathematics and computer science, providing a
standardized way to represent and work with numbers. Different number systems are used depending on
the context and the type of computation or representation required. This module explores number
systems such as BCD, Binary, and ASCII.
3.1.1 Binary Number System
The binary number system is a base-2 numeral system that uses only two symbols: 0
and 1. Each digit in a binary number is called a bit. The binary numbers here are expressed in
the base-2 numeral system. For example, (101)2 is a binary number.
Some binary notation lists of decimal numbers from 1 to 30 are below.

Number Binary Number Binary Number Binary

Number Number Number

1 1 11 1011 21 10101
2 10 12 1100 22 10110
3 11 13 1101 23 10111
4 100 14 1110 24 11000
5 101 15 1111 25 11001
6 110 16 10000 26 11010
7 111 17 10001 27 11011
8 1000 18 10010 28 11100
9 1001 19 10011 29 11101
10 1010 20 10100 30 11110

Binary is the fundamental language of computers and digital systems. All operations
in a computer's hardware are performed using binary arithmetic.
3.1.2 Binary-Coded Decimal Number System
Binary-coded decimal (BCD) is a form of digital encoding where each decimal digit
(0-9) is represented by a fixed binary number. In binary-coded decimal, each individual digit
of a number is converted into a binary number, and then the BCD code is generated by
combining them all. But always remember that a binary-coded decimal is not a binary
representation of a decimal number. BCD notation for the digits 0-9 is listed below.

Number BCD
Number

1 0001
 [Link] – SEMESTER III UNIT - III

2 0010
3 0011
4 0100
5 0101
6 0110
7 0111
8 1000
9 1001

3.1.3 ASCII (American Standard Code for Information Interchange)

ASCII (American Standard Code for Information Interchange) is a character encoding

standard that uses 7-bit binary numbers (extended ASCII uses 8 bits) to represent text
characters, control codes, and other symbols used in computers and communication
equipment. ASCII was developed in the 1960s to standardize text representation for
compatibility between devices and systems.
ASCII assigns a unique 7-bit binary code to each character. This includes:

 128 characters in total (27), ranging from 0 to 127.

Control characters (0-31 and 127) for control and formatting purposes (e.g., line
feed, carriage return).
Printable characters (32-126) including letters, digits, punctuation marks, and
special symbols.
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Example
 [Link] – SEMESTER III UNIT - III

Here are a few ASCII characters and their corresponding binary representations:

 Decimal 65 (uppercase 'A') is represented in binary as 01000001.

 Decimal 97 (lowercase 'a') is represented in binary as 01100001.
 Decimal 48 (digit '0') is represented in binary as 00110000.
 Decimal 33 (exclamation mark '!') is represented in binary as 00100001.

Fig 1. ASCII Table

Let us sum up:

Binary Number System

 Base-2 system: Uses only two digits, 0 and 1, to represent numbers, where each
digit is a bit (binary digit).
 Place value: Each bit represents a power of 2, starting from 202^020 on the right.
Example: Binary 1011 is equal to 1×23+0×22+1×21+1×20=111 \times 2^3 + 0
\times 2^2 + 1 \times 2^1 + 1 \times 2^0 = 111×23+0×22+1×21+1×20=11 in
decimal.
Binary-Coded Decimal (BCD) Number System

 Representation of decimal digits: Each decimal digit (0-9) is represented by its

corresponding 4-bit binary equivalent. For example, decimal 7 is 0111 in BCD.
 Used in digital systems: Commonly used in calculators and digital clocks where
exact decimal representation is needed.
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ASCII (American Standard Code for Information Interchange)

 7-bit encoding: ASCII represents characters (letters, digits, symbols) using 7 bits,
allowing for 128 unique characters. Example: The letter 'A' is represented by 65 in
decimal, or 1000001 in binary.
 Standard for text: Widely used for encoding text in computers and
communication systems, making it possible to interchange data between
systems.

Check your Progress:

1. Which number system uses only two digits, 0 and 1, to represent all
numbers?

A) Decimal
B) Binary
C) Hexadecimal
D) Octal

Answer: B) Binary

2. How many bits are used to represent each decimal digit in Binary-Coded
Decimal (BCD)?

A) 2 bits
B) 3 bits
C) 4 bits
D) 8 bits

Answer: C) 4 bits

3. In the binary number system, what is the decimal equivalent of the binary
number 1011?

A) 9
B) 10
C) 11
D) 13

Answer: C) 11

4. What does the acronym ASCII stand for?

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A) American Standard Code for Instruction Interchange

B) Advanced System for Code Information
C) American Standard Code for Information Interchange
D) Automated Standard Coding for Information Interaction
Answer: C) American Standard Code for Information Interchange
5. How many unique characters can be represented using a 7-bit ASCII code?
A) 64
B) 128
C) 256
D) 512
Answer: B) 128
BCD TO BINARY CONVERSION

3.2 BCD to Binary and Binary to BCD Conversion

In this section, we are converting a BCD number to its binary equivalent. First, we
need to cut each nibble of the input. We can simply mask the number by adding 0FH and F0H
to the input. When the higher-order nibble is cut, rotate it to the right four times to transfer it to
the lower nibble. Then multiply it by 10 (0Ah).
Add the lower digit:
 Move the original BCD value to the accumulator.
 Mask off the higher nibble, keeping only the lower digit.
 Add this to the result.
The following code converts the BCD number to a Binary number with an example code to
convert BCD 25 (stored in register B) to binary.
MOV A, B ; Move BCD value (0010 0101) to accumulator
ANI 0F0H ; Mask lower nibble (A = 0010 0000)
RRC ; Rotate right (A = 0001 0000)
RRC ; Rotate right (A = 0000 1000)
RRC ; Rotate right (A = 0000 0100)
RRC ; Rotate right (A = 0000 0010) - higher digit (2) in lower nibble
MOV C, A ; Store 2 in register C
MVI D, 0AH ; Move 10 (0Ah) to register D
MOV A, C ; Move 2 to accumulator
MUL D ; Multiply (A = 0001 0100) binary 20
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MOV E, A ; Store result in E

MOV A, B ; Move original BCD (0010 0101) to A
ANI 0FH ; Mask higher nibble (A = 0000 0101) - lower digit (5)
ADD E ; Add to previous result (A = 0001 1001) binary 25
MOV BCD_BIN A ; Store the result in BCD_BIN

This code's result is stored in BCD_BIN. The table for BCD code equivalent to Binary code is
shown below.

Fig 2. BCD Code

3.2.2 BINARY TO BCD CONVERSION

The general algorithm for binary to BCD conversion is:
1. Divide the binary number by 10.
2. The remainder is the least significant BCD digit.
3. Repeat the division with the quotient until the quotient becomes 0.
4. Collect the remainders in reverse order to get the BCD representation.
In 8085, there was no direct division instruction. Instead, we use a subroutine that performs
division by repeated subtraction.
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Example code:
 Convert binary 52 (110100) to BCD
 Assume binary 52 is in register pair HL (H=00, L=34H)

MVI H, 00H ; Higher byte of binary number (00)

MVI L, 34H ; Lower byte of binary number (34H = 110100 = 52 in decimal)
LXI B, 000AH ; BC = 000A (divisor 10, 0AH in hex)
PUSH B ; Save divisor on stack

CALL BINDIV ; Call binary division subroutine

; After BINDIV, L contains remainder (2), H contains quotient (5)

MOV A, L ; A = 02 (BCD for 2)
RLC ; Rotate left (A = 0010 0000)
RLC ; Rotate left (A = 0100 0000)
RLC ; Rotate left (A = 1000 0000)
RLC ; Rotate left (A = 0000 0000, carry flag set)
MOV A, H ; A = 05 (BCD for 5)
RAL ; Rotate left through carry (A = 0101 0000)
ORI 02H ; OR with 02 (A = 0101 0010) - BCD 52
; Result: Accumulator (A) now contains 0101 0010 (BCD 52)

HLT ; Halt program

Binary Division Subroutine (BINDIV)

BINDIV:
MVI D, 00H ; D will count number of subtractions (quotient)
DIVLP:
MOV A, L ; Move lower byte of dividend to A
SUB C ; Subtract lower byte of divisor
MOV L, A ; Store result back in L
MOV A, H ; Move higher byte of dividend to A
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SBB B ; Subtract higher byte of divisor with borrow

MOV H, A ; Store result back in H
JC DIVDN ; If borrow (carry), division is done
INR D ; Increment quotient
JMP DIVLP ; Continue division
DIVDN:
DAD B ; Add divisor back (undo last subtraction)
MOV A, D ; Move quotient to A
MOV H, A ; Store quotient in H

RET ; Return from subroutine

Let us sum up:

BCD to Binary Conversion

1. Convert each BCD digit to its binary equivalent: Each 4-bit BCD digit (0-9) is
converted to its corresponding binary value. For example, BCD 0101 0011 (which
represents decimal 53) is converted to binary 110101.
2. Combine binary digits: After converting each BCD digit to binary, combine the
binary results to form the final binary number.
Binary to BCD Conversion

1. Divide the binary number: Separate the binary number into its decimal equivalent,
and then convert each decimal digit to a 4-bit BCD representation. For example,
binary 101101 (which equals 45 in decimal) is converted to BCD 0100 0101.
2. Pack into 4-bit groups: Each decimal digit is represented by a 4-bit BCD code,
which is packed together to represent the entire number.

1. In BCD (Binary-Coded Decimal), how many bits are used to represent each
decimal digit?
A) 2 bits
B) 3 bits
C) 4 bits
D) 8 bits

Answer: C) 4 bits

2. What is the BCD representation of the decimal number 25?

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A) 0010 0101
B) 1010 0101
C) 1100 0011
D) 0011 0100

Answer: A) 0010 0101

3. Which of the following binary numbers represents the decimal value 13?

A) 1010
B) 1110
C) 1101
D) 1001

Answer: C) 1101

4. When converting the BCD 0110 1001 to binary, what is the resulting binary
number?

A) 101110
B) 110101
C) 100001
D) 1000101

Answer: A) 101110 (BCD 0110 1001 = 69 in decimal = 101110 in binary)

5. What is the BCD equivalent of the binary number 110010 (which equals 50 in
decimal)?

A) 0101 0000
B) 0011 0100
C) 0100 0011
D) 0110 1010

Answer: A) 0101 0000 (BCD for 50 is 0101 0000)

6. How is the binary number 101101 (which equals 45 in decimal) represented in BCD?

A) 0101 1010
B) 1001 1100
C) 0100 0101
D) 1101 0110

Answer: C) 0100 0101 (BCD for 45 is 0100 0101)

3.3 BCD to ASCII and ASCII to BCD Conversion

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3.3.1 BCD TO ASCII CONVERSION

Converting BCD (Binary Coded Decimal) to ASCII in 8085 assembly involves
manipulating 4-bit nibbles representing decimal digits. The process uses bitwise operations
(ANI) to isolate high and low nibbles, rotations (RRC) to shift the high nibble if needed, and
addition (ADD 30H) to convert digits to their ASCII equivalents. ASCII values for digits start
at 30H ('0'). The program typically uses memory (DB) to store BCD input and ASCII output,
moves data with MOV, and employs subroutines (CALL, RET) for clarity. This conversion is
crucial for displaying numeric data on ASCII-based devices in microprocessor systems.
ORG 0000H ; Starting address

MOV A, BCD_NUM ; Load the BCD number into the accumulator

CALL CONVERT_HIGH_NIBBLE ; Convert high nibble to ASCII
MOV ASCII_HIGH, A ; Store the high ASCII digit

MOV A, BCD_NUM ; Load the BCD number into the accumulator

again
CALL CONVERT_LOW_NIBBLE ; Convert low nibble to ASCII
MOV ASCII_LOW, A ; Store the low ASCII digit

HLT ; Halt the program

BCD_NUM DB 25H ; Example BCD number (25 in BCD)

ASCII_HIGH DB ? ; Resulting high ASCII digit
ASCII_LOW DB ? ; Resulting low ASCII digit

CONVERT_HIGH_NIBBLE: ; Convert high nibble to ASCII

MOV B, A ; Copy the BCD number to register B
ANI 0F0H ; Mask the lower nibble
RRC ; Rotate right to bring the high nibble to lower nibble
RRC
RRC
RRC
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MOV A, B ; Move the original BCD number back to accumulator

ANI 0FH ; Mask the upper nibble

ADD B ; Add the high nibble to the lower nibble

ADD 30H ; Convert to ASCII by adding ASCII value of '0'

RET

CONVERT_LOW_NIBBLE: ; Convert low nibble to ASCII

ANI 0FH ; Mask the upper nibble

ADD 30H ; Convert to ASCII by adding ASCII value of '0'

RET

END ; End of program

3.3.2 ASCII TO BCD CONVERSION

This 8085 assembly code converts a single ASCII digit ('7') to two-digit BCD (Binary
Coded Decimal). It subtracts ASCII '0' (30H) to get the binary value, then uses ANI and DAA
for BCD adjustment. The high BCD digit is set directly (0 for single digits). For the low digit, it
divides 10 by the input using DIV, placing the input in the ones place. The code assumes
single-digit input, using SUB, ANI, DAA, and DIV instructions. It's useful for systems
receiving ASCII input but requiring BCD for processing or display, though limited to single
digits without modification.

ORG 0000H ; Starting address

MOV A, ASCII_DATA ; Load the ASCII character into the accumulator

SUB '0' ; Convert ASCII to binary

MOV BCD_DATA, A ; Store the binary equivalent

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MVI A, 00H ; Clear the accumulator

MOV B, A ; Clear the B register

MOV A, BCD_DATA ; Move the binary number to accumulator

ANI 0FH ; Mask higher nibble
DAA ; Decimal adjust for BCD

MOV BCD_HIGH, A ; Store the high BCD digit

MOV A, BCD_DATA ; Move the binary number to accumulator

MOV B, A ; Move it to B register for the division

MVI A, 0AH ; Move decimal 10 to accumulator for division

DIV B ; Divide by 10

MOV BCD_LOW, A ; Store the low BCD digit

HLT ; Halt

ASCII_DATA DB '7' ; Example ASCII character representing a digit

BCD_HIGH DB ? ; Resulting high BCD digit
BCD_LOW DB ? ; Resulting low BCD digit
BCD_DATA DB ? ; Temporary storage for the binary equivalent

END ; End of program

Let us sum up:

BCD to ASCII Conversion

1. Convert each BCD digit to its ASCII equivalent: Each BCD digit (4-bit binary) is
converted to its 8-bit ASCII code by adding a fixed value of 0011 0000 (or 30H in
hexadecimal). For example, BCD 0101 (which represents the digit 5) becomes ASCII
0011 0101 (or 35H in hexadecimal).
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2. Store as ASCII characters: After conversion, each BCD digit is stored as a

corresponding ASCII character, which is typically used for displaying numbers in
readable text format.
ASCII to BCD Conversion

1. Remove the ASCII prefix: Convert each ASCII character (which is in the range of
0011 0000 to 0011 1001 for digits 0-9) to BCD by subtracting 0011 0000 (30H). For
example, ASCII 0011 0101 (which represents the character '5') becomes BCD 0101.
2. Pack into 4-bit BCD: After removing the ASCII prefix, the resulting binary is stored
as a 4-bit BCD value representing the original decimal digit.

Check your Progress:

1. How is each BCD digit converted to its ASCII equivalent?

A) By adding 0000 0000

B) By adding 0011 0000
C) By subtracting 0011 0000
D) By multiplying by 2

Answer: B) By adding 0011 0000

2. What is the ASCII representation of the BCD value 0011 (which represents the
digit 3)?

A) 0011 0011
B) 0011 0001
C) 0010 0011
D) 0011 0100

Answer: A) 0011 0011 (ASCII for digit 3 is 0011 0011)

3. When converting the ASCII character 0011 0101 (which represents the
character '5') to BCD, what is the resulting BCD value?

A) 0101
B) 0011
C) 0000
D) 0010

Answer: A) 0101 (ASCII 0011 0101 - 0011 0000 = BCD 0101)

4. Which of the following is true regarding ASCII values for digits 0-9?

A) They range from 0011 0000 to 0011 1000

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B) They range from 0000 0000 to 0000 1001

C) They range from 0010 0000 to 0010 1001
D) They range from 0011 0000 to 0011 1001

Answer: D) They range from 0011 0000 to 0011 1001

5. What is the BCD equivalent of the ASCII character 0011 1000 (which
represents the character '8')?

A) 0111
B) 1000
C) 0011
D) 1001

Answer: A) 1000 (ASCII 0011 1000 - 0011 0000 = BCD 1000)

BINARY TO ASCII CONVERSION

3.4 Binary to ASCII and ASCII to Binary Conversion

To convert a binary value to its ASCII representation in 8085 assembly, you need to add the
ASCII offset for '0' (30H). This process can be summarized in the following steps:
1. Input: Obtain the binary value (0 to 9) to be converted to its ASCII
representation.
2. Conversion: Add 30H to the binary value to get the corresponding ASCII code.
3. Output: Store or display the ASCII result.

ORG 0000H ; Starting address

MOV A, BINARY_VAL ; Load the binary value into the accumulator
ADD A, 30H ; Add 30H to convert binary value to ASCII
MOV ASCII_VAL, A ; Store the ASCII result

HLT ; Halt the program

3.4.2 ASCII to Binary Conversion

To convert ASCII digits to binary in 8085 assembly, load the ASCII character (values
30H to 39H) into the accumulator. Subtract 30H (the ASCII value for '0') to obtain the binary
equivalent, as digits '0' to '9' map to values 0-9.
 [Link] – SEMESTER III UNIT - III

ORG 0000H ; Starting address

MOV A, ASCII_DATA ; Load the ASCII character into the accumulator

SUB 30H ; Convert ASCII to binary

MOV BINARY_DATA, A ; Store the binary equivalent

HLT ; Halt the program

Let us sum up:

Binary to ASCII Conversion

1. Group binary bits: Divide the binary input into 8-bit segments, as ASCII characters
are represented by 8 bits. For example, the binary 01000001 corresponds to the ASCII
character 'A'.
2. Convert to ASCII character: Each 8-bit segment is converted to its corresponding
ASCII character based on the ASCII table. For instance, the binary 01101000
translates to the ASCII character 'h'.
ASCII to Binary Conversion

1. Convert each ASCII character to binary: Each character from the ASCII input is
represented by its corresponding 8-bit binary value. For example, the ASCII character
'A' is represented as 01000001.
2. Concatenate binary values: The binary values for each ASCII character are
concatenated together to form a continuous binary string. For example, the ASCII
string "Hi" is converted to binary as 01001000 01101001.
1. How many bits are used to represent each ASCII character?

A) 4 bits
B) 6 bits
C) 8 bits
D) 16 bits
Answer: C) 8 bits
2. What is the ASCII representation of the binary value 01000010?

A) 'A'
B) 'B'
C) 'C'
D) 'D'
Answer: B) 'B' (The binary 01000010 corresponds to the ASCII character 'B')
 [Link] – SEMESTER III UNIT - III

3. When converting the ASCII character 'C' (which has a decimal value of 67) to binary,
what is the resulting binary value?

A) 01000010
B) 01000011
C) 01000100
D) 01000101

Answer: B) 01000011 (The ASCII character 'C' is represented in binary as 01000011)

4. What is the binary equivalent of the ASCII string "Hi"?

A) 01001000 01101001
B) 01001000 01101010
C) 01000111 01101001
D) 01001001 01101000

Answer: A) 01001000 01101001 (The ASCII string "Hi" corresponds to the binary values for
'H' and 'i')
5. If the binary sequence 01101000 is converted to ASCII, which character is
represented?

A) 'g'
B) 'h'
C) 'i'
D) 'j'

Answer: B) 'h' (The binary 01101000 corresponds to the ASCII character 'h')

3.5 BCD Addition and Subtraction

3.5.1 BCD ADDITION
This 8085 assembly program adds two BCD numbers and stores the result in BCD
format. It begins by loading the first BCD number (25H) into the accumulator and then adds
the second BCD number (37H). The DAA instruction is used to adjust the result to a proper
BCD format.
 [Link] – SEMESTER III UNIT - III

ORG 0000H ; Starting address

; Assume the BCD numbers to be added are in BCD1 and BCD2

; The result will be stored in RESULT

MOV A, BCD1 ; Load the first BCD number into the accumulator

ADD BCD2 ; Add the second BCD number

DAA ; Decimal adjust the result to convert it back to BCD

MOV RESULT, A ; Store the result

HLT ; Halt the program

BCD1 DB 25H ; Example BCD number 1 (25)

BCD2 DB 37H ; Example BCD number 2 (37)

RESULT DB ? ; Result of BCD addition

END ; End of program

3.5.2 BCD SUBTRACTION

Steps for BCD Subtraction

1. Load the BCD Numbers: Load the BCD numbers to be subtracted into registers.
2. Perform Subtraction: Subtract the second BCD number from the first.
3. Adjust Result: Use the DAA (Decimal Adjust Accumulator) instruction to adjust the
result to a valid BCD format.
4. Store the Result: Store the adjusted result in the desired memory location.
 [Link] – SEMESTER III UNIT - III

ORG 0000H ; Starting address

; Assume the BCD numbers to be subtracted are in BCD1 and BCD2

; The result will be stored in RESULT

MOV A, BCD1 ; Load the first BCD number into the accumulator

SUB BCD2 ; Subtract the second BCD number

CPI 0AH ; Check if the result needs decimal adjustment

JC NO_ADJUST ; Jump if no adjustment is needed

ADI 90H ; Adjust the result for decimal subtraction

SUI 6 ; Subtract 6 to correct the subtraction result

NO_ADJUST:

DAA ; Decimal adjust the result to convert it back to BCD

MOV RESULT, A ; Store the result

HLT ; Halt the program

BCD1 DB 55H ; Example BCD number 1 (55)

BCD2 DB 27H ; Example BCD number 2 (27)

RESULT DB ? ; Result of BCD subtraction

END ; End of program

Let us sum up:

 [Link] – SEMESTER III UNIT - III

BCD Addition

1. Add BCD digits: Each pair of BCD digits is added using regular binary addition. The
sum may exceed the maximum BCD digit (9), which is represented as 1001 in binary.
2. Adjust for carry: If the sum of any BCD digit exceeds 9 (or 1001), a correction is
needed. A constant of 0000 1010 (which is 10 in decimal) is added to the result, and
the carry is accounted for in the next digit.
BCD Subtraction

1. Subtract BCD digits: BCD subtraction involves subtracting the BCD digits using
binary subtraction rules. If the result of a subtraction operation is negative, it requires
adjustment.
2. Borrowing and adjustment: If a BCD digit is subtracted from a smaller digit, a
borrowing process occurs, and a correction factor of 0000 1010 (10) is added to the
result to ensure it remains a valid BCD representation.
1. What is the maximum BCD digit?

A) 7

B) 8

C) 9

D) 10

Answer: C) 9

2. In BCD addition, what is the correction factor added if the sum exceeds 9?

A) 0000 0110

B) 0000 1000

C) 0000 1010

D) 0000 1100

Answer: C) 0000 1010 (which is 10 in decimal)

3. When performing BCD subtraction, what occurs if the minuend is less than
the subtrahend?

A) Nothing; the result is valid

 [Link] – SEMESTER III UNIT - III

B) A borrow is required
C) The subtraction is invalid

D) The result is automatically adjusted to 0

Answer: B) A borrow is required
4. In BCD addition, what would the result be for the operation 0110 (6) + 0101
(5)?
A) 0001 0011

B) 0000 1011

C) 0001 0001

D) 0000 1100

Answer: A) 0001 0011 (The sum is 11 in decimal; since it's a BCD result, a correction
factor is applied)
5. What is the BCD result of subtracting 0100 (4) from 0011 (3)?

A) 0000

B) 0001 0110

C) 0001 0010

D) 0000 1000

Answer: D) 0000 1000 (Since you need to borrow, you effectively get 10 - 4 = 6)

6. In BCD subtraction, after borrowing, which adjustment factor is typically added

to maintain the BCD representation?

A) 0000 0001

B) 0000 0100
C) 0000 1000

D) 0000 1010
Answer: D) 0000 1010 (This adjustment is made when the result is negative)
MULTIBYTE BCD ADDITION

3.6 Multibyte BCD Addition and Subtraction

Steps for Multibyte BCD Addition

 [Link] – SEMESTER III UNIT - III

1. Initialize Carry: Set the carry flag (CY) to 0 before starting the addition.
2. Load the BCD Numbers: Load each BCD number into separate registers or memory
locations.
3. Add the Least Significant Digits (LSDs): Add the LSDs of the BCD numbers,
including the previous carry if any.
4. Adjust for BCD: Use the DAA (Decimal Adjust Accumulator) instruction to
adjust the result.
5. Store the LSD Result: Store the LSD result in memory or a register.
6. Add the Most Significant Digits (MSDs): Add the MSDs of the BCD numbers,
including the carry from the LSD addition.
7. Adjust for BCD: Use DAA to adjust the MSD result.
8. Store the MSD Result: Store the MSD result in memory or a register.
9. Repeat for Remaining Bytes: If there are more bytes to add, repeat steps 3- 8 for
each byte.
10. Handle Overflow: Check for overflow after adding the last byte. If overflow occurs,
handle it appropriately (e.g., flag an error or adjust the result).
ORG 0000H ; Starting address

; Assuming the numbers are 3 bytes long

LXI H, BCD1 ; Point to the start of the first BCD
number
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LXI D, BCD2 ; Point to the start of the second

BCD number
LXI B, RESULT ; Point to the start of the result
MVI C, 03 ; Set byte count to 3

; Clear carry
MOV A, 00
MOV E, A
ADD_LOOP:
LDAX D ; Load byte from BCD2
ADD M ; Add byte from BCD1
DAA ; Decimal adjust accumulator
MOV M, A ; Store result byte in RESULT
INX H ; Increment pointer for BCD1
INX D ; Increment pointer for BCD2
INX B ; Increment pointer for RESULT
DCR C ; Decrement byte count
JZ DONE ; If byte count is zero, end
MOV A, E ; Move carry to accumulator
JNC NO_CARRY
MVI A, 01 ; Set A to 1 if carry
NO_CARRY:
MOV E, A ; Store carry
JMP ADD_LOOP
DONE:
HLT ; Halt the program
BCD1 DB 25H, 34H, 12H ; Example BCD number 1
BCD2 DB 37H, 45H, 23H ; Example BCD number 2
RESULT DS 3 ; Space for the result (3 bytes)

END ; End of program

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3.6.2 MULTIBYTE BCD SUBTRACTION

Steps for Multibyte BCD Subtraction

1. Initialize Borrow: Set the borrow flag (CY) to 0 before starting the subtraction.
2. Load the BCD Numbers: Load each BCD number into separate registers or memory
locations.
3. Subtract the Least Significant Digits (LSDs): Subtract the LSDs of the BCD
numbers, including the previous borrow if any.
4. Adjust for BCD: Use the DAA (Decimal Adjust Accumulator) instruction to
adjust the result.
5. Store the LSD Result: Store the LSD result in memory or a register.
6. Subtract the Most Significant Digits (MSDs): Subtract the MSDs of the BCD
numbers, including the borrow from the LSD subtraction.
7. Adjust for BCD: Use DAA to adjust the MSD result.
8. Store the MSD Result: Store the MSD result in memory or a register.
9. Repeat for Remaining Bytes: If there are more bytes to subtract, repeat steps 3-8 for
each byte.
10. Handle Borrow: Check for borrow after subtracting the last byte. If borrow
occurs, handle it appropriately (e.g., flag an error or adjust the result).

ORG 0000H ; Starting address

; Assuming the numbers are 3 bytes long

LXI H, BCD1 ; Point to the start of the first BCD number
LXI D, BCD2 ; Point to the start of the second BCD number
LXI B, RESULT ; Point to the start of the result
MVI C, 03 ; Set byte count to 3

; Clear carry
MOV A, 00
MOV E, A
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ADD_LOOP:
LDAX D ; Load byte from BCD2
ADD M ; Add byte from BCD1
DAA ; Decimal adjust accumulator
MOV M, A ; Store result byte in RESULT
INX H ; Increment pointer for BCD1
INX D ; Increment pointer for BCD2
INX B ; Increment pointer for RESULT
DCR C ; Decrement byte count
JZ DONE ; If byte count is zero, end
MOV A, E ; Move carry to accumulator
JNC NO_CARRY
MVI A, 01 ; Set A to 1 if carry
NO_CARRY:
MOV E, A ; Store carry
JMP ADD_LOOP

DONE:
HLT ; Halt the program

BCD1 DB 25H, 34H, 12H ; Example BCD number 1

BCD2 DB 37H, 45H, 23H ; Example BCD number 2
RESULT DS 3 ; Space for the result (3 bytes)

END ; End of program

Let us sum up:

Multibyte BCD Addition

1. Segment the BCD values: Multibyte BCD numbers are divided into individual bytes,
with each byte representing a single BCD digit (4 bits each). For
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example, the BCD number 0011 0001 0100 represents the decimal number 314.
2. Perform byte-wise addition: Add each BCD byte starting from the least significant
byte (LSB) to the most significant byte (MSB), carrying any overflow to the next byte.
If the sum of any byte exceeds 1001, add the correction factor 0000 1010 and carry
over the adjustment to the next byte.

Multibyte BCD Subtraction

1. Segment the BCD values: Similar to addition, multibyte BCD numbers are divided
into individual bytes for subtraction. Each byte is processed separately.
2. Perform byte-wise subtraction: Subtract each BCD byte starting from the LSB to
the MSB. If a subtraction results in a negative value, borrow from the next higher byte,
and add the correction factor 0000 1010 to maintain a valid BCD representation.
1. When performing multibyte BCD addition, what should you do if the sum of a byte
exceeds 1001?

A) Ignore the overflow

B) Subtract 0000 0001
C) Add the correction factor 0000 1010
D) Convert the result to decimal

Answer: C) Add the correction factor 0000 1010

2. In multibyte BCD subtraction, if a BCD byte results in a negative value, what is the
necessary adjustment?

A) Add 0000 0001 to the result

B) Borrow from the next higher byte and add 0000 1010
C) Set the result to zero
D) Ignore the borrow
Answer: B) Borrow from the next higher byte and add 0000 1010

3. What is the first step in performing multibyte BCD addition?

A) Convert BCD to decimal

B) Segment the BCD values into individual bytes
C) Multiply the BCD numbers
D) Perform a binary addition

Answer: B) Segment the BCD values into individual bytes

4. In a multibyte BCD number 0011 0001 0100 (representing 314), how would
you add 0000 0101 (representing 5) to it?
 [Link] – SEMESTER III UNIT - III

A) Add each byte directly without adjustments

B) Add the LSB first, check for overflow, and adjust as necessary
C) Convert both to decimal, add, and convert back
D) Both A and B are correct

Answer: D) Both A and B are correct

3.7 Multibyte BCD Multiplication and Division

3.7.1 MULTIBYTE BCD MULTIPLICATION

BCD multiplication can be approached by performing repeated addition. Here, we'll multiply
two 2-byte BCD numbers.
Data:

 BCD1: First BCD number

 BCD2: Second BCD number
 RESULT: Result of the multiplication (up to 4 bytes)
ORG 0000H ; Starting address

LXI H, BCD1 ; Point to the start of the first BCD number LXI D,
BCD2 ; Point to the start of the second BCD number LXI
B, RESULT ; Point to the start of the result
MVI C, 04 ; Set byte count for the result (4 bytes)

; Clear the RESULT array

MVI A, 00
MOV M, A
INX B
MOV M, A
INX B
MOV M, A
INX B
MOV M, A

LXI H, BCD2 ; Point to the start of the second BCD number LXI
D, RESULT ; Point to the start of the result

MUL_LOOP:
 [Link] – SEMESTER III UNIT - III

MOV A, M ; Load byte from BCD2

CALL MULTIPLY_BYTE ; Multiply each byte
INX H ; Increment pointer for BCD2
DCR C ; Decrement byte count
JNZ MUL_LOOP ; Repeat for all bytes

HLT ; Halt the program

MULTIPLY_BYTE:

LXI H, BCD1 ; Point to the start of the first BCD number

MOV E, A ; Store multiplier in E
MVI A, 00

MOV F, A ; Clear F (upper byte of product)

MUL_BYTE_LOOP:

LDAX H ; Load byte from BCD1

CALL ADD_BCD_BYTE ; Add the BCD number to the result

INX H ; Increment pointer for BCD1
DCR E ; Decrement multiplier

JNZ MUL_BYTE_LOOP ; Repeat for the number of times specified by E

RET

ADD_BCD_BYTE: ; Add the bytes with decimal adjustment

MOV A, M
ADD D
 [Link] – SEMESTER III UNIT - III

DAA

MOV M, A

INX D

RET

BCD1 DB 25H, 34H ; Example BCD number 1 (3425)

BCD2 DB 12H, 34H ; Example BCD number 2 (3412)

RESULT DS 4 ; Space for the result (4 bytes)

END ; End of program

3.7.2 MULTIBYTE BCD DIVISION

BCD division can be approached by repeated subtraction. Here, we'll divide two 2- byte
BCD numbers.
Data:

 BCD1: Dividend (number to be divided)

 BCD2: Divisor (number to divide by)
 RESULT: Quotient of the division (up to 2 bytes)
 REMAINDER: Remainder of the division (up to 2 bytes)

ORG 0000H ; Starting address

LXI H, BCD1 ; Point to the start of the dividend

LXI D, BCD2 ; Point to the start of the divisor LXI

B, RESULT ; Point to the start of the quotient LXI
H, REMAINDER ; Point to the start of the remainder
 [Link] – SEMESTER III UNIT - III

; Clear the RESULT and REMAINDER arrays MVI

A, 00
MOV M, A
INX B
MOV M, A
INX B
MOV M, A
INX B
MOV M, A
DIV_LOOP:

LXI H, BCD1 ; Point to the start of the dividend

CALL SUBTRACT_BCD_BYTE ; Subtract the divisor
JC DIV_DONE ; If carry (dividend < divisor), division done
INX B
JMP DIV_LOOP
 [Link] – SEMESTER III UNIT - III

DIV_DONE:

HLT ; Halt the program

SUBTRACT_BCD_BYTE: ; Subtract the bytes with decimal adjustment

MOV A, M

SUB D

CPI 0AH ; Check if adjustment needed

JC NO_ADJUST

SUI 06H ; Subtract 6 for decimal correction

NO_ADJUST:

DAA

MOV M, A

INX D

RET

BCD1 DB 56H, 78H ; Example BCD dividend (7856)

BCD2 DB 12H, 34H ; Example BCD divisor (3412)

RESULT DS 2 ; Space for the quotient (2 bytes)

REMAINDER DS 2 ; Space for the remainder (2 bytes)

END ; End of program

 [Link] CS – SEMESTER III UNIT - IV

Let us sum up:

Multibyte BCD Multiplication

1. Segment the BCD values: Similar to addition and subtraction, multibyte BCD
numbers are divided into individual bytes, where each byte represents a single BCD
digit (4 bits each).
2. Perform multiplication: Each BCD digit is multiplied using binary multiplication
rules. The products may be larger than a single BCD digit (up to 16 in decimal), so
each product is checked. If it exceeds 1001, a correction of 0000 1010 must be added,
and any overflow is carried to the next byte.
Multibyte BCD Division

1. Segment the BCD values: The multibyte BCD numbers are divided into individual
bytes for division, just like in addition, subtraction, and multiplication.
2. Perform division: Each BCD digit is divided using binary division rules. If a byte
results in a quotient or remainder that is not valid in BCD (greater than 9), adjustments
may be required. The quotient is checked, and if necessary, the correction factor 0000
1010 is used to adjust the result to maintain valid BCD representation.

Check your Progress:

1. In multibyte BCD multiplication, what should be done if a product

exceeds 1001?

A) Ignore the overflow

B) Set the product to zero
C) Add the correction factor 0000 1010
D) Divide the product by 2

Answer: C) Add the correction factor 0000 1010

2. When performing multibyte BCD division, what is done if the quotient
exceeds 9?

A) Ignore the result

B) Adjust using the correction factor 0000 1010
C) Convert to binary
D) Subtract 1 from the quotient

Answer: B) Adjust using the correction factor 0000 1010

3. What is the first step in multibyte BCD multiplication?
A) Convert BCD to decimal
B) Segment the BCD values into individual bytes
 [Link] CS – SEMESTER III UNIT - IV

C) Add the BCD numbers

D) Perform binary multiplication

Answer: B) Segment the BCD values into individual bytes

4. In multibyte BCD division, which of the following is a necessary

condition for the quotient?

A) It must be a decimal number

B) It must be a valid BCD representation
C) It must be an even number
D) It must be less than 10

Answer: B) It must be a valid BCD representation

5. During multibyte BCD multiplication, what is the maximum value a single BCD
product can represent?

A) 5
B) 9
C) 10
D) 15

Answer: D) 15 (as the maximum value for two BCD digits, 9 * 9)

 [Link] CS – SEMESTER III UNIT - IV

UNIT IV
The 8085 Interrupts – RIM AND SIM instructions - 8259 Programmable Interrupt
Controller - Direct Memory Access (DMA) and 8257 DMA controller.

Section No Topic Page

No
Unit Objectives
4.1 The 8085 Interrupts
4.1.1 TRAP Interrupt
4.1.2 RST 7.5 Interrupt
4.1.3 RST 6.5 Interrupt
4.1.4 RST 5.5 Interrupt
4.1.5 INTR Interrupt
4.2 RIM and SIM Instructions
4.2.1 Difference between SIM and RIM Instructions
4.3 8259 Programmable Interrupt Controller
4.3.1 Features of 8259 PIC
4.3.2 Block Diagram of 8259 PIC
4.4 Direct Memory Access (DMA) and 8257 DMA Controller
4.4.1 Types of DMA Controllers
4.4.2 Advantages of DMA Controller
4.4.3 Disadvantages of DMA Controller
 [Link] CS – SEMESTER III UNIT - IV

4.1 The 8085 Interrupts

In the 8085 microprocessor, an interrupt is a signal that temporarily suspends the normal execution
of a program and redirects the control to a specific interrupt service routine (ISR). Interrupts allow the
microprocessor to respond to external events, such as user input, system events, or hardware signals,
without the need for constant polling.
4.1.1 There are five interrupt signals in the 8085 microprocessor:
TRAP: The TRAP interrupt is a non-maskable interrupt that is generated by an
external device, such as a power failure or a hardware malfunction. The TRAP interrupt has
the highest priority and cannot be disabled.
RST 7.5: The RST 7.5 interrupt is a maskable interrupt that is generated by a software
instruction. It has the second highest priority.
RST 6.5: The RST 6.5 interrupt is a maskable interrupt that is generated by a software
instruction. It has the third highest priority.
RST 5.5: The RST 5.5 interrupt is a maskable interrupt that is generated by a software
instruction. It has the fourth highest priority.
INTR: The INTR interrupt is a maskable interrupt that is generated by an external
device, such as a keyboard or a mouse. It has the lowest priority and can be disabled.
When microprocessor receives any interrupt signal from peripheral(s) which are
requesting its services, it stops its current execution and program control is transferred to a sub-
routine by generating CALL signal and after executing sub-routine by generating RET signal
again program control is transferred to main program from where it had stopped. When
microprocessor receives interrupt signals, it sends an acknowledgement (INTA) to the
peripheral which is requesting for its service. Interrupts can be classified into various
categories based on different parameters:
Hardware and Software Interrupts – When microprocessors receive interrupt signals
through pins (hardware) of microprocessor, they are known as Hardware Interrupts. There are
5 Hardware Interrupts in 8085 microprocessor. They are – INTR, RST 7.5, RST 6.5, RST 5.5,
TRAP Software Interrupts are those which are inserted in between the program which means
these are mnemonics of microprocessor. There are 8 software interrupts in 8085
microprocessor. They are – RST 0, RST 1, RST 2,
RST 3, RST 4, RST 5, RST 6, RST 7.

Vectored and Non-Vectored Interrupts – Vectored Interrupts are those which have
fixed vector address (starting address of sub-routine) and after executing these, program
control is transferred to that address. Vector Addresses are calculated by the formula 8 *
TYPE
 [Link] CS – SEMESTER III UNIT - IV

INTERRUPT VECTOR ADDRESS

TRAP (RST 4.5) 24 H

RST 5.5 2C H

RST 6.5 34 H

RST 7.5 3C H

1. For Software interrupts vector addresses are given by:

INTERRUPT VECTOR ADDRESS

RST 0 00 H

RST 1 08 H

RST 2 10 H

RST 3 18 H

RST 4 20 H

RST 5 28 H

RST 6 30 H

RST 7 38 H

Non-Vectored Interrupts are those in which vector address is not predefined. The
interrupting device gives the address of sub-routine for these interrupts. INTR is the only
non-vectored interrupt in 8085 microprocessor.
Maskable and Non-Maskable Interrupts – Maskable Interrupts are those which can be
disabled or ignored by the microprocessor. These interrupts are either edge-
triggered or level-triggered, so they can be disabled. INTR, RST 7.5, RST 6.5, RST
5.5 are maskable interrupts in 8085 microprocessor. Non-Maskable Interrupts are those which
cannot be disabled or ignored by microprocessor. TRAP is a non- maskable interrupt. It
 [Link] CS – SEMESTER III UNIT - IV

consists of both level as well as edge triggering and is used in critical power failure
conditions.
Priority of Interrupts – When microprocessor receives multiple interrupt requests
simultaneously, it will execute the interrupt service request (ISR) according to the priority of
the interrupts.

Fig 1. Interrupts

4.1.2 Instruction for Interrupts –

1. Enable Interrupt (EI) – The interrupt enable flip-flop is set and all interrupts are
enabled following the execution of next instruction followed by EI. No flags are
affected. After a system reset, the interrupt enable flip- flop is reset, thus disabling
the interrupts. This instruction is necessary to enable the interrupts again (except
TRAP).
2. Disable Interrupt (DI) – This instruction is used to reset the value of enable flip-
flop hence disabling all the interrupts. No flags are affected by this instruction.
3. Set Interrupt Mask (SIM) – It is used to implement the hardware interrupts (RST
7.5, RST 6.5, RST 5.5) by setting various bits to form masks or generate output
data via the Serial Output Data (SOD) line. First the required value is loaded
in accumulator then SIM will take the bit pattern from it.

Fig [Link] Interrupt Mask

 [Link] CS – SEMESTER III UNIT - IV

4. Read Interrupt Mask (RIM) – This instruction is used to read the status of the
hardware interrupts (RST 7.5, RST 6.5, RST 5.5) by loading into the A register a byte
which defines the condition of the mask bits for the interrupts. It also reads the
condition of SID (Serial Input Data) bit on the microprocessor.

Fig 3. Read Interrupt Mask

4.1.3 Uses of Interrupts in 8085 microprocessor:
Interrupts in the 8085 microprocessor are used for various purposes, including:

Real-time processing: Interrupts allow the microprocessor to respond quickly to external

events in real-time, such as user input or hardware signals. This is particularly useful in
applications such as control systems and data acquisition systems where time-critical
operations are required.
Multi-tasking: Interrupts enable the microprocessor to perform multiple tasks simultaneously
by temporarily suspending the current task and executing the ISR for the interrupting event.
This allows the microprocessor to switch between different tasks and maximize the utilization
of system resources.
Input/output operations: Interrupts can be used for handling input/output operations, such as
data transfer between the microprocessor and external devices. This allows the
microprocessor to perform other tasks while waiting for input/output operations to complete.
Error handling: Interrupts can be used for error handling and exception handling, such as
detecting and recovering from hardware or software errors.
Power management: Interrupts can be used for power management, such as putting the
microprocessor into a low-power mode when it is not needed and waking it up when an
interrupt occurs.
4.1.4 Issues of Interrupts in 8085 microprocessor:
There are several issues that need to be considered when using interrupts in the 8085
microprocessor:
1. Priority conflicts: The 8085 microprocessor supports multiple interrupt signals
with different priorities. If multiple interrupts occur simultaneously, it can lead to
 [Link] CS – SEMESTER III UNIT - IV

priority conflicts and result in incorrect operation or system failure. Therefore, the
priority levels of each interrupt signal need to be carefully designed and tested to
avoid conflicts.
2. Race conditions: Race conditions can occur when multiple processes try to
access the same resources, such as registers or memory locations,
simultaneously. This can lead to incorrect results or system failure. Therefore,
interrupt handlers need to be carefully designed to avoid race conditions, such as
by disabling interrupts during critical operations.
3. Interrupt latency: Interrupt latency is the time delay between when an interrupt
occurs and when the corresponding ISR starts executing. Interrupt latency can
affect the system’s responsiveness and real-time performance. Therefore, interrupt
handlers need to be designed to minimize interrupt latency, such as by using fast
interrupt service routines and optimizing the interrupt handling process.
4. Interrupt nesting: Interrupt nesting occurs when an interrupt occurs while the
microprocessor is executing an ISR for another interrupt. Interrupt nesting can
lead to complex interrupt handling and priority conflicts. Therefore, interrupt
handlers need to be carefully designed to avoid interrupt nesting, such as by
disabling lower-priority interrupts during critical operations.
5. Interrupt overhead: Interrupt overhead is the additional processing time and
resources required to handle interrupts. Interrupt overhead can affect the system’s
performance and efficiency, especially if the system experiences a high volume of
interrupts. Therefore, interrupt handlers need to be designed to minimize interrupt
overhead, such as by optimizing the interrupt handling process and reducing
unnecessary operations.
Let us sum up
The 8085 Interrupts

1. TRAP Interrupt:
o Description: TRAP is a non-maskable interrupt that is the highest
priority among the 8085 interrupts, allowing it to interrupt the
microprocessor immediately.
o Functionality: It is typically used for critical tasks such as emergency stop
functions or system failures, ensuring that important events are handled
promptly.
o Vector Address: The TRAP interrupt is assigned a vector address of 0024H,
where the corresponding interrupt service routine (ISR) begins execution.
2. RST 7.5 Interrupt:
o Description: RST 7.5 is a maskable interrupt with a medium priority level,
allowing it to be enabled or disabled through the interrupt enable (EI) and
disable (DI) instructions.
o Functionality: It is used for handling specific events that are not as
critical as TRAP but still require attention from the microprocessor.
o Vector Address: The vector address for RST 7.5 is 003CH, where the ISR for
this interrupt is executed.
 [Link] CS – SEMESTER III UNIT - IV

3. RST 6.5 Interrupt:

o Description: RST 6.5 is also a maskable interrupt with a lower priority than
RST 7.5, allowing the microprocessor to manage multiple interrupt requests
effectively.
o Functionality: This interrupt can be used for less critical peripheral
devices or specific tasks that can tolerate some delay in processing.
o Vector Address: The vector address for RST 6.5 is 0034H, directing the
microprocessor to the appropriate ISR.
4. RST 5.5 Interrupt:
o Description: RST 5.5 is another maskable interrupt with the lowest
priority among the RST interrupts, providing a mechanism for managing
lower-priority tasks.
o Functionality: It is typically used for routine tasks that do not require
immediate action, ensuring that higher-priority interrupts are processed first.
o Vector Address: The vector address for RST 5.5 is 002CH, where the ISR for
this interrupt begins execution.
5. INTR Interrupt:
o Description: INTR (Interrupt Request) is a general-purpose maskable
interrupt that allows external devices to interrupt the microprocessor,
providing flexibility in handling peripheral events.
o Functionality: Unlike RST interrupts, INTR requires an external device to
provide the vector address, making it versatile for various applications.
o Vector Address: The vector address for INTR is determined by the value
placed on the data bus by the interrupting device, allowing it to specify
which ISR to execute.
Check your Progress
1. What is the role of an interrupt in the 8085 microprocessor?
a) To execute normal programs faster
b) To temporarily halt the execution of the current program and redirect
control to an interrupt service routine (ISR)
c) To store data in memory
d) To reset the microprocessor

Answer: b) To temporarily halt the execution of the current program and redirect
control to an interrupt service routine (ISR)
2. Which of the following interrupts has the highest priority in the 8085
microprocessor?
a) RST 7.5
b) RST 6.5
c) INTR
d) TRAP

Answer: d) TRAP
 [Link] CS – SEMESTER III UNIT - IV

3. Which interrupt in the 8085 microprocessor is non-maskable?

a) INTR
b) RST 7.5
c) TRAP
d) RST 5.5

Answer: c) TRAP
4. Which interrupt is non-vectored in the 8085 microprocessor?
a) TRAP
b) RST 6.5
c) RST 7.5
d) INTR

Answer: d) INTR

5. How many hardware interrupts are available in the 8085

microprocessor?
a) 3
b) 5
c) 8
d) 10

Answer: b) 5

6. Which instruction is used to enable interrupts in the 8085

microprocessor?
a) DI
b) RIM
c) SIM
d) EI

Answer: d) EI

7. What is the vector address for the RST 5.5 interrupt in the 8085
microprocessor?
a) 00H
b) 2CH
c) 3CH
d) 28H

Answer: b) 2CH
 [Link] CS – SEMESTER III UNIT - IV

4.2 RIM AND SIM instructions

The SIM (Set Interrupt Mask) and RIM (Read Interrupt Mask) instructions are two
instructions in the 8085 microprocessor that are used to control interrupts.
The SIM instruction allows the microprocessor to selectively enable or disable interrupts
by setting the appropriate bits in the Interrupt Mask Register (IMR). The IMR is a register that
controls which interrupts are allowed to be processed by the microprocessor. The SIM
instruction takes one byte as an operand and sets the corresponding bits in the IMR based on
the value of the operand.
The RIM instruction, on the other hand, reads the current value of the IMR and copies it
to the accumulator. This allows the microprocessor to check which interrupts are currently
enabled or disabled. The RIM instruction takes no operands and simply reads the value of the
IMR.

Fig 4. Set Interrupt Mask

These instructions are commonly used in embedded systems and other applications that
require interrupt-driven processing. By selectively enabling or disabling interrupts, the
microprocessor can control the flow of data and ensure that critical tasks are executed in a
timely manner. The SIM and RIM instructions are
 [Link] CS – SEMESTER III UNIT - IV

important tools for managing interrupts and optimizing the performance of the
microprocessor in various applications.
Set Interrupt Mask (SIM) : In 8085 Instruction set, SIM stands for “Set Interrupt Mask”.
It is 1-Byte instruction and it is a multi-purpose instruction.
The main uses of SIM instruction are –

 Masking/unmasking of RST7.5, RST6.5, and RST5.5

 Reset to 0 RST7.5 flip-flop.
 Perform serial output of data.
Read Interrupt Mask (RIM) : In 8085 Instruction set, RIM stands for “Read Interrupt
Mask”. It is a 1-Byte multi-purpose instruction.

Fig 5. 8085 Read Interrupt Mask It

is used for the following purposes –
 To check whether RST7.5, RST6.5, and RST5.5 are masked or not.
 To check whether interrupts are enabled or not.
 To check whether RST7.5, RST6.5, or RST5.5 interrupts are pending or not.
 To perform serial input of data.
4.2.1 Difference between SIM and RIM instructions in 8085
microprocessor:

Sr. No. Sim Instruction Rim Instruction

RIM stands for Read Interrupt

1 SIM stands for Set Interrupt Mask. Mask.
 [Link] CS – SEMESTER III UNIT - IV

It is responsible for
masking/unmasking of RST 7.5, It checks whether RST 7.5, RST 6.5,
2 RST 6.5 and RST 5.5. RST 5.5 are masked or not.

It checks whether interrupts are

enabled or not and to check whether
RST 7.5, RST 6.5 or RST
3 It resets to 0 RST 7.5 flip flop. 5.5 interrupts are pending or not.

The contents of the Accumulator after

The content of the Accumulator the execution of the RIM instruction
decides the action to be taken. So provide this
before executing the SIM instruction, [Link], it is essential to
it is mandatory to initialize look into the Accumulator contents
4 Accumulator with the required value. after the RIM instruction is executed.

SIM instruction can be used for RIM instruction can be used for
5 serial output of data. serial input of data.

Sr. No. Sim Instruction Rim Instruction

6 Its opcode(in Hex) is 30. Its opcode(in Hex) is 20.

Takes no operand
7 Takes a byte operand
 [Link] CS – SEMESTER III UNIT - IV

Sets the corresponding bits in the

Interrupt Mask Register (IMR) based Copies the current value of the IMR
8 on the operand to the accumulator

Enables or disables interrupts

9 selectively Reads the current interrupt statu

SIM instruction changes the RIM instruction does not modify any
10 contents of the IMR registers or flags

SIM instruction is used for setting RIM instruction is used for reading
the mask register before an interrupt the mask register during interrupt
11 is enabled service routine

RIM instruction does not affect the

SIM instruction affects the maskability of the interrupts
12 maskability of the interrupts

Let us sum up
RIM (Read Interrupt Mask) Instruction

1. Purpose: The RIM instruction is used to read the status of interrupt signals and the
interrupt mask from the 8085 microprocessor, allowing the program to check which
interrupts are currently enabled or pending.
2. Functionality: Upon execution, RIM places the status of the interrupt system in the
accumulator. This includes:
o The status of the interrupt lines (TRAP, RST 7.5, RST 6.5, RST 5.5, and
INTR).
o The state of the interrupt mask (which interrupts are enabled or
disabled).
3. Register Status: The flags in the accumulator after executing RIM indicate which
interrupts are currently active, enabling the program to make informed decisions
based on the interrupt status.
SIM (Set Interrupt Mask) Instruction
 [Link] CS – SEMESTER III UNIT - IV

1. Purpose: The SIM instruction is used to configure the interrupt system by setting
or clearing the interrupt mask, thereby enabling or disabling specific interrupts for
the 8085 microprocessor.
2. Functionality: Upon execution, SIM allows the program to:
o Specify which maskable interrupts (RST 7.5, RST 6.5, and RST 5.5) are to
be enabled or disabled.
o Control the status of the interrupt system, influencing how the
microprocessor responds to incoming interrupt requests.
3. Mask Control: The bits in the data byte provided to SIM determine the state of each
interrupt line, allowing fine-grained control over the interrupt handling mechanism.
Difference between SIM and RIM Instructions

1. Functionality:
o RIM: Reads and reports the status of the interrupt system and identifies which
interrupts are active.
o SIM: Configures the interrupt system by enabling or disabling specific
interrupts based on program requirements.
2. Operation:
o RIM: Outputs the interrupt status to the accumulator, providing
feedback to the program.
o SIM: Takes input from the accumulator or a data byte to control the
interrupt mask, modifying the behavior of the interrupt system.
3. Usage Context:
o RIM: Typically used when the program needs to check which interrupts are
active before making decisions on handling them.
o SIM: Used when setting up or modifying the interrupt configuration to
control how the microprocessor interacts with peripheral devices.
Check your Progress
1. What does the SIM instruction in the 8085 microprocessor stand for?
a) Set Interrupt Mask
b) Serial Interrupt Mask
c) Signal Interrupt Mask
d) Select Interrupt Mode

Answer: a) Set Interrupt Mask

2. What is the primary purpose of the RIM instruction in the 8085

microprocessor?
a) To mask interrupts
b) To read the current status of interrupts
c) To reset interrupts
d) To generate interrupts

Answer: b) To read the current status of interrupts

 [Link] Computer Science – SEMESTER III UNIT - V

3. Which interrupt lines are controlled by the SIM instruction in the 8085
microprocessor?
a) RST 5.5, RST 6.5, and RST 7.5
b) TRAP, INTR, and RST 7.5
c) RST 4.5, RST 5.5, and RST 6.5
d) RST 0, RST 1, and RST 2

Answer: a) RST 5.5, RST 6.5, and RST 7.5

4. Before executing the SIM instruction, what must be initialized in the 8085
microprocessor?
a) Interrupt Enable Flip-Flop
b) Accumulator with the required value
c) Stack Pointer
d) Program Counter

Answer: b) Accumulator with the required value

5. What does the RIM instruction return after execution?

a) The status of serial output
b) The value of the Interrupt Mask Register (IMR)
c) The opcode of the instruction
d) The program counter value

Answer: b) The value of the Interrupt Mask Register (IMR)

4.3 8259 Programmable Interrupt Controller

Intel 8259 is a Programmable Interrupt Controller (PIC). There are 5 hardware interrupts
and 2 hardware interrupts in Intel 8085 and Intel 8086 microprocessors respectively. But by
connecting Intel 8259 with these microprocessors, we can increase their interrupt handling
capability. Intel 8259 combines the multi-interrupt input sources into a single interrupt
output. Interfacing of single PIC provides 8 interrupts inputs from IR0-IR7. For example,
Interfacing of 8085 and 8259 increases the interrupt handling capability of 8085
microprocessor from 5 to 8 interrupt levels.
Features of Intel 8259 PIC are as follows:

 Intel 8259 is designed for Intel 8085 and Intel 8086 microprocessor.
 It can be programmed either in level triggered or in edge triggered interrupt level.
 We can mask individual bits of interrupt request register.
 We can increase interrupt handling capability upto 64 interrupt level by
cascading further 8259 PICs.
 Clock cycle is not required.
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Fig 6. Pin Diagram

Pin Diagram of 8259 – We can see through above diagram that there are total 28 pins in
Intel 8259 PIC where Vcc : 5V Power supply and Gnd : ground. Other pins use are explained
below. Block Diagram of 8259 PIC microprocessor –

Fig 7. Block Diagram

The Block Diagram consists of 8 blocks which are – Data Bus Buffer, Read/Write Logic,
Cascade Buffer Comparator, Control Logic, Priority Resolver and 3 registers- ISR, IRR, IMR.
1. Data bus buffer – This Block is used as a mediator between 8259 and 8085/8086
microprocessor by acting as a buffer. It takes the control word from the 8085 (let
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say) microprocessor and transfer it to the control logic of 8259 microprocessor.

After selection of Interrupt by 8259 microprocessor (based on priority of the
interrupt), it transfer the opcode of the selected Interrupt and address of the
Interrupt service sub routine to the other connected microprocessor. The data bus
buffer consists of 8 bits represented as D0-D7 in the block diagram. Thus, shows
that a maximum of 8 bits data can be transferred at a time.
2. Read/Write logic – This block works only when the value of pin CS is low (as
this pin is active low). This block is responsible for the flow of data depending
upon the inputs of RD and WR. These two pins are active low pins used for read
and write operations.
3. Control logic – It is the center of the PIC and controls the functioning of every
block. It has pin INTR which is connected with other microprocessor for taking
interrupt request and pin INT for giving the output. If 8259 is enabled, and the
other microprocessor Interrupt flag is high then this causes the value of the output
INT pin high and in this way 8259 responds to the request made by other
microprocessor.
4. Interrupt request register (IRR) – It stores all the interrupt level which are
requesting for Interrupt services.
5. Interrupt service register (ISR) – It stores the interrupt level which are currently
being executed.
6. Interrupt mask register (IMR) – It stores the interrupt level which have to be
masked by storing the masking bits of the interrupt level.
7. Priority resolver – It examines all the three registers and set the priority of
interrupts and according to the priority of the interrupts, interrupt with highest
priority is set in ISR register. Also, it reset the interrupt level which is already
been serviced in IRR.
8. Cascade buffer – To increase the Interrupt handling capability, we can further
cascade more number of pins by using cascade buffer. So, during increment of
interrupt capability, CSA lines are used to control multiple interrupt structure.
SP/EN (Slave program/Enable buffer) pin is when set to high, works in master mode else in
slave mode. In Non Buffered mode, SP/EN pin is used to specify whether 8259 work as
master or slave and in Buffered mode, SP/EN pin is used as an output to enable data bus.

Advantages:

Interrupt Management: The 8259 PIC is designed to handle interrupts efficiently and
effectively, allowing for faster and more reliable processing of interrupts in a system.
Flexibility: The 8259 PIC is programmable, meaning that it can be customized to suit the
specific needs of a given system, including the number and type of interrupts that need to be
managed.
Compatibility: The 8259 PIC is compatible with a wide range of microprocessors, making it
a popular choice for managing interrupts in many different systems.
Multiple Interrupt Inputs: The 8259 PIC can manage up to 8 interrupt inputs,
allowing for the management of complex systems with multiple devices.
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Ease of Use: The 8259 PIC includes simple interface pins and registers, making it relatively
easy to use and program.

Disadvantages:

Cost: While the 8259 PIC is relatively affordable, it does add cost to a system, particularly if
multiple PICs are required.
Limited Number of Interrupts: The 8259 PIC can manage up to 8 interrupt inputs, which
may be insufficient for some applications.
Complex Programming: Although the interface pins and registers of the 8259 PIC are
relatively simple, programming the 8259 can be complex, requiring careful attention to
interrupt prioritization and other parameters.
Limited Functionality: While the 8259 PIC is a useful peripheral for interrupt management,
it does not include more advanced features, such as DMA (direct memory access) or
advanced error correction.
Let us sum up
 The 8259 Programmable Interrupt Controller (PIC) manages multiple interrupt
requests from up to eight devices (IRQ0 to IRQ7), allowing efficient handling of
interrupts in a microprocessor system.
 It prioritizes interrupts so that urgent requests can preempt less critical ones.
 The PIC is programmable, enabling users to configure which interrupts are enabled
and their priority levels.
 It includes key components like IRQ lines for receiving requests, control logic for
managing priorities, and a data bus interface for communication with the CPU.
 The 8259 also allows monitoring of pending interrupts, ensuring timely
responses to external device signals.
1. What is the primary function of the Intel 8259 PIC?
a) To provide direct memory access
b) To combine multiple interrupt sources into a single interrupt output
c) To manage data transmission between microprocessors
d) To handle memory management

Answer: b) To combine multiple interrupt sources into a single interrupt output

2. How many interrupt inputs can a single 8259 PIC manage?
a) 5
b) 2
c) 8
d) 16

Answer: c) 8

3. Which of the following is NOT a feature of the Intel 8259 PIC?

a) Programmable interrupt levels
b) Direct Memory Access (DMA)
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c) Can operate in level or edge-triggered modes

d) Can cascade with other 8259 chips

Answer: b) Direct Memory Access (DMA)

4. What is the function of the Interrupt Request Register (IRR) in the 8259 PIC?
a) To store the interrupt levels currently being serviced
b) To store the interrupt levels requesting service
c) To mask interrupt levels
d) To reset the microprocessor

Answer: b) To store the interrupt levels requesting service

5. What is the purpose of the Interrupt Mask Register (IMR) in the 8259 PIC?
a) To store interrupt levels that have to be masked
b) To store interrupt levels currently being executed
c) To prioritize interrupt levels
d) To reset all interrupt levels

Answer: a) To store interrupt levels that have to be masked

4.4 8259 Programmable Interrupt Controller

DMA Controller is a hardware device that allows I/O devices to directly access memory with
less participation of the processor. DMA controller needs the same old circuits of an interface
to communicate with the CPU and Input/Output devices.
What is a DMA Controller?
Direct Memory Access uses hardware for accessing the memory, that hardware is called a
DMA Controller. It has the work of transferring the data between Input Output devices and
main memory with very less interaction with the processor. The direct Memory Access
Controller is a control unit, which has the work of transferring data.
DMA Controller Diagram in Computer Architecture
DMA Controller is a type of control unit that works as an interface for the data bus and the
I/O Devices. As mentioned, DMA Controller has the work of transferring the data without the
intervention of the processors, processors can control the data transfer. DMA Controller also
contains an address unit, which generates the address and selects an I/O device for the
transfer of data. Here we are showing the block diagram of the DMA Controller.
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Fig 8. DMA Controller

4.4.1 Types of Direct Memory Access (DMA)

 Single-Ended DMA
 Dual-Ended DMA
 Arbitrated-Ended DMA
 Interleaved DMA
Single-Ended DMA: Single-Ended DMA Controllers operate by reading and writing from a
single memory address. They are the simplest DMA.
Dual-Ended DMA: Dual-Ended DMA controllers can read and write from two
memory addresses. Dual-ended DMA is more advanced than single-ended DMA.
Arbitrated-Ended DMA: Arbitrated-Ended DMA works by reading and writing to
several memory addresses. It is more advanced than Dual-Ended DMA. Interleaved DMA:
Interleaved DMA are those DMA that read from one memory address and write from
another memory address.
Working of DMA Controller
The DMA controller registers have three registers as follows.
 Address register – It contains the address to specify the desired location in
memory.
 Word count register – It contains the number of words to be transferred.
 Control register – It specifies the transfer mode.
Note: All registers in the DMA appear to the CPU as I/O interface registers. Therefore, the
CPU can both read and write into the DMA registers under program control via the data bus.
The figure below shows the block diagram of the DMA controller. The unit communicates
with the CPU through the data bus and control lines. Through the use of the address bus and
allowing the DMA and RS register to select inputs, the register within the DMA is chosen by
the CPU. RD and WR are two-way inputs. When BG (bus grant) input is 0, the CPU can
communicate with DMA registers. When BG (bus grant) input is 1, the CPU has relinquished
the buses and DMA can communicate directly with the memory.
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Fig 9. DMA Register

Explanation: The CPU initializes the DMA by sending the given information through the
data bus.
 The starting address of the memory block where the data is available (to read) or
where data are to be stored (to write).
 It also sends word count which is the number of words in the memory block to be
read or written.
 Control to define the mode of transfer such as read or write.A control to begin the DMA
transfer
Modes of Data Transfer in DMA
There are 3 modes of data transfer in DMA that are described below.
 Burst Mode: In Burst Mode, buses are handed over to the CPU by the DMA if
the whole data is completely transferred, not before that.
 Cycle Stealing Mode: In Cycle Stealing Mode, buses are handed over to the CPU
by the DMA after the transfer of each byte. Continuous request for bus control is
generated by this Data Transfer Mode. It works more easily for higher-priority
tasks.
 Transparent Mode: Transparent Mode in DMA does not require any bus in the
transfer of the data as it works when the CPU is executing the transaction.
8237 DMA Controller
8237 DMA Controller is a type of DMA Controller which has a flexible number of
channels but generally works on 4 Input-Output channels. In these present channels, the
channel has to be given the highest priority to be decided by the Priority Encoder. Each
channel in the 8237 DMA Controller has to be programmed separately.
8257 DMA Controller
8257 DMA Controller is a type of DMA Controller, that when a single Intel 8212 I/O
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device is paired with it, becomes 4 channel DMA Controller. In 8257 DMA Controller, the
highest priority channel is acknowledged. It contains two 16-bit registers, one is DMA
Address Register and the other one is Terminal Count Register.
Advantages of DMA Controller
 Data Memory Access speeds up memory operations and data transfer.
 CPU is not involved while transferring data.
 DMA requires very few clock cycles while transferring data.
 DMA distributes workload very appropriately.
 DMA helps the CPU in decreasing its load.
Disadvantages of DMA Controller
 Direct Memory Access is a costly operation because of additional
operations.
 DMA suffers from Cache-Coherence Problems.
 DMA Controller increases the overall cost of the system.
 DMA Controller increases the complexity of the software.

Let us sum up
Direct Memory Access (DMA)

1. Definition:
DMA is a method that allows certain hardware components to access system memory
independently of the CPU, enabling high-speed data transfer.
2. Functionality:
DMA transfers data between I/O devices and memory without CPU intervention,
freeing the CPU to perform other tasks.
8257 DMA Controller

1. Purpose:
The 8257 is a dedicated DMA controller that manages DMA operations, coordinating
data transfers between peripherals and memory.
2. Channels:
The 8257 can support up to four DMA channels, allowing multiple devices to
perform DMA transfers simultaneously.
Types of DMA Controllers

1. Single-Channel DMA:
A single DMA controller that handles one device at a time, leading to simpler designs
but limited efficiency.
2. Multi-Channel DMA:
Controllers like the 8257 that support multiple channels, enabling concurrent data
transfers and improving overall system performance.
Advantages of DMA Controller
1. Increased Throughput:
By allowing devices to transfer data without CPU intervention, DMA increases the
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overall data transfer rates and system efficiency.

2. Reduced CPU Overhead:
The CPU is freed from managing data transfers, allowing it to perform other
computations and improving multitasking capabilities.

Disadvantages of DMA Controller

1. Complexity:
Implementing DMA adds complexity to the system design, requiring additional
hardware and control logic.
2. Potential for Conflicts:
Since DMA allows devices direct access to memory, it may lead to conflicts or data
corruption if not properly managed, especially in systems with multiple active devices.
1. What is the primary function of the Intel 8259 PIC?
a) To provide direct memory access
b) To combine multiple interrupt sources into a single interrupt output
c) To manage data transmission between microprocessors
d) To handle memory management

Answer: b) To combine multiple interrupt sources into a single interrupt output

2. How many interrupt inputs can a single 8259 PIC manage?
a) 5
b) 2
c) 8
d) 16

Answer: c) 8

3. Which of the following is NOT a feature of the Intel 8259 PIC?

a) Programmable interrupt levels
b) Direct Memory Access (DMA)
c) Can operate in level or edge-triggered modes
d) Can cascade with other 8259 chips

Answer: b) Direct Memory Access (DMA)

4. What is the function of the Interrupt Request Register (IRR) in the 8259 PIC?
a) To store the interrupt levels currently being serviced
b) To store the interrupt levels requesting service
c) To mask interrupt levels
d) To reset the microprocessor

Answer: b) To store the interrupt levels requesting service

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5. What is the purpose of the Interrupt Mask Register (IMR) in the 8259 PIC?
a) To store interrupt levels that have to be masked
b) To store interrupt levels currently being executed
c) To prioritize interrupt levels
d) To reset all interrupt levels
Answer: a) To store interrupt levels that have to be masked

UNIT V

Introduction to Microcontroller - Microcontroller Vs Microprocessor - 8051

Microcontroller architecture - 8051 pin description. Timers and Counters – Operating
Modes- Control Registers. Interrupts – Interrupts in 8051 - Interrupts Control Register –
Execution of interrupt.

Section No Topic Page

No
Unit Objectives
5.1 Introduction to Microcontroller
5.1.1 Microcontroller Vs Microprocessor
5.2 8051 Microcontroller architecture
5.2.1 Definition
5.2.2 Applications
5.2.3 Advantages
5.2.4 Disadvantages
5.3 8051 Pin Description
5.3.1 8051 Input Output Ports
5.3.2 Input and Output Configuration
5.4 Timers and Counters
5.4.1 Operating Modes
5.4.2 Control Register
5.4.3 Counters in 8051
5.4.4 Applications
5.5 Interrupts
5.5.1 Interrupts in 8051
5.5.2 Interrupt Control Register
5.5.3 Execution of Interrupts
5.5.4 Applications of 8051 Interrupts
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5.1 INTRODUCTION TO MICROCONTROLLER

This module introduces learners to microcontrollers, with a focus on the 8051 microcontrollers. It
aims to provide a foundational understanding of microcontroller technology, covering both theoretical
concepts and practical applications. By the module's end, learners will comprehend the 8051's
architecture, including its CPU, memory, I/O ports, timers, and interrupts. They'll also grasp essential
skills like pin configuration and the implementation of timers, counters, and interrupts. With this
knowledge, learners will be equipped to design and implement systems utilizing the 8051
microcontrollers for a wide range of embedded applications.
5.1.1 Microcontroller Vs Microprocessor:

Difference between Microprocessor and microcontroller

Microprocessor Micro Controller

Microprocessor is heart of Computer system. Micro Controller is a heart of embedded

system.

It is just a processor. Memory and Micro controller has processor

I/Ocomponents have to be connected along withinternal
externally memory and i/O components

Since memory and I/O has to be Since memory and I/O are present
connectedexternally, the circuit becomes large. internally, thecircuit is small.

Cannot be used in compact systems and Can be used in compact systems and hence
henceinefficient it isan efficient technique

Cost of the entire system increases Cost of the entire system is low
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Due to external components, the entire power Since external components are low, total
consumption is high. Hence it is not suitable power consumption is less and can be
to used with devices running used with devices running on stored
on stored power like batteries. power like batteries.

Micro controllers have power saving

Most of the microprocessors do not have modes like idle mode and power saving
powersaving features. mode. This helps to reduce
power consumption evenfurther.

Since memory and I/O components are all Since components are internal, most of the
external, each instruction will need external operations are internal instruction, hence
operation, hence it is relatively speed is fast.
slower.

Microprocessors are based on von Neumann Micro controllers are based on Harvard
model/architecture where program and data architecture where program memory and
are stored in same Data memory are separate
memory module

Let us sum up:

 Microprocessor:
 Requires external memory and I/O components. Based on the von Neumann
architecture, where program and data share the same memory space, resulting in
relatively slower performance.
 Due to external memory and I/O components, it occupies more space and is less
efficient for compact systems.
 Microcontroller:
 Follows the Harvard architecture, where program and data memory are separate,
allowing faster execution.
 Integrated components reduce cost and power consumption, and it often includes
power-saving modes (e.g., idle and sleep modes).

1. Which of the following is a major advantage of a microcontroller over a

microprocessor?
A) Higher processing speed
B) Power saving modes
C) Larger memory capacity
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D) External memory requirement

Answer: B) Power saving modes
2. What architecture do most microcontrollers use?
A) von Neumann architecture
B) Harvard architecture
C) Dual-core architecture
D) Modular architecture
Answer: B) Harvard architecture
3. Why is a microcontroller considered more efficient for compact systems?
A) Because it has higher clock speeds
B) Due to internal memory and I/O components
C) It can connect to multiple external devices
D) It consumes more power

Answer: B) Due to internal memory and I/O components

4. What is a typical feature of most microprocessors?

A) Power saving mode
B) External memory and I/O components
C) Integrated system design
D) Idle mode

Answer: B) External memory and I/O components

5. Which architecture stores program and data in the same memory module?
A) Harvard architecture
B) ARM architecture
C) von Neumann architecture
D) RISC architecture
Answer: C) von Neumann architecture

5.2 8051 MICROCONTROLLER ARCHITECTURE

5.2.1 Definition:
8051 microcontroller is designed by Intel in 1981. It is an 8-bit microcontroller. It is built
with 40 pins DIP (dual inline package), 4kb of ROM storage and 128 bytes of RAM storage,
2 16-bit timers. It consists of are four parallel 8-bit ports, which are programmable as well as
addressable as per the requirement. An on-chip crystal oscillator is integrated in the
microcontroller having crystal frequency of 12 MHz.
In the following diagram, the system bus connects all the support devices to the CPU. The
system bus consists of an 8-bit data bus, a 16-bit address bus and bus control signals.
8051 Microcontroller Architecture

The 8051 Microcontroller Architecture consists of the following major components:

 [Link] Computer Science – SEMESTER III UNIT - V

 Interrupt control: It supports five interrupt sources, which can interrupt the normal
program execution to handle specific events.
 Central Processing Unit (CPU): This is the brain of the microcontroller, which is
responsible for executing instructions and performing arithmetic and logical
operations.
 Oscillator: It requires an external oscillator to provide a clock signal to the
microcontroller
 Bus control: The 8051 microcontroller includes a bus controller that manages data
transfer between the CPU and peripheral devices, such as memory or input/output
devices.
 4k byte ROM: The 8051-microcontroller architecture includes a 4 kilobyte (4k) read-
only memory (ROM) for storing the program instructions that are executed by the CPU.
 128-byte RAM: The 8051 microcontrollers also has a 128-byte random-access
memory (RAM) for storing data that is used by the program instructions during
runtime.
 Input/Output Ports: They have four 8-bit input/output (I/O) ports that can be
configured as either input or output.
 Timers and Counters: They have two 16-bit timers/counters that can be used for a
variety of tasks such as measuring time intervals, generating PWM signals, and
counting external events.
 Serial Communication Interface (SCI): It has a built-in serial port that can be used for
asynchronous serial communication.
In this section, the 8051-microcontroller architecture block diagram is depicted as:
 [Link] Computer Science – SEMESTER III UNIT - V

Fig 1. 8051 Microcontroller Architecture

5.2.2 Applications
The microcontroller 8051 applications include a large number of machines, principally
because it is simple to incorporate in a project or to assemble a machine around it. The
following are the key spots of the spotlight:
1. Energy Management: Competent measuring device systems aid in calculating energy
consumption in domestic and industrialized applications. These meter systems are
prepared competent by integrating microcontrollers.
2. Touch screens: A high degree of microcontroller suppliers integrate touch sensing
abilities in their designs. Transportable devices such as media players, gaming devices
& cell phones are some illustrations of micro-controller integrated with touch sensing
screens.
3. Automobiles: The microcontroller 8051 discovers broad recognition in supplying
automobile solutions. They are extensively utilized in hybrid motor vehicles to control
engine variations
4. Medical Devices: Handy medicinal gadgets such as glucose & blood pressure
monitors bring into play micro-controllers, to put on view the measurements, as a
results.
5.2.3 Advantages:
 It is a cheaper option, which makes it a popular choice for low-cost applications.
 Designed to consume very low power for applications.
 8051 Microcontroller Architecture is known for its high reliability.
5.2.4 Disadvantages:
 It has limited processing power compared to microcontrollers
 Memory is limited for applications it requires a lot of data storage.
 It highly requires advanced peripherals such as USB or Ethernet connectivity

Let us sum up:

 Definition:
 The 8051 microcontroller, designed by Intel in 1981, is an 8-bit microcontroller with
40 pins, 4KB ROM, 128 bytes of RAM, and two 16-bit timers.
 It includes four 8-bit programmable I/O ports and a built-in 12 MHz crystal
oscillator
 Applications:
 The 8051 microcontroller is used in energy management systems to calculate
consumption, integrated into touch screens for devices like phones and gaming
consoles, controls hybrid vehicles in the automotive industry, and powers medical
devices like glucose and blood pressure monitors.

1. What is the size of the 8051 microcontroller's ROM?

A) 2KB
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B) 4KB
C) 8KB
D) 128KB
Answer: B) 4KB
2. Which of the following is a key characteristic of a List ADT?
A) 16-bit timers
B) Serial Communication Interface
C) On-chip oscillator
D) 64KB RAM
Answer: D) 64KB RAM
3. What kind of architecture does the 8051 microcontroller follow?
A) Harvard
B) von Neumann
C) ARM
D) MIPS
Answer: A) Harvard
4. Where are 8051 microcontrollers commonly used?
A) Spacecraft
B) Automobiles
C) Nuclear Plants
D) Oil Refineries
Answer: B) Automobiles
5. Which is an advantage of the 8051 microcontroller?
A) High processing power
B) Low power consumption
C) Large memory space
D) USB connectivity
Answer: B) Low power consumption

5.3 8051 PIN DESCRIPTION

5.3.1 8051 Input Output Ports:

8051 microcontrollers have 4 I/O ports each of 8-bit, which can be configured as input or
output. Hence, total 32 input/output pins allow the microcontroller to be connected with the
peripheral devices.
 Pin configuration, i.e. the pin can be configured as 1 for input and 0 for output as per
the logic state.
o Input/Output (I/O) pin − All the circuits within the microcontroller must be
connected to one of its pins except P0 port because it does not have pull-up
resistors built-in.
o Input pin − Logic 1 is applied to a bit of the P register. The output FE
transistor is turned off and the other pin remains connected to the power supply
voltage over a pull-up resistor of high resistance.
 [Link] Computer Science – SEMESTER III UNIT - V

 Port 0 − The P0 (zero) port is characterized by two functions −

o When the external memory is used then the lower address byte (addresses
A0A7) is applied on it, else all bits of this port are configured as input/output.
o When P0 port is configured as an output then other ports consisting of pins
with built-in pull-up resistor connected by its end to 5V power supply, the pins
of this port have this resistor left out.
5.3.2 Input and Output Configuration
If any pin of this port is configured as an input, then it acts as if it “floats”, i.e. the
input has unlimited input resistance and in-determined potential.
When the pin is configured as an output, then it acts as an “open drain”. By applying
logic 0 to a port bit, the appropriate pin will be connected to ground (0V), and applying logic 1,
the external output will keep on “floating”. In order to apply logic 1 (5V) on this output pin, it
is necessary to build an external pullup resistor.

Port 1

P1 is a true I/O port as it doesn’t have any alternative functions as in P0, but this port
can be configured as general I/O only. It has a built-in pull-up resistor and is completely
compatible with TTL circuits.
Port 2

P2 is similar to P0 when the external memory is used. Pins of this port occupy
addresses intended for the external memory chip. This port can be used for higher address
byte with addresses A8-A15. When no memory is added then this port can be used as a
general input/output port similar to Port 1.
Port 3

In this port, functions are similar to other ports except that the logic 1 must be applied
to appropriate bit of the P3 register.
Pins Current Limitations

When pins are configured as an output (i.e. logic 0), then the single port pins can
receive a current of 10mA.
When these pins are configured as inputs (i.e. logic 1), then built-in pull-up resistors
provide very weak current, but can activate up to 4 TTL inputs of LS series.
If all 8 bits of a port are active, then the total current must be limited to 15mA (port
P0: 26mA).
If all ports (32 bits) are active, then the total maximum current must be limited to
71mA.
Pins 1 to 8 − These pins are known as Port 1. This port doesn’t serve any other
functions. It is internally pulled up, bi-directional I/O port.
Pin 9 − It is a RESET pin, which is used to reset the microcontroller to its initial values.
Pins 10 to 17 − These pins are known as Port 3. This port serves some functions like
interrupts, timer input, control signals, serial communication signals RxD and TxD, etc.
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Pins 18 & 19 − These pins are used for interfacing an external crystal to get the system
clock.
Pin 20 − This pin provides the power supply to the circuit.

Pins 21 to 28 − These pins are known as Port 2. It serves as I/O port. Higher order
address bus signals are also multiplexed using this port.
Pin 29 − This is PSEN pin which stands for Program Store Enable. It is used to read a
signal from the external program memory.
Pin 30 − This is EA pin which stands for External Access input. It is used to
enable/disable the external memory interfacing.
Pin 31 − This is ALE pin which stands for Address Latch Enable. It is used to
demultiplex the address-data signal of port.
Pins 32 to 39 − These pins are known as Port 0. It serves as I/O port. Lower order
address and data bus signals are multiplexed using this port.
Pin 40 − This pin is used to provide power supply to the circuit.

Fig 2. 8051 Pin Configuration

Many of the microcontroller applications require counting of external events such as

frequency of the pulse trains and generation of precise internal time delays between computer
actions. Both these tasks can be implemented by software techniques, but software loops for
counting, and timing will not give the exact result rather more important functions are not
done. To avoid these problems, timers and counters in the micro-controllers are better options
for simple and low-cost applications. These timers and counters are used as interrupts in 8051
microcontroller.
 [Link] Computer Science – SEMESTER III UNIT - V

Let us sum up:

 Pin Current Limitations:

 Output pins can drive a current of up to 10mA per pin.
 If all pins in a port are active, the total current for the port must not exceed 15mA
(26mA for Port 0).
 The total maximum current across all ports must be limited to 71mA
 I/O Ports:
 The 8051 microcontroller has 4 input/output (I/O) ports, each 8-bit wide, offering
a total of 32 I/O pins.
 These can be configured as input or output as needed. Port 0 can be used for I/O and
lower address byte transmission when external memory is used
Check your Progress:

1. How many I/O ports does the 8051 microcontroller have?

A) 2
B) 3
C) 4
D) 5
Answer: C) 4
2. Which port in the 8051 microcontroller is used for both I/O and carrying the
lower address byte when external memory is used?
A) Port 1
B) Port 2
C) Port 0
D) Port 3
Answer: C) Port 0
3. What is the function of Pin 9 in the 8051 microcontroller?
A) Reset the microcontroller
B) Provide system clock
C) Read external memory
D) Enable I/O ports
Answer: A) Reset the microcontroller
4. Which pin is used for interfacing with an external crystal to get the system clock?
A) Pin 20
B) Pins 18 & 19
C) Pin 30
D) Pin 29
Answer: B) Pins 18 & 19
5. What does the PSEN pin stand for in the 8051 microcontroller?
A) Program Store Enable
B) Program Save Enable
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C) Power Supply Enable

D) Port System Enable
Answer: A) Program Store Enable
6. What is the current limit for a single port pin configured as output in the 8051
microcontroller?
A) 5mA
B) 10mA
C) 15mA
D) 20mA
Answer: B) 10mA

5.4 TIMERS AND COUNTERS

There are two 16-bit timers and counters in 8051 microcontroller: timer 0 and timer
1. Both timers consist of 16-bit register in which the lower byte is stored in TL and the
higher byte is stored in TH. Timer can be used as a counter as well as for timing operation
that depends on the source of clock pulses to counters.

Fig 3. Timers and counters

Counters and Timers in 8051 microcontroller contain two special function registers: TMOD
(Timer Mode Register) and TCON (Timer Control Register), which are used for activating and
configuring timers and counters. There are four different modes of the Timer or Counter. The
Mode 0 to Mode 2 are for both of the Timer/Counter. Mode 3 has a different meaning for
each timer register. There is a register called TMOD. This register can be programmed to
configure these timers or counters. The Serial port is used for serial communication in mode 1
and 3. Timer1 is used for generating the baud rate. So only Timer0 is available for timer or
counter operations.
5.4.1 Operating Modes:
TMOD Register

TMOD (Timer Mode) is an SFR. The address of this register is 89H. This is not bit-
addressable.
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Timer Timer1 Mode Timer0 operating Mode

Bit Gate C/T M1 M0 Gate C/T M1 M0

Details (G) (G)

Now, let us see the circuit that controls the running of the timers.

Fig 3. Operating Modes Circuit Control

In the following table, we will see the bit details and their different operations for high or low
value.

Bit High Value (1) Low Value (0)

Details

C/T Configure for the Counter Configure for the Timer

operations operations

Gate Timer0 or Timer1 will be in Timer0 or Timer1 will be in

(G) RunMode when TRX bit of RunMode when TRX bit of
TCON register is high. TCON register is high and
INT0 or INT1 is high.
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Bit 00 01 10 11
Details

M1 M0 This is for Mode This is Mode This is Mode 3 This is Mode 3

0. (8-bit 1. (16-bit (8-bit auto (The function
timer/counter, with timer/counter) reload- depends on
5-bit pre- timer/counter) Timer0 or
scaler) Timer1)

The Gate bit will be high when the timer or counter is in mode 0 to 2.

Operating Mode 0 of Timer/Counter

The Mode 0 operation is the 8-bit timer or counter with a 5-bit pre-scaler. So it is a
13-bit timer/counter. It uses 5 bits of TL0 or TL1 and all of the 8-bits of TH0 or TH1.

Fig 4. Operating Mode 0 of Timer/Counter

In this example the Timer1is selected, in this case, every 32 (25)event for counter
operations or 32 machine cycles for timer operation, the TH1 register will be incremented by
1. When the TH1overflows from FFH to 00H, then the TF1 of TCON register will be high,
and it stops the timer/counter. So for an example, we can say that if the TH1 is holding F0H,
and it is in timer mode, then TF1will be high after 10H * 32
= 512 machine cycles.
MOVTMOD, #00H MOVTH1,
#0F0H
MOVIE, #88H
SETB TR1
In the above program, the Timer1 is configured as timer mode 0. In this case Gate = 0.
Then the TH1 will be loaded with F0H, then enable the Timer1 interrupt. At last set the TR1
of TCON register, and start the timer.
Operating Mode 1 of Timer/Counter

The Mode 1 operation is the 16-bit timer or counter. In the following diagram, we are
 [Link] Computer Science – SEMESTER III UNIT - V

using Mode 1 for Timer0.

Fig 5. Operating Mode 1 of Timer/Counter

In this case every event for counter operations or machine cycles for timer operation,
the TH0– TL0 register-pair will be incremented by 1. When the register pair overflows from
FFFFH to 0000H, then the TF0 of TCON register will be high, and it stops the timer/counter.
So for an example, we can say that if the TH0 – TL0 register pair is holding FFF0H, and it is
in timer mode, then TF0 will be high after 10H = 16 machine cycles. When the clock
frequency is 12MHz, then the following instructions generate an interrupt 16 µs after Timer0
starts running.

MOVTMOD, #01H
MOVTL0, #0F0H
MOVTH0, #0FFH
MOVIE, #82H
SETB TR0
In the above program, the Timer0 is configured as timer mode 1. In this case Gate = 0.
Then the TL0 will be loaded with F0H and TH0 is loaded with FFH, then enable the Timer0
interrupt. At last set the TR0 of TCON register, and start the timer.
Operating Mode 2 of Timer/Counter

The Mode 2 operation is the 8-bit auto reload timer or counter. In the following
diagram, we are using Mode 2 for Timer1.

Fig 6. Operating Mode 2 of Timer/Counter

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In this case every event for counter operations or machine cycles for timer operation,
the TL1register will be incremented by 1. When the register pair overflows from FFH to 00H,
then the TF1 of TCON register will be high, also theTL1 will be reloaded with the content of
TH1 and starts the operation again. So for an example, we can say that if the TH1 and TL1
register both are holding F0H and it is in timer mode, then TF1 will be high after 10H= 16
machine cycles. When the clock frequency is 12MHz this happens after 16 µs, then the
following instructions generate an interrupt once every 16 µs after Timer1 starts running.

MOVTMOD, #20H
MOVTL1, #0F0H
MOVTH1, #0F0H
MOVIE, #88H
SETBTR1

In the above program, the Timer1 is configured as timer mode 2. In this case Gate = 0.
Then the TL1 and TH1 are loaded with F0H. then enable the Timer1 interrupt. At last set the
TR1 of TCON register, and start the timer. Timer1 in mode 2 generates the desired baud rate
when the serial port is working on Mode 1 or 3.

Operating Mode 3 of Timer/Counter

Mode 3 is different for Timer0 and Timer1. When the Timer0 is working in mode 3, the
TL0 will be used as an 8-bit timer/counter. It will be controlled by the standard Timer0
control bits, T0 and INT0 inputs. The TH0 is used as an 8-bit timer but not the counter. This
is controlled by Timer1 Control bit TR1. When the TH0 overflows from FFH to 00H, then
TF1 is set to 1. In the following diagram, we can Timer0 in Mode 3.

Fig 7. Operating Mode 0 of Timer/Counter

When the Timer1 is working in Mode 3, it simply holds the count but does not run.
 [Link] Computer Science – SEMESTER III UNIT - V

When Timer0 is in mode 3, the Timer1 is configured in one of the mode 0, 1 and
2. In this case, the Timer1 cannot interrupt the microcontroller. When the TF1 is used by TH0
timer, the Timer1 is used as Baud Rate Generator. The meaning of gate bit in Timer0 and
Timer1 for mode 3 is as follows: It controls the running of 8-bit timer/counter TL0 as like
Mode 0, 1, or 2. The running of TH0 is controlled by TR1 bit only. So the gate bit in this
mode for Timer0 has no specific role. The mode 3 is present for applications requiring an
extra 8-bit timer/counter. In Mode 3 of Timer0, the 8051 has three timers. One 8-bit timer by
TH0, another 8-bit timer/counter by TL0, and one 16-bit timer/counter by Timer1.

5.4.2 Control Register:

Timer Mode Control (TMOD): TMOD is an 8-bit register used for selecting timer or
counter and mode of timers. Lower 4-bits are used for control operation of timer 0 or
counter0, and remaining 4-bits are used for control operation of timer1 or [Link]
register is present in SFR register, the address for SFR register is 89th.

Fig 8. Timer Mode Control (TMOD)

Gate: If the gate bit is set to ‘0’, then we can start and stop the “software” timer in the same
way. If the gate is set to ‘1’, then we can perform hardware timer.
C/T: If the C/T bit is ‘1’, then it is acting as a counter mode, and similarly when set C+
=/T bit is ‘0’; it is acting as a timer mode.
Mode select bits: The M1 and M0 are mode select bits, which are used to select the timer
operations. There are four modes to operate the timers.
Mode 0: This is a 13-bit mode that means the timer operation completes with “8192” pulses.
Mode 1: This is a16-bit mode, which means the timer operation completes with
maximum clock pulses that “65535”.
Mode 2: This mode is an 8-bit auto reload mode, which means the timer operation completes
with only “256” clock pulses.
Mode 3: This mode is a split-timer mode, which means the loading values in T0 and
automatically starts the T1.
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Fig 9. Mode Selection Bits

Mode selection Values of timers and counter in 8051

Fig 10. Mode selection values of timers and counters

Sample Program:

Fig 11. Sample Program

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Counters in 8051
Keep a counter by keeping C/T bit high, i.e., logic ‘1’ in the TMOD register. For better
understanding, we have given one program which uses timer 1 as a counter. Here the LEDs
are connected to 8051 Port 2, and the switch to the timer1 pin P3.5; and therefore, if the
switch is pressed, the value will be counted. Otherwise, an externally connected sensor to this
counter pin as input does this counting operation.

Fig 12. Sample Counter Program

Applications of Timers and Counters in 8051- Digital Counter with 8051

The Digital counter with 8051 is achieved by programming the microcontroller as
discussed above and by attaching a sensor system to it. This object counter uses IR sensor
that detects the obstacle near to it and also enables the pin of the microcontroller 06. When an
object passes through the sensors, then the microcontroller gets an interrupt signal from the
IR sensors and increment the count which is displayed in the 7-segment display.
Let us sum up:
 Timers and Counters: The 8051 microcontroller contains two 16-bit
timers/counters, Timer 0 and Timer 1.
 These timers consist of a 16-bit register, split into lower and higher bytes (TL and
TH). Both can be used either as timers (to generate time delays) or as counters (to
count external events).
 Operating Modes:
o Mode 0: Functions as a 13-bit timer/counter where 5 bits are from TL and 8
bits are from TH. The timer increments every 32 machine cycles.
o Mode 1: A full 16-bit timer/counter that increments every machine cycle.
When it overflows, the overflow flag (TF) is set.
o Mode 2: An 8-bit auto-reload mode where the TL register increments. On
overflow, TL is reloaded from TH, and the operation continues.
 [Link] Computer Science – SEMESTER III UNIT - V

Check your Progress

1. How many timers/counters are available in the 8051 microcontroller?

a) 1

b) 2

c) 3

d) 4

Answer: b) 2

2. Which register is used to configure the mode of timers in the 8051?

a) TCON

b) TMOD

c) TH

d) TL

Answer: b) TMOD

3. What is the size of Timer 0 in Mode 1?

a) 8-bit

b) 16-bit
c) 13-bit

d) 32-bit

Answer: b) 16-bit

4. In which mode does Timer 0 act as two separate 8-bit timers?

a) Mode 0

b) Mode 1

c) Mode 2
 [Link] Computer Science – SEMESTER III UNIT - V

d) Mode 3

Answer: d) Mode 3

5. What does the C/T bit in the TMOD register determine?

a) Timer mode

b) Counter or Timer mode

c) Interrupt enable

d) Baud rate selection

Answer: b) Counter or Timer mode

5.5 INTERRUPTS

IMPORTANCE OF INTERRUPTS.

During program execution if peripheral devices need service from microcontroller,

device will generate interrupt and gets the service from microcontroller. When peripheral
device activates the interrupt signal, the processor branches to a program called interrupt
service routine. After executing the interrupt service routine the processor returns to the main
program. Steps taken by processor while processing an interrupt:
1. It completes the execution of the current instruction.

2. PSW is pushed to stack.

3. PC content is pushed to stack.

4. Interrupt flag is reset.

5. PC is loaded with ISR address.

ISR will always ends with RETI instruction. The execution of RETI instruction
results in the following.
1. POP the current stack top to the PC.

2. POP the current stack top to PSW.

Classification of interrupts.
1. External and internal interrupts.
 [Link] Computer Science – SEMESTER III UNIT - V

External interrupts are those initiated by peripheral devices through the external pins of
the microcontroller. Internal interrupts are those activated by the internal peripherals of the
microcontroller like timers, serial controller etc.)
2. Maskable and non-maskable interrupts.

The category of interrupts which can be disabled by the processor using program is
called maskable interrupts. Non-maskable interrupts are those categories by which the
programmer cannot disable it using program.
3. Vectored and non-vectored interrupt.

Starting address of the ISR is called interrupt vector. In vectored interrupts the starting
address is predefined. In non-vectored interrupts, the starting address is provided by the
peripheral as follows.
 Microcontroller receives an interrupt request from external device.
 Controller sends an acknowledgement (INTA) after completing the execution of
current instruction.
The peripheral device sends the interrupt vector to the microcontroller.
5.5.1 Interrupts in 8051:
Interrupts are the events that temporarily suspend the main program, pass the control to
the external sources and execute their task. It then passes the control to the main program
where it had left off.8051 has 5 interrupt signals, i.e. INT0, TFO, INT1, TF1, RI/TI. Each
interrupt can be enabled or disabled by setting bits of the IE register and the whole interrupt
system can be disabled by clearing the EA bit of the same register.
 IE (Interrupt Enable) Register
This register is responsible for enabling and disabling the interrupt. EA register is set to
one for enabling interrupts and set to 0 for disabling the interrupts. Its bit sequence and their
meanings are shown in the following figure.

EA IE.7 It disables all interrupts. When EA = 0 no interrupt will be

acknowledged and EA = 1 enables the interrupt individually.

- IE.6 Reserved for future use.

- IE.5 Reserved for future use.

 [Link] Computer Science – SEMESTER III UNIT - V

ES IE.4 Enables/disables serial port interrupt.

ET1 IE.3 Enables/disables timer1 overflow interrupt.

EX1 IE.2 Enables/disables external interrupt1.

ET0 IE.1 Enables/disables timer0 overflow interrupt.

EX0 IE.0 Enables/disables external interrupt0.

 IP (Interrupt Priority) Register

The priority levels of the interrupts can be altered by changing the corresponding bit in
the Interrupt Priority (IP) register as shown in the following figure.

 A low priority interrupt can only be interrupted by the high priority interrupt, but not
interrupted by another low priority interrupt.
 If two interrupts of different priority levels are received simultaneously, the
request of higher priority level is served.
 If the requests of the same priority levels are received simultaneously, then the internal
polling sequence determines which request is to be serviced.

- IP.6 Reserved for future use.

- IP.5 Reserved for future use.

PS IP.4 It defines the serial port interrupt priority level.

PT1 IP.3 It defines the timer interrupt of 1 priority.

PX1 IP.2 It defines the external interrupt priority level.

PT0 IP.1 It defines the timer0 interrupt priority level.

PX0 IP.0 It defines the external interrupt of 0 priority level.

5.5.2 Interrupt Control Register:

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Timer Control Register (TCON):

The interruptions that the microcontroller interfaces with (external) devices are known
as external interrupts. They are received by the controller’s INTx pins. These may be
triggered by edges or levels. Interrupt is enabled for a low at the INTx pin when it is level
triggered, and for a high to low transition at the INTx pin when it is edge triggered. TCON is
another register used to control operations of counter and timers in microcontrollers. It is an
8-bit register wherein four upper bits are responsible for timers and counters and lower bits
are responsible for interrupts.

Fig 13. Timer Control Register (TCON)

TF1: The TF1 stands for ‘timer1’ flag bit. Whenever calculating the time-delay in timer1, the
TH1 and TL1 reaches to the maximum value that is “FFFF” automatically.
EX: while (TF1==1)

Whenever the TF1=1, then clear the flag bit and stop the timer.

TR1: The TR1 stands for timer1 start or stop bit. This timer starting can be through software
instruction or through hardware method.
EX: gate=0 (start timer 1 through software instruction) TR1=1; (Start timer)

TF0: The TF0 stands for ‘timer0’ flag-bit. Whenever calculating the time delay in timer1, the
TH0 and TL0 reaches to a maximum value that is ‘FFFF’, automatically.
EX: while (TF0==1) Whenever the TF0=1, then clear the flag bit and stop the timer.

TR0: The TR0 stands for ‘timer0’ start or stop bit; this timer starting can be through software
instruction or through hardware method.
EX: gate=0 (start timer 1 through software instruction)
TR0=1; (Start timer)
5.5.3 Execution of Interrupts:
Types of 8051 Microcontroller Interrupts
8051 Microcontroller suffers five different types of interrupts that hampers the main
program execution. These five types of interrupts are:
 Timer 0 overflow interrupt- TF0
 Timer 1 overflow interrupt-TF1
 External hardware interrupt- INT0
 External hardware interrupt- INT1
 Serial communication interrupt- RI/TI
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External Hardware Interrupt- (INT0 & INT1)

The 8051 microcontrollers are able to respond to external events through its
external interrupts, INT0 and INT1.
External Interrupt 0 (INT0)
 It is connected to the 8051’s pin PORT3.2.
 An interrupt request is issued when this pin transitions from low to high in
response to an external signal.
 It is possible to program the microcontroller to carry out a particular
Interrupt Service Routine (ISR) in response to this interrupt.
 Set the IE (Interrupt Enable) bit for INT0 in the TCON register and configure the
IT0 (Interrupt Type 0) bit in the TCON register corresponding to the desired
triggering condition (edge or level-triggered) in order to enable and configure
INT0.
External Interrupt 1 (INT1)
 It is connected to the 8051’s pin PORT3.3
 When that particular pin encounters a low-to-high transitions, INT1, like INT0,
creates an interrupt request.
 By configuring the IT1 (Interrupt Type 1) bit in the TCON register and
setting the IE bit for INT1 in the TCON register, one can enable and
configure INT1.
 A specific ISR can be executed by the microcontroller in response to INT1.
Timer Interrupts (Timer0 and Timer1)
Timer 0 and Timer 1 are hardware timers with internal timer interrupts featured in the
8051 microcontrollers. In microcontroller applications, these timers are used to measure
time intervals and generate precise delays. The interrupt system of the microcontroller
enables it to react quickly to outside events. Interrupts for Timer 0
and Timer 1 are produced when their respective timers exceed their limit. The
microcontroller will run the interrupt service routine (ISR) for that timer if the related
interrupt is enabled, and the associated interrupt flag is set upon overflow.
Timer0 Interrupt
 Since Timer 0 is an 8-bit timer, its count range is 0 to 255.
 There are two modes of operation for it, 13-bit and 16-bit. It employs the TH0
(Timer 0 High) and TL0 (Timer 0 Low) registers in 13-bit mode and only the
TH0 register in 16-bit mode.
 It is possible to set timer 0 to interrupt when it approaches zero instead of staying
at its maximum value. The microcontroller can perform a particular interrupt
service routine (ISR) in response to the interrupt request that this overflow
generates.
Timer1 Interrupt
 Timer 1 is a 16-bit timer with a counting range of 0 to 65,535.
 It can operate in 16- or 8-bit mode. It employs the TL1 (Timer 1 Low) and TH1
(Timer 1 High) registers in 8-bit mode and only the TH1 register in 16-bit mode.
 Timer 1 can be set up to produce an interrupt when it overflows, just like Timer
 [Link] Computer Science – SEMESTER III UNIT - V

0. This interruption may cause a certain ISR to be executed.

Serial Communication Interrupts (UART)
UART (Universal Asynchronous Receiver/Transmitter) is a serial communication
protocol used with 8051 microcontrollers. Data is sent over a single cable, bit by bit, in serial
transmission. In this sense, “interrupts” refers to the processes that enable the microcontroller
to react quickly to external events.
Addressing UART communication with the 8051’s interrupts:
 Initialization of UART- Set the data format, baud rate, and enable the UART
module by configuring the UART registers.
 Interrupt Enable– Depending on the operation you wish to interrupt for, enable
the UART’s transmit interrupt (TI) or receive interrupt (RI).
 ISR (interrupt service routine)- To handle the interrupt, write an ISR. The
ISR in UART communication normally verifies whether the transmit buffer is
ready (TI) or whether data has been received (RI).
 Clearing the Flag- To recognize the interrupt and get ready for the next one, in
the ISR, clear the associated interrupt flag (RI or TI).
Interrupt Vector Table
The addresses of different interrupt service routines (ISRs) are stored in a table called
the Interrupt Vector Table (IVT) in an 8051 microcontroller. It is a vital aspect of the
interrupt handling mechanism in the microcontroller. When an interrupt occurs the interrupt
specific ISR is executed by jumping the program counter to the corresponding address in the
IVT. There are memory areas set aside specifically for the IVT in the 8051 microprocessors.
Interrupt Vector
Interrupt Flag Address

Reset – 0000H

INT0 (External Interrupt

0) IE0 0003H

Timer0 TF0 000BH

INT1 (External Interrupt

1) IE1 0013H

Timer 1 TF1 001BH

Serial Interrupt TI/RI 0023H

5.5.4 Application of 8051 Interrupts:

 In real-time systems, interrupts are essential for speedy responses to external
occurrences. Due to its ability to swap tasks fast through interrupts, the 8051 is a good
 [Link] Computer Science – SEMESTER III UNIT - V

choice for applications that need exact timing.

 Interrupts serve in the control of incoming data in communication applications,
assuring timely transmission or rapid handling of received information.
 In embedded systems, 8051 interrupts are frequently utilized for activities like sensor
interfacing, where the microcontroller must react quickly to environmental changes.
 Interruptions assist in ensuring timely data sampling and processing in situations
when data must be obtained from sensors or external devices.

Let us sum up:

 Time Control Register (TCON)

 TCON manages external interrupts from the INTx pins and indicates edge or level
triggering.
 The upper four bits control timers and counters; the lower bits manage
interrupts.

 Interrupts in 8051

 The 8051 has five interrupt signals: INT0, TF0, INT1, TF1, and RI/TI.
 Interrupts can be controlled via the Interrupt Enable (IE) register.
 The EA bit in the IE register can disable all interrupts when cleared.
 The Interrupt Priority (IP) register manages interrupt priority levels

1. What does an interrupt allow the microcontroller to do during program

execution?
A) Terminate the program
B) Suspend the main program to execute the ISR
C) Increase the program speed
D) Ignore peripheral requests
Answer: B) Suspend the main program to execute the ISR
2. Which register is responsible for enabling and disabling interrupts in the 8051
microcontroller?
A) IP Register
B) TCON Register
C) IE Register
D) PSW Register

Answer: C) IE Register
3. What type of interrupt cannot be disabled by the programmer?
A) Maskable Interrupt
B) Non-maskable Interrupt
C) Vectored Interrupt
 [Link] Computer Science – SEMESTER III UNIT - V

D) Internal Interrupt

Answer: B) Non-maskable Interrupt

4. How does the 8051 microcontroller identify which ISR to execute when an interrupt
occurs?
A) By checking the program counter
B) By referencing the Interrupt Vector Table
C) By using the PSW
D) By counting the number of interrupts

Answer: B) By referencing the Interrupt Vector Table

5. What happens when the RETI instruction is executed in an ISR?
A) It halts the program
B) It resets the interrupt flag
C) It pops the current stack top to the PC and PSW
D) It loads the ISR address into the PC

Answer: C) It pops the current stack top to the PC and PSW