Department of Electrical & Electronic Engineering (EEE)
EEE 101L
Electrical Circuits I Laboratory
Semester: Fall-25
Sec: 11
Group No: 3
Project Title: Design a circuit that produces a fluctuating DC Output voltage from an input square wave
Done by:
Sl. NAME ID
1. Sheikh Sayen Murtoza 1000056501
2. MD. Muhib Al Musabbir 1000056510
3. Zarin Tasnim 1000055264
1. Objective:
The primary objective of this project is to design and simulate an RC circuit capable of producing a fluctuating DC output
voltage from a square wave input source. Based on the assigned Group Number G=3, the circuit is designed to handle an
input square wave with a peak amplitude of 22V and a frequency of 60Hz. A critical requirement of the design is to ensure
that the capacitor is driven by an intermediate square wave with a peak amplitude of 10V and a minimum of 0V at the same
frequency, while maintaining a precise circuit time constant of 1ms. The project involves performing a detailed Thevenin
equivalent analysis to determine the appropriate component values and validating the entire design through PSpice simulation
by observing the input and output waveforms for the first 10 cycles.
2. Design and Calculation:
The goal of this design is to create a changing DC output across a capacitor (C1) using a square wave source (Vs). To get a
driving voltage of 10V from a peak source voltage of 22V, a voltage divider network made up of R1 and R2 is
used.
Parameter Determination:
Based on the provided Group Number (G=3), the circuit parameters are as follows:
1)Peak Source Voltage (Vs): (19 + G) = 19 + 3 = 22V
2)Source Frequency (f): 20×G = 20×3 = 60Hz
3)Period (T): 1/f = 1/60 = 16.7ms
4)Target Driving Voltage (Vth): 10V
5)Target Time Constant (τ): 1ms
6)Pulse Width(Pw): T/2= 8.35ms
Component Selection:
To find the resistor values, we first assume a standard capacitor value:
Let, C1 = 1uF
Since τ = Rth×C1, the required Thevenin resistance Rth is:
Rth= τ/C1=1×10−3 s/1×10−6 =1000 ohm
Thevenin Equivalent Analysis
The hint requires showing that the Thevenin equivalent circuit from the source voltage gives the driving voltage of the
capacitor. The capacitor acts as a load connected across R2.
1. Thevenin Voltage (Vth):
The open-circuit voltage across R2 (the driving voltage) is determined by the voltage divider rule:
Vth = Vs × R2 / (R1+R2) = 10V
═>10/22 = R2 / (R1+R2)
═> R2 / (R1+R2) → (Eq. 1)
2. Thevenin Resistance (Rth):
With the source shorted, the resistance seen by the capacitor is R1 in parallel with
R2:
Rth = (R1 × R2) / (R1 + R2) = 1000 ohm → (Eq. 2)
Substituting (Eq. 1) into (Eq. 2):
R1×0.455= 1000
═> R1= 1000/0.455 = 2.2k ohm
Using R1 = 2.2k ohm in (Eq. 2):
1000 = (2200×R2) / (2200+R2)
═>R2= 1.83k ohm
3. Pspice circuit diagram:
4. Input / Output Waveforms:
Fig-Input-Output Waveform
Fig- Input Waveform
Fig- Output waveform
5. Discussion:
In this project, we have set a square wave as an input, consisting of a peak amplitude of 22V and minimum amplitude of 0 V
with a frequency of 60Hz so that we can achieve the desired driving voltage of the capacitor as an output. After that, we have
used Thevenin equivalent resistance and the given value of time constant in order to determine the values of the resistors and
capacitor. Lastly, we have designed our circuit. It is clearly visible from the above graphs that our circuit construction and
simulation were valid as the driving voltage of the capacitor is a fluctuating DC voltage where the peak amplitude is 10 V
and minimum amplitude is 0 V.