SequentialCircuits:
A sequential circuit is a digital logic circuit whose output depends on both the current inputs and past outputs (or internal
state), achieved by incorporating memory elements like flip-flops or registers. Unlike combinational circuits (which only
use current inputs), sequential circuits "remember" history, allowing them to perform complex tasks like counting,
storing data, and creating finite state machines, often synchronized by a clock signal.
Memory-based: Stores previous states.
Clock signal: Many sequential circuits operate based on a clock pulse.
Feedback path: Output is fed back to input to maintain state.
State transitions: Moves from one state to another depending on inputs and current state.
Types of Sequential Circuits:
1. Synchronous Sequential Circuits
o State changes occur only at specific clock edges (rising or falling).
o More reliable and stable.
o Change state only on clock edges.
o Examples:
Flip-flops
Registers
Counters
Synchronous FSMs
2. Asynchronous Sequential Circuits
o Change state whenever inputs change (no clock).
o State changes occur immediately when inputs change (no clock).
o Faster but more difficult to design.
o Used in small control circuits.
Difference Between Combinational and Sequential Circuits:
Feature Combinational Sequential
Depends on current input + past
Output Depends only on current input
states
Memory No Yes
Feedback Not used Used
Clock Not required Usually required
Example Adders, Multiplexers Flip-flops, Counters
Latch:
A latch is a level-triggered memory element. It changes state as long as the enable signal (or control input) is active.
Latches are digital circuits that store a single bit of information and hold its value until it is updated by new input signals.
They are used in digital systems as temporary storage elements to store binary information. Latches can be implemented
using various digital logic gates, such as AND, OR, NOT, NAND, and NOR gates.
Types of Latches:
i. SR Latch (Set-Reset Latch):
S-R latches i.e., Set-Reset latches are the simplest form of latches and are implemented using two inputs: S (Set) and R
(Reset). The S input sets the output to 1, while the R input resets the output to 0. When both S and R inputs are at 1, the
latch is said to be in an "undefined" state. They are also known as preset and clear states. The SR latch forms the basic
building blocks of all other types of flip-flops.
Inputs: S (Set), R (Reset)
Outputs: Q, Q′
Block diagram
Truth table:
S R Q (Next State)
0 0 No Change
0 1 0 (Reset)
1 0 1 (Set)
1 1 Invalid
SR latch using NAND gate SR latch using NOR gate
NAND Gate: NOR Gate:
S' R'
Q (Next
Description S R Q(next) Q̅(next) Operation
State)
No No Hold /
1 1 No Change Hold / Memory 0 0
change change Memory
0 1 1 Set → Q = 1
1 0 1 0 Set (Q = 1)
1 0 0 Reset → Q = 0
Reset (Q =
0 0 Invalid
Forbidden (Q = 0 1 0 1
Q' = 1) 0)
1 1 0 0 Invalid
Characteristics:
Simplest latch
Invalid condition when S = R = 1
ii.D Latch (Data Latch):
D latch is similar to SR latch with some modifications made. Here, the inputs are complements of each other. The D
latch stands for "data latch" as this latch stores single bit temporarily. A D latch can store a bit value, either 1 or 0. When
its Enable pin is HIGH, the value on the D pin will be stored on the Q output. It builds upon the design of the S-R latch,
with a few added logic gates.
Input: D
Enable: E
Block Diagram:
Truth table:
E D Q
0 X No Change
1 0 0
1 1 1
D latch using NAND gate: D latch using NOR gate:
S’ R’
Enable S= R=
Enable (input (input D Q(next) Operation
D Q(next) Operation (EN) D·EN D̅·EN
(EN) to to
latch) latch) Hold
No
0 0 0 0 (Latch
No Hold (Latch change
0 0 1 1 closed)
change closed)
Hold
No Hold (Latch No
0 1 1 1 0 1 0 0 (Latch
change closed) change
closed)
Reset (Q = Reset (Q =
1 0 1 0 0 1 0 0 1 0
0) 0)
1 1 0 1 1 Set (Q = 1) Set (Q =
1 1 1 0 1
1)
Characteristics
Eliminates invalid condition of SR latch
Stores the value of D when Enable = 1