2.1 What is a fault?

Any undesired / unwanted condition is known as a fault.

2.1.1 Reasons for fault occurrence?

• Lightning strokes / thunderstorms / switching surges
• Tree falling
• Kites
• Birds can cause faults
• Aircraft / vehicle
• Earthquake
• Wind / ice / rain
• Deterioration of insulation / ageing
• Monkey / reptiles / snakes

.IN
Sr. No. Causes % of Total
1 Lightning 12
2 Wind / mechanical consideration
C 20
3 Appliance failure 20
N
4 Switching to a fault 20
5 Misc. (Trees, birds, etc.) 28
SY

Sr. No. Equipment % of Total

1 O.H. lines 50
U

2 Wind / mechanical consideration 20

3 Appliance failure 20
VT

4 Switching to a fault 20
5 Misc. (Trees, birds, etc.) 28

2.1.2 Type of faults

Symmetrical Faults Unsymmetrical Faults
• LLL • LG
• LLLG • LL
• LLG
• LL and 3rd Ground

Sr. No. Faults % of Total

1 LG 70
2 LL 15
3 LLG 10
4 LL or LG 2-3
5 LLLG 2-3
6 LLL 2-3

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2.2 Introduction
• Symmetrical faults are caused in power system accidentally through insulation failure of
equipment or flashover of lines initiated by lighting stroke or through accidental faulty
operation.
• Disconnecting the faulty part of the system by means of circuit breakers operated by
protective relaying is necessary to protect against flow of heavy short circuit current. For
proper choice of circuit breakers, we should study this chapter.
• Most of the system faults are not three phase faults but faults involving one line to ground
or occasionally two lines to ground. Though the symmetrical faults are rare, the fault
leads to most severe fault current.
• The synchronous generator during short circuit has a characteristic time-varying
behavior. In the event of a short circuit, the flux per pole undergoes dynamic change with
associated transients in damper and field windings.

.IN
2.3 Transients on a transmission line
• Certain simplifying assumptions are made
1. The line fed from a constant voltage source.
C
2. Short circuit takes place when the line unloaded.
N
3. Line capacitance is negligible and the line can be represented by a lumped RL series
circuit
SY

• As shown in fig. 2.1 short circuit is assumed to take place at t = 0. The parameter 
controls the instant on the voltage wave when short circuit occurs. It is known form
circuit theory that current after short circuit is composed of two parts i.e.
U

R L
i
VT

V = 2V sin(t +  )

Figure 2.1 Short Circuit Model of Line

i = is + it
is = steady state current
2V
= sin(t +  − )
Z
 L 
Z=  =tan−1
R2 + 2L2  R 
 
it = transient current

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 (it is such that i (0) = i s (0) + it (0) = 0 being an inductive circuit; it decays corresponding

to the time constant L )

R
• A plot of i , i , and i = i + i is shown in fig. 2.2.
s t s t

 V
is


2V
Z
sin( −  )

.IN
C
N
it
SY

t
U
VT

Figure 2.2 Waveform of Short Circuit Current on a Transmission Line

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 it = −i s(0)e
( )
− RL t

=−
2V
sin( − )e
( )
− RL t

=
2V
sin( −  )e
( L)t
− R

Thus, short circuit current is given by

i=
2V
sin(t +  − ) +
2V
sin( −  )e
( )
− RL t

Z Z
= symmetrical SC current + DC-offset current

• In power system terminology, the sinusoidal steady state current is called the

.IN
symmetrical short circuit current and the unidirectional transient component is called
the DC-offset current, which causes the total short circuit to be unsymmetrical till the
transient decays
•
C
The maximum momentary current, immcorresponds to first peak. If the decay of
transient in short time is neglected,
N
2V 2V
imm = sin( −  ) +
SY

Z Z
• Since transmission line resistance is small   90

2V 2V
U

imm = cos +
Z Z
VT

• This has the maximum possible value for  = 0 , short circuit occurring when the voltage
wave is going through zero.
2 2V
imm (max possible) =
Z
= twice the maximum of symmetrical SC current (doubling effect)
• For the selection of circuit breakers, momentary short circuit current is taken
corresponding to its maximum possible value (a safe choice)
• It means that when the current is interrupted, the DC offset i t has not yet died out and so
the computing the value of DC offset at the time of interruption (this would be highly
complex in a small network), the symmetrical short circuit current alone is calculated.
This figure is then increased by multiplying factor to take in account of the DC offset.

2.4 Short circuit of a synchronous machine (On NO Load)

• Under steady state short circuit condition, the armature reaction of a synchronous
generator produces a demagnetizing flux.
• In terms of a circuit, this effect is modelled as a reactance Xa in series with the induced
emf.

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 • This reactance when combined with the leakage reactance X of the machine is called
l

synchronous reactance Xd (direct axis synchronous reactance in case of salient pole

machines) as shown in fig. 2.3.

Xl Xa

Xd
+
Eg Synchronous
Reactance

.IN
Figure 2.3 Steady State Short Circuit Model of a Synchronous Machine

• Consider now the sudden short circuit ( 3 ) of a synchronous machine initially operating
under open circuit conditions. C
• The circuit breaker must, of course interrupt the current much before steady conditions
are reached.
N
• Immediately upon short circuit, the DC offset currents appear in all the three phases,
each with different magnitude since the point on the voltage wave at which short circuit
SY

occurs is different for each phase.

Xf

Xl
U

Xa
VT

+
Eg X'
Direct axis transient
reactance

(a) Xdw

Xl Xf

Xa

+
X ''
Eg
Direct axis
subtransient reactance

(b)

Figure 2.4 Approximate Circuit Model During (a) Subtransient Period of Short Circuit (b) Transient Period of Short Circuit

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 • Immediately in the event of a short circuit, the symmetrical short circuit current is
limited only by leakage reactance of machine.
• Since the air gap flux cannot change instantaneously, to counter the demagnetization of
the armature circuit current, current appears in field winding as well as in the damper
winding in a direction to help the main flux.
• The current decays in accordance with the winding time constants. The time constant of
damper winding which has low leakage inductance is much less than that of field
winding with high leakage inductance.
• The machine reactance, thus changes from parallel combination of X , X and X
a f dw

during the initial period (fig. 2.4 (b)) of short circuit to Xa and X f in parallel in the
middle period (fig. 2.4 (a)) of the short circuit and finally to Xa in steady state.

X '' = X + 1
1

.IN
+ 1
d l
1 +
Xa X f Xdw
1
X' = X + C
d l
1 1
+
Xa X f
N
Xd'' < X d' < X d
SY

Eg
I '' =
X d''
Eg
I' =
U

X d'
Eg
I=
VT

Xd

2.5 Short circuit of a loaded synchronous machine

• Fig. 2.5 shows the circuit model of a synchronous generator operating under steady
conditions supplying a load current I0 to the bus at a terminal voltage of V 0 . E is the
g

induced emf under loaded condition and Xd is the direct axis synchronous reactance of
the machine.
X
I0

+
Eg
V0

Figure 2.5 Circuit Model of a Loaded Synchronous Machine

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 • When short circuit occurs at the terminals of this machine, the circuit model to be used
for computing short circuit current is shown in the fig. 2.6 for subtransient current and
transient current.
X '' X'
I0 I0

+ +
E ''
E
V0 V0

(a) (b)

.IN
Figure 2.6 Circuit Model for Computing (a) Subtransient Current (b) Transient Current

I0 = IL = Load current of the bus before fault

V 0 = Teminal voltage
C
E g = Induced emf under loaded conditon
N
E''g = Voltage behind subtransient reactance
E 'g = Voltage behind transient reactance
SY

Eg'' = V 0 + jXd''I0
E' = V 0 + jX ' I0
U

g d

• Synchronous motors have internal emfs and reactances similar to that of a generator
VT

except that the current direction is reversed. During short circuit conditions, these can be
replaced by similar circuit models except that the voltage behind subtransient/transient
reactance is given by
E'' = V 0 − jX ''I0
m d
E' = V 0 − jX ' I0
m d

• In case of short circuit of an interconnected system, the synchronous machines

(generators and motors) are replaced by their corresponding circuit models having
voltage behind subtransient (transient) reactance in series with subtransient (transient)
reactance. The rest of the network being passive remains unchanged.

2.6 Short circuit current by Thevenin Theorem

• An alternate method of computing short circuit current is through the application of
thevenin theorem.
• Consider a synchronous generator feeding a synchronous motor over a line. Fig. 2.7 (a)
shows the circuit model of the system under conditions of steady load. Fault
computations are to be made for a fault at F, at the motor terminals.

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• As a result the circuit model is replaced by the one shown in fig. 2.7 (b), wherein the
synchronous machines are represented by their subtransient reactances (or transient
reactances if transient currents are of interest) in series with voltages behind
subtransient reactances. This change does not disturb the prefault current I0 and prefault
voltage V 0 (at F).
X X
I0 F I0 F

Xdg Xdm X "dg X "dm

V0 V0
+ + + +
Eg Em E "g E "m

.IN
(a) G (b) G

Figure 2.7 Circuit Model under (a) Steady State (b) Subtransient State
C
• As seen from FG the thevenin equivalent circuit of fig. is drawn.
If
N
+
V0
SY

V0
X X
F I F I m

Zf
U

"
X dg X" "
X dg X"
VT

V0

(a) G (b) G

Figure 2.8 (a) Computation of SC by Thevenin Equivalent Circuit (b) Thevenin Equivalent System Feeding Fault Impedance

• Consider now a fault a F through an impedance Z f . Fig. 2.8 (b) shows the thevenin
equivalent of the system feeding the fault impedance.
''
X TH = X dg(+X ) ''
X dm
1
XTH =
1 + 1
( X''
dg
+ X ''
X dm)
Xdm'' '' + X
X dg ( )
XTH =
X '' + X + X
''
dg dm
0
V
If =
jX TH + Z f

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 • Current caused by fault current in generator circuit
''
I g = X dm If
X '' + X + X ''
dg dm

• Current caused by fault current in generator circuit

Im =
''
X dg +X f
X + X + X '' I
''
dg dm

• Postfault currents and voltages are obtained as follows by superposition:

I''g = I0 + I g
I'' = −I0 + I (in the direction of I )
m m m

• Postfault voltage
(
V f = V 0 + − jX TH I f )

.IN
= V 0 + V
• So, the prefault current flowing out of the fault point F is always zero, the postfault current
out of F is independent of load for a given prefault voltage at F.
•
C
Steps for solving short circuit current by thevenin theorem approach
1. Obtain the steady state solution using load flow. Formulate the circuit model.
N
2. Replace reactance of synchronous machine by their transient or subtransient values.
3. SC all emf sources and find the value of ZTH or XTH .
SY

4. Compute the required currents using thevenin’s and superposition theorem.

• Assumptions
1. All prefault voltage equal to 1pu.
U

2. Load current neglected as it is very less as compared to SC current.

2.7 Selection of circuit breakers

VT

• Two of the circuit breaker ratings which require the computation of SC current are: rated
momentary current and rated symmetrical interrupting current.
• Symmetrical SC current is obtained by using subtransient reactances for synchronous
machines. Momentary current (rms) is then calculated by multiplying the symmetrical
current by a factor of 1.6 to account the presence of DC-offset current.
• The DC-offset value to be added to obtain the current to be interrupted is accounted for
by multiplying the symmetrical SC current by a factor as tabulated below:
Table 2.1 Circuit Breaker Multiplying Factor

Sr. No. Circuit breaker speed Multiplying factor

1. 8 cycles or slower 1.0
2. 5 cycles 1.1
3. 3 cycles 1.2
4. 2 cycles 1.4
• The current that a circuit breaker can interrupt is inversely proportional to the operating
voltage over a certain range, i.e.

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 rated voltage
Amperes at operating voltage = amperes at rated voltage x
operating voltage
• Of course, operating voltage cannot exceed the maximum design value. Also, no matter
how low the voltage is, the rated interrupting current cannot exceed the rated maximum
interrupting current.
• It is therefore logical as well as convenient to express the circuit breaker rating in terms
of SC MVA that can be interrupted, defined as
Rated interrupting MVA (three phase) capacity = 3x Vline x Iline rated interrupting current

Where Vline is in kV and Iline is in kA

• Thus, instead of computing the SC current to be interrupted, we compute three-phase SC

MVA to be interrupted, where

.IN
SC MVA (three phase) = 3 x prefault line voltage in kV x SC current in kA
SC MVA (three phase) = V x I x (MVA ) (if in P.U.)
prefault SC Base

• Obviously, the rated MVA interrupting capacity of a circuit breaker is to be more that (or
C
equal to) the SC MVA required to be interrupted.
•
N
For the selection of a circuit breaker for a particular location, we must find the maximum
possible SC MVA to be interrupted with respect to type and location of fault and
SY

generating capacity (also synchronous motor load) connected to the system. A three
phase fault though rare is generally the one which gives the highest SC MVA and a circuit
breaker must be capable of interrupting it.
• In a large system various possible location must be tried out to obtain the highest SC MVA,
U

requires repeated SC computations.

VT

2.8 Algorithm for SC studies

• Consider an n bus system shown schematically in fig. 2.9 operating at steady load.
Consider r as faulted bus.

1 n

System

2 r

G1 G2 Gr Gn

Figure 2.9 n-bus System under Steady Load

• The first step towards short circuit computation is to obtain the prefault voltages at all
buses and currents in all lines through load flow studies.

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• Step-1 To find out prefault voltages at all buses.
V 0 
 10 
0 V 
VBUS = 2 
 
Vn0
• Step-2 Bus no. r is to be faulted through fault impedance Z f
V f = V 0 + V (change)
BUS BUS

• Step-3 Form Thevenin’s equivalent circuit. Short circuit all emf sources and replace all
reactances by their respective reactances transient / sub-transient as shown in fig. 2.10

1 n

.IN
System
If
2 r _

V0
C +
X' X d' 2 X' '
X dn
N
Z f
SY

Figure 2.10 Network of System for Computing Post Fault Voltages

U

• Step-4 Compute the value of V

V = Z BUS J f
VT

Where,
Z11 Z1n 
 
ZBUS =
Z  = bus impedance matrix of the passive Thevenin network
Z
 n1 nn 

0 
 
0 
Jf = −I f  = bus current injection vector
 
 
0 
 
• Step-5 Find the post fault voltage for the rth bus
V = −Z I f
r rr
V f = V 0 + V
r r r
V f =V 0 − Z I f
r r rr

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 Vr0 = Z f I f + Zrr I f
If = Vr0
(Z f + Z ) rr

• Step-6 Find the post fault voltage for any ith bus
V = −Z I f
i ir
V f = V 0 + V
i i i
V f =V 0 − Z I f
i i ir

 f Vr0 
V =V − Z
0 0
Vr0 I =
f i ir
(Z f
+ Zrr ) 
 (
Z f + Z rr ) 
• Step-7 Find the post fault current in lines

( )

.IN
Iijf = Yij Vi f −V j f

2.9 ZBUS formation by step by step method C

Notation: i, j – old buses; r – reference bus; k – new bus.

i) Type-1 Modification: - Branch Zb is added between new bus and reference bus
N
ii) Type-2 Modification: - Branch Zb is added between new bus and old bus
SY

iii) Type-3 Modification: - Branch Zb is added between old bus to reference bus
iv) Type-4 Modification: - Branch Zb is added between two old buses
• Type-1 Modification: - Adding a branch Z bbetween new bus k and reference bus r as
U

shown in fig 2.11.

1
VT

n Passive
i Linear
j n-bus
k Ik
network
Vk Zb
r

Figure 2.11 Type-1 Modification

V =Z I
k b k

Zik = Zki = 0; i = 1,2,...,n

Z kk = Z b
 0
Z (old) 
 BUS 
ZBUS (new)=  
 
 
 0 
0 Zb 


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• Type-2 Modification: - Adding a branch Z bbetween old bus j and new bus k as shown in
fig. 2.12.
1
n Passive
i I I +I Linear
j n-bus
I Zb
k k network
V
r k

Figure 2.12 Type-2 Modification

V = Z I +V
k b k j

= ZbIk + Z j1I1 + Z j2I2 + ... + Z jj (I j + Ik ) + ... + Z jnIn

.IN
Rearranging,

Vk = Z j1I1 + Z j2I2 + ... + Z jj I j + ... + Z jnIn + (Z jj + Zb )Ik

C
 Z1 j 
 
Z
 BUS (old) Z 
N
2j
 
ZBUS (new)=  
SY

 Z nj 
 
 Z j1 Z j2 Z jn Z jj + Zb 

• Type-3 Modification: - Adding a branch Z b between old bus j and reference bus r as shown
U

in fig. 2.13. This case follows by connecting bus k to the reference bus r, i.e., by setting
Vk = 0 .
VT

1
n Passive
i Linear
j n-bus
Zb network
r

Figure 2.13 Type-3 Modification

 Z1 j  I 
V1 
V    1
Z (old) Z  I2 
 2   BUS 2j

 =   
    
V
 n Znj  In 
0  
   Z j1 Z j2 Z jn Z jj + Z b  I k 

Eliminate Ik in the set of equations contained in the matrix,

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 0 = Z j1I1 + Z j2I2 + ... + Z jnIn + ( Z jj + Zb )Ik
1
I =−
k
( Z I + Z j2 I2 + ... + Z jnI n )
Z jj + Z b j1 1
Now,
V = Z I + Z I + ... + Z I + Z I
i i1 1 i2 2 in n ij k

Vi = Zi1 − 1 (Zij Z j1 ) I1 + Zi2 − 1 (Zij Z jn ) In

   1 (Z Z ) I + ... + Z −
ij j2 2 in
 Z jj + Z b   Z jj + Z b   Z jj + Z b 
In matrix form,

Z1 j 
 
Z (new)=Z (old) − 1 Z2 j  Z Z
Z + Z    j1 Z jn 

.IN
BUS BUS j2
jj b
 
Znj 

• Type-4 Modification: - Adding a branch Z b between old bus i and old bus j in fig. 2.14.
C
1
n
N
I +I Passive
i Linear
I −I
j
SY

n-bus
Ik Zb
network
r
U

Figure 2.14 Type-4 Modification

Vi = Zi1I1 + Zi2I2 + ... + Zii (Ii + Ik ) + Zij (I j − Ik ) + ... + ZinIn

VT

Similar equations follow for other buses. The voltages of the buses i and j are, however,
constrained by the equation
V = Z I +V
j b k i

Z j1I1 + Z j2I2 + ... + Z ji (Ii + Ik ) + Z jj (I j − Ik ) + ... + Z jnIn =

ZbIk + Zi1I1 + Zi2I2 + ... + Zii (Ii + Ik ) + Zij (I j − Ik ) + ... + ZinIn
Rearranging,
0 = (Zi1 − Z j1 )I1 + ... + (Zii − Z ji )Ii + (Zij − Z jj )I j + ... + (Zin − Z jn )In + (Zb + Zii + Z jj − Zij − Z ji )Ik

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In matrix form,

 
V1    I 1 
V   Z (old)  I 
 2   BUS  2
  =  
    
Vn   (Zni − Znj )  In 
0   I 
   Z i1 − Z j1

Z i2 − Z j2 (Z in
− Z jn ) Zb + Zii + Z jj − 2Zij   j 


Eliminate Ik on lines similar to what was done in type-2 modification, it follows that

Z1i − Z1 j 
1 Z − Z 
Z (new)=Z (old) −
 2i 2j 
 Z −Z( ) (Z −Z ) (Z −Z )

.IN
BUS BUS Z + Z + Z − 2Z    i1 j1 i2 j2 in jn 
ij 
 Z − Z 
ii jj b

 ni C nj 
N
SY
U
VT

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