# What is pipelining? 5. a) Explain different types of instruc ons with 8.

a) Explain the architecture of 8051 microcontroller

Answer: Pipelining is a technique used in advanced example. with a diagram. [6 Marks]
microprocessors where the fetching of the next Answer: Answer: The 8051 architecture includes:
instruc on and the execu on of the current Data Transfer Instruc ons: Move data between CPU: 8-bit central processing unit.
instruc on overlap. In the 8086, the Bus Interface Unit registers and memory. Memory: 4KB internal ROM (code) and 128 bytes
(BIU) fetches instruc ons and stores them in a queue
Example: MOV AX, BX (Copies content of BX to AX). internal RAM (data).
while the Execu on Unit (EU) executes the current
Arithme c Instruc ons: Perform math opera ons like I/O Ports: Four 8-bit ports (P0, P1, P2, P3).
instruc on. This parallel opera on significantly
add, subtract, mul ply. Timers: Two 16-bit mers/counters (T0, T1).
increases the processing speed.
a) What is pipelining? Example: ADD AL, 05H (Adds 5 to AL). Serial Port: One full-duplex UART.
Answer: Pipelining is a technique used in advanced Logical Instruc ons: Perform bitwise logic opera ons. Interrupts: Circuitry to handle 5 interrupt sources.
microprocessors where the fetching of the next Example: AND AX, CX (Logical AND of AX and CX).
instruc on and the execu on of the current String Instruc ons: Manipulate blocks of data (strings).
instruc on overlap. In the 8086, the Bus Interface Unit Example: MOVSB (Move string byte).
(BIU) fetches instruc ons and stores them in a queue Program Execu on Transfer Instruc ons: Change the
while the Execu on Unit (EU) executes the current sequence of execu on.
instruc on. This parallel opera on significantly Example: JMP 2000H (Uncondi onal jump).
increases the processing speed. Processor Control Instruc ons: Control CPU flags and
3. a) Explain the various addressing modes of 8086 opera on.
microprocessor with examples. Example: CLC (Clear Carry Flag).
Answer: a) Explain the opera ng modes of 8255. [3 Marks]
Immediate Addressing: Data is part of the instruc on. Answer: The 8255 Programmable Peripheral Interface
b) Compare MOVC and MOVX instruc ons.
(e.g., MOV AX, 0005H) (PPI) has three modes:
MOVC (Move Code): Used to read data from the
Register Addressing: Operand is stored in a register. # Mode 0 (Basic I/O): Simple input/output without Program Memory (ROM). It is o en used for lookup
(e.g., MOV AX, BX) handshaking. Any port (A, B, C) can be input or output. tables.
Direct Addressing: The memory address of the # Mode 1 (Strobed I/O): Input/output with MOVX (Move External): Used to read/write data
operand is specified directly. (e.g., MOV AX, [5000H]) handshaking signals. Ports A and B are used for data, to/from External Data Memory (External RAM).
Register Indirect Addressing: The address of the and Port C provides the control/handshake signals. 9. a) Describe the format of PSW and TMOD register.
operand is held in a register (BX, BP, SI, DI). (e.g., MOV # Mode 2 (Bidirec onal Bus): Used for bidirec onal PSW (Program Status Word): An 8-bit register
data transfer with handshaking. Only Port A works in containing status flags.
AX, [BX])
this mode, using 5 bits of Port C for control. Bits: CY (Carry), AC (Auxiliary Carry), F0 (User Flag),
Based Addressing: Effec ve Address (EA) is the sum of
6. b) Sketch and explain the interface of PPI 8255 to RS1, RS0 (Register Bank Select), OV (Overflow), P
a base register (BX or BP) and a displacement. (e.g., (Parity).
MOV AX, [BX+04H]) the 8086 microprocessor in minimum mode. [5 Marks]
Answer: To interface an 8255 with an 8086: TMOD (Timer Mode Register): An 8-bit register to
Indexed Addressing: EA is the sum of an index register configure Timers 0 and 1.
(SI or DI) and a displacement. (e.g., MOV AX, [SI+04H]) Data Bus: Connect 8086 data lines (e.g., D0-D7) to
Structure: The upper 4 bits control Timer 1, lower 4
Based Indexed Addressing: EA is the sum of a base 8255 D0-D7.
bits control Timer 0.
register, an index register, and a displacement. (e.g., Address Lines: Connect A1 and A2 of 8086 to A0 and Bits per mer: GATE (external control), C/T (Counter or
MOV AX, [BX+SI+04H]) A1 of 8255 to select internal ports. Timer select), M1, M0 (Mode select: Mode 0-3).
3. b) How to calculate physical address in 8086 Control Signals: Connect RD and WR of 8086 to RD and 9. b) Explain the internal memory organiza on in
microprocessor? WR of 8255. 8051. [3 Marks]
Answer: The 8086 has a 20-bit physical address. It is CS (Chip Select): Use a decoder connected to higher Answer: The 128-byte internal RAM is organized as:
calculated by combining a 16-bit Segment Address and address lines to drive the CS pin of the 8255, mapping Register Banks (00H-1FH): 32 bytes divided into 4
it to a specific I/O address. banks (Bank 0-3), each containing registers R0-R7.
a 16-bit Offset.
7. a) Explain different addressing modes of 8051 with Bit-Addressable RAM (20H-2FH): 16 bytes where each
Formula: Physical Address = (Segment Register × 10H)
examples. [5 Marks] individual bit can be accessed.
+ Offset General Purpose RAM (30H-7FH): 80 bytes for user
Example: If CS = 2000H and IP = 1000H, the Physical Answer:
data storage.
Address = 20000H + 1000H = 21000H. Immediate Addressing: The operand is a constant.
Note: SFRs (Special Func on Registers) reside in
4. a) Explain the Minimum Mode configura on of 8086 Example: MOV A, #30H (Load 30H into Accumulator).
addresses 80H-FFH.
with a suitable diagram. [6 Marks] Register Addressing: Use of registers (R0-R7) to hold
10. a) Write a program to add five 8-bit numbers in the
Answer: Minimum Mode is selected by applying Logic data. internal RAM and store the results. [6 Marks]
1 (Vcc) to the MN/MX pin. In this mode, the 8086 Example: MOV A, R1 (Copy R1 to A). Answer: (Assuming numbers are stored star ng at 30H
generates all necessary control signals itself. Direct Addressing: Accessing memory by direct and result stored at 40H)
Latches (8282): Used to demul plex the address/data address number. MOV R0, #30H ; Load pointer to the first number
bus (AD0-AD15) using the ALE signal. Example: MOV A, 40H (Copy data from RAM address MOV R2, #05H ; Load counter with 5
40H to A). CLR A ; Clear Accumulator (Sum LSB)
Transceivers (8286): Used to buffer data and control
Register Indirect Addressing: Using R0 or R1 as a MOV B, #00H ; Clear B register (Sum MSB/Carry)
direc on using DT/R and DEN signals.
pointer. LOOP: ADD A, @R0 ; Add value pointed by R0 to A
Clock Generator (8284): Provides the clock signal and
Example: MOV A, @R0 (Copy data from address JNC NEXT ; If No Carry, jump to NEXT
synchroniza on for READY and RESET. INC B ; If Carry, increment MSB in B
4. b) Write the func on of Bus High Enable pin. pointed to by R0).
NEXT: INC R0 ; Point to next number
Answer: The BHE (Bus High Enable) pin is used to Indexed Addressing: Used for accessing lookup tables
DJNZ R2, LOOP ; Decrement counter, repeat if not
enable the upper half of the data bus (D8-D15). in ROM.
zero
BHE = 0: Enables the upper byte transfer. Example: MOVC A, @A+DPTR. MOV 40H, A ; Store LSB of sum at 40H
It is used with the A0 address bit to differen ate 7. b) Write differences between Microcontroller and MOV 41H, B ; Store MSB of sum at 41H
between accessing the high byte, low byte, or both Microprocessor. END
bytes (word) simultaneously. Answer: 10. b) Write the instruc ons to RUN a Timer and to
b) What is the difference between MUL and IMUL # Microprocessor: Contains only the CPU. Memory, I/O STOP a Timer opera on. [2 Marks]
instruc ons ports, and mers must be connected externally. It is Answer:
generally expensive and used for general-purpose Run (Start) Timer: Set the Timer Run bit in the TCON
MUL (Mul ply): Used for Unsigned mul plica on. It compu ng (e.g., Laptops). register.
treats operands as posi ve numbers. # Microcontroller: Contains CPU, RAM, ROM, I/O SETB TR0 (Start Timer 0)
ports, and mers all on a single chip. It is cheaper, SETB TR1 (Start Timer 1)
IMUL (Integer Mul ply): Used for Signed Stop Timer: Clear the Timer Run bit in the TCON
compact, and used for specific dedicated tasks (e.g.,
mul plica on. It preserves the sign of the number register.
Washing machines).
(handling nega ve numbers in 2's complement form). CLR TR0 (Stop Timer 0)
CLR TR1 (Stop Timer 1)