SMJP 2143
ELECTRONICS ASSIGNMENT 2
Section 2
GROUP 1
Name Circuit In Figure
Ho Jia Hui 3, 4
Loh Zhi Xin
Siti Zainab
Yaw Yi Ting
Lecturer: DR. MUHAMMAD HISYAM BIN ROSLE
CONTENTS
1.0 INTRODUCTION (ZHI XIN) ............................................................................................ 3
1.2 TABLE OF SUMMARY OF JFET DC (ZAINAB).............................................................. 4
1.3 TABLE OF SUMMARY OF JFET AC................................................................................. 5
2.0 QUESTION 1 (FIGURE 3) ................................................................................................ 7
2.1 JFET DC ANALYSIS ........................................................................................................... 7
2.1.1 MATHEMATICAL EQUATIONS (ZHI XIN) .............................................................. 8
2.1.2 GRAPHICAL METHOD (JIA HUI) ........................................................................... 10
2.2 CALCULATE THE 𝑽𝑫𝑺, 𝑽𝑫, 𝑽𝑺 .......................................................................................11
2.2.1 MATHEMATICAL EQUATIONS (ZHI XIN) .............................................................11
2.2.2 GRAPHICAL METHOD (JIA HUI) ........................................................................... 12
3.0 QUESTION 2 (FIGURE 4) (YI TING) .................................................................................. 13
4.0 APPLICATION OF JFET (ZAINAB) .................................................................................... 17
5.0 CONCLUSION (JIA HUI) ..................................................................................................... 19
1.0 INTRODUCTION (ZHI XIN)
The Junction Field Effect Transistor (JFET) is a type of semiconductor device that operates
by controlling the flow of current using an electric field. It is classified as a voltage-controlled
and unipolar device. This means it relies on either electrons (in n-channel JFETs) or holes (in p-
channel JFETs) as the primary charge carriers, unlike bipolar junction transistors (BJTs) which
use both. A JFET typically consists of three terminals: the gate (G), drain (D), and source (S).
The device includes a conducting channel either n-type or p-type material, with gate terminals
diffused into the sides of the channel, forming a p-n junction.
The working principle of a JFET is based on controlling the width of the channel through
which current flows from the source to the drain. When a reverse-bias voltage is applied to the
gate, it causes a depletion region to expand within the channel, effectively narrowing the
pathway for current. As the gate voltage becomes more negative (in n-channel JFETs), the
channel continues to shrink until it reaches a point known as pinch-off, beyond which the drain
current becomes relatively constant and independent of further increases in drain-source voltage.
This behavior allows the JFET to act as a constant current source in many analog applications.
One of the most notable features of JFETs is their very high input impedance, which results
in minimal loading of the previous circuit stage. They also offer low power consumption and low
noise, making them suitable for use in amplifiers, oscillators, analog switches and buffer stages.
Due to their simple construction and reliable performance, JFETs are widely used in low-noise
and high-impedance analog circuits.
1.2 TABLE OF SUMMARY OF JFET DC (ZAINAB)
Type Configuration Equations Graphical solution
Fixed bias 𝑉𝐺𝑆 = − 𝑉𝐺𝐺
𝑉𝐷𝑆 = 𝑉𝐷𝐷 − 𝐼𝐷 𝑅𝑆
Self-bias 𝑉𝐺𝑆 = − 𝐼𝐷 𝑅𝑆
𝑉𝐷𝑆 = 𝑉𝐷𝐷 − 𝐼𝐷 (𝑅𝐷 + 𝑅𝑆 )
Voltage- 𝑅2 𝑉𝐷𝐷
𝑉𝐺 =
divider 𝑅1 + 𝑅2
𝑉𝐺𝑆 = 𝑉𝐺 − 𝐼𝐷 𝑅𝑆
𝑉𝐷𝑆 = 𝑉𝐷𝐷 − 𝐼𝐷 (𝑅𝐷 + 𝑅𝑆 )
1.3 TABLE OF SUMMARY OF JFET AC
Type Configuration 𝑧𝑖 𝑧𝑜 𝑉𝑜
𝐴𝑣 =
𝑉𝑖
Fixed-biased = 𝑅𝐺 = 𝑅𝐺 ∥ 𝑟𝑑 = −𝑔𝑚 (𝑅𝐺 | |𝑟𝑑 )
Self-Bias = 𝑅𝐺 = 𝑅𝐺 ∥ 𝑟𝑑 = −𝑔𝑚 (𝑅𝐺
∥ 𝑟𝑑 )
Voltage-Divider = 𝑅1 = 𝑅𝐺 ∥ 𝑟𝑑 = −𝑔𝑚 (𝑅𝐺
Bias ∥ 𝑅2 ∥ 𝑟𝑑 )
Common drain = 𝑅𝐺 1 𝑔𝑚 (𝑅𝐺 ∥ 𝑟𝑑 )
𝑅𝐺 ∥ 𝑟𝑑 ∥
𝑔𝑚 1 + 𝑔𝑚 (𝑅𝐺 ∥ 𝑟𝑑 )
2.0 QUESTION 1 (FIGURE 3)
2.1 JFET DC ANALYSIS
i. Find the operating point of the JFET by using:
a. Mathematical equations
b. Graphical equations
ii. Calculate the 𝑉𝐷𝑆 , 𝑉𝐷 , 𝑉𝑆 .
2.1.1 MATHEMATICAL EQUATIONS (ZHI XIN)
Given that:
Ensure 𝑉𝐷𝑆 > (𝑉𝐺𝑆 − 𝑉𝑃 ): 13.04V > [−3.48 − (−6)] = 2.52V (valid, JFET in saturation). Therefore,
the operating point is (-3.48, 1.056).
2.1.2 GRAPHICAL METHOD (JIA HUI)
plot in graph straight line (-19.8, 6), (-9.9, 3), plot in graph curvy line (0, 6), (-1, 4.17),
(0,0) (-2, 2.67), (-3, 1.5), (-4, 0.67), (-5, 0.17),
(-6, 0)
The interception point is the final answer. Therefore 𝐼𝐷 = 1.061𝑚𝐴 and 𝑉𝐺𝑆 = −3.5𝑉.
Mathematical and graphical methods cross-verify results.
2.2 CALCULATE THE 𝑽𝑫𝑺 , 𝑽𝑫 , 𝑽𝑺
2.2.1 MATHEMATICAL EQUATIONS (ZHI XIN)
2.2.2 GRAPHICAL METHOD (JIA HUI)
Graphical method values are rounded for plot readability but match mathematical results within
acceptable error (±0.5%).
3.0 QUESTION 2 (FIGURE 4) (YI TING)
Given: RD=2kΩ, RG=1MΩ , VD=20 V
IDSS = 6 mA, Vp = -6 V, Gos = 40 µS
i. Assumes Vi = 10mV, calculate the gm, rd, and Zi
Step 1 : Determine Quiescent Point (DC Analysis)
Gate voltage, VG=0 V (due to grounded gate through resistor)
Source voltage = 0 V (no resistor, grounded)
Gate-source voltage, VGS=0
Drain current using Shockley Equation:
Drain voltage:
Step 2: Calculate Small-Signal Parameters
Transconductance:
Drain Resistance:
Input Impedance:
ii. Detemine Zo and AV with and without the effect of rd
4.0 APPLICATION OF JFET (ZAINAB)
The Junction Field-Effect Transistor (JFET) is a voltage-controlled semiconductor device
used in various electronic applications due to its high input impedance yet simple structure.
(1) Buffer Amplifiers
A buffer amplifier is a circuit that provides high input impedance and low output impedance to
prevent signal distortion when driving low-impedance loads. JFETs are well-suited for this role
due to their high input impedance and low output impedance in a common-drain (source-
follower) configuration.
A buffer must not load the signal source. If the input impedance is too low, it will result in
distortion of the signal. The gate-source junction is reverse-biased in JFET, meaning almost zero
DC gate current flows. Typically, the input impedance is more than 1M ohm, can reach up to 1G
ohm. Low output impedance is also an advantage for buffer amplifiers because a buffer must
deliver signal efficiently to low-impedance loads.
(2) Sensor
The reverse-biased gate-source junction of a JFET draws almost no current, and the input
impedance is typically above 1M ohm (up 1T ohm for some JFET) given that sensors must
connect to high circuits for the signal to work properly.
JFET source followers just one resistor. No additional biasing networks is needed, making the
biasing circuit simple as complex biasing circuits can cause errors.
(3) Low Noise Amplifier
Noise interferes with the information contained in the signal. For instance, the noise in radio
receivers develops crackling and hissing which sometimes completely masks the voice or music.
Noise is independent of the signal strength because it exists even when the signal is off.
Every electronic device produces a certain amount of noise, but FET is a device which causes
very little noise. This is especially important near the front-end of the receivers and other
electronic equipment because the subsequent stages amplify front-end noise along with the
signal. If FET is used at the front-end, we get less amplified noise (disturbance) at the final
output.
5.0 CONCLUSION (JIA HUI)
This assignment has given us a better understanding of how Junction Field Effect Transistors
(JFETs) work in both DC and small-signal conditions. By analyzing two different circuits, we
were able to calculate important values such as the drain current (𝐼𝐷 ), gate-source voltage (𝑉𝐺𝑆 ),
and drain-source voltage (𝑉𝐷𝑆 ). Using both mathematical and graphical methods helped us
confirm the accuracy of our results and allowed us to clearly identify the JFET's operating point.
In the second part of the assignment, we calculated small-signal parameters like
transconductance (𝑔𝑚 ), drain resistance (𝑅𝑑 ), and input impedance (𝑍𝑖 ). These values are
important when designing amplifiers or other analog circuits. We also looked at how the output
impedance (𝑍𝑜 ) and voltage gain (𝐴𝑉 ) change depending on whether the internal resistance of the
JFET is considered.
Lastly, we explored several real-life applications of JFETs, including their use in buffer
amplifiers, sensors, and low-noise amplifiers. These applications show how JFETs are useful in
electronic systems that require high input impedance, low power consumption, and minimal
noise.
Therefore, this assignment helped us apply theory to practical analysis and improved our
understanding of how JFETs function in different types of circuits.