Unit 3

Memory Interfacing and Programming Peripheral Devices

Memory Interfacing & I/O Interfacing
• Interface is the path for communication between two components.
Interfacing is of two types, memory interfacing and I/O interfacing.
Memory Interfacing When we are executing any instruction,
• we need the microprocessor to access the memory for reading
instruction codes and the data stored in the memory. For this, both the
memory and the microprocessor requires some signals to read from
and write to registers.
• The interfacing process includes some key factors to match with the
memory requirements and microprocessor signals. The interfacing
circuit therefore should be designed in such a way that it matches the
memory signal requirements with the signals of the microprocessor.
• IO Interfacing There are various communication devices like the
keyboard, mouse, printer, etc. So, we need to interface the
keyboard and other devices with the microprocessor by using
latches and buffers. This type of interfacing is known as I/O
interfacing. Block Diagram of Memory and I/O Interfacing
Schematic Diagram to Interface Memory
chips and I/O devices………
8085 Interfacing Pins
• 8085 Interfacing Pins Following is the list of 8085 pins used for
interfacing with other devices −
• A15 - A8 (Higher Address Bus)
• AD7 - AD0(Lower Address/Data Bus)
• ALE
• RD
• WR
• READY
Ways of Communication
• There are two ways of communication in which the microprocessor
can connect with the outside world.
• Serial Communication Interface
• Parallel Communication interface
• Serial Communication Interface − In this type of communication, the
interface gets a single byte of data from the microprocessor and
sends it bit by bit to the other system serially and vice-a-versa.
• Parallel Communication Interface − In this type of communication,
the interface gets a byte of data from the microprocessor and sends
it bit by bit to the other systems in simultaneous (or) parallel fashion
and vice-a-versa.
Memory Interfacing in 8085…….
• Memory is an integral part of a microprocessor system, and in this section,
we will discuss how to interface a memory device with the microprocessor.
• The Memory Interfacing in 8085 is used to access memory quite frequently
to read instruction codes and data stored in memory.
• This read/write operations are monitored by control signals. The
microprocessor activates these signals when it wants to read from and write
into memory.
• In the last section we have already seen the memory read and memory write
machine cycles, and status of the RD, WR and IO/M status signals for read/
write operation. In the following section we will see memory structure and its
requirements, concepts in Memory Interfacing in 8085 and interfacing
examples.
Memory Structure and its Requirements:

• read/write memories consist of an array of registers, in which

each register has unique address. The size of the memory is N x
M as shown in Fig. where N is the number of registers and M is
the word length, in number of bits.
Logic Diagrams………
Basic Concepts in Memory Interfacing:

• For Memory Interfacing in 8085, following important points are to be kept

in mind.
• Microprocessor 8085 can access 64Kbytes memory since address bus is
16-bit. But it is not always necessary to use full 64Kbytes address space.
The total memory size depends upon the application.
• Generally EPROM (or EPROMs) is used as a program memory and RAM (or
RAMs) as a data memory. When both, EPROM and RAM are used, the total
address space 64Kbytes is shared by them.
• The capacity of program memory and data memory depends on the
application.
• It is not always necessary to select 1 EPROM and 1 RAM. We can have
multiple EPROMs and multiple RAMs as per the requirement of application.
Basic Concepts in Memory Interfacing:

• We can place EPROM/RAM anywhere in full 64 Kbytes address

space. But program memory (EPROM) should be located from
address 0000H since reset address of 8085 microprocessor is
0000H.
• It is not always necessary to locate EPROM and RAM in
consecutive memory For example : If the mapping of EPROM is
from 0000H to OFFFH, it is not must to locate RAM from 1000H.
We can locate it anywhere between 1000H and FFFFH. Where to
locate memory component totally depends on the application.
Memory Interfacing…..
• The memory interfacing requires to :
• Select the chip
• Identify the register
• Enable the appropriate buffer.
Memory Interfacing……..
• Microprocessor system includes memory devices and I/O
devices. It is important to note that microprocessor can
communicate (read/write) with only one device at a time, since
the data, address and control buses are common for all the
devices.
• In order to communicate with memory or I/O devices, it is
necessary to decode the address from the microprocessor. Due
to this each device (memory or I/O) can be accessed
independently. The following section describes common
address decoding techniques.
Address Decoding Techniques :

• Absolute decoding/Full Decoding

• Linear decoding/Partial Decoding
• Absolute decoding:
• In absolute decoding technique, all the higher address lines are
decoded to select the memory chip, and the memory chip is
selected only for the specified logic levels on these high-order
address lines; no other logic levels can select the chip.
• Fig. shows the Memory Interfacing in 8085 with absolute
decoding. This addressing technique is normally used in large
memory systems.
Address Decoding Technique……
Linear decoding:

• In small systems, hardware for the decoding logic can be

eliminated by using individual high-order address lines to select
memory chips. This is referred to as linear decoding. Fig. 4.15
shows the addressing of RAM with linear decoding technique.
This technique is also called partial decoding. It reduces the
cost of decoding circuit, but it has a drawback of multiple
addresses (shadow addresses).
•
Address Decoding Technique……
Address Decoding Technique……
• Fig. shows the addressing of RAM with linear decoding technique.
A15 address line, is directly connected to the chip select signal of
EPROM and after inversion it is connected to the chip select
signal of the RAM.
• Therefore, when the status of A15 line is ‘zero’, EPROM gets
selected and when the status of A15 line is ‘one’ RAM gets selected.
• The status of the other address lines is not considered, since
those address lines are not used for generation of chip select
signals.
A typical semiconductor memory IC will have n address pins, m data pins (or output pins).

Having two power supply pins (one for connecting required supply voltage (V and the other for
connecting ground).

The control signals needed for static RAM are chip select (chip enable), read control (output enable)
and write control (write enable).

The control signals needed for read operation in EPROM are chip select (chip enable) and read
control (output enable).
 Example for Memory Interfacing
Consider a system in which the full memory space 64kb is utilized for EPROM
memory. Interface the EPROM with 8085 processor. The memory capacity is 64
Kbytes. i.e 2^n = 64 x 1000 bytes where n = address lines. So, n = 16.
In this system the entire 16 address lines of the processor are connected to
address input pins of memory IC in order to address the internal locations of
memory. The chip select (CS) pin of EPROM is permanently tied to logic low
(i.e., tied to ground).
Since the processor is connected to EPROM, the active low RD pin is
connected to active low output enable pin of EPROM. The range of address
for EPROM is 0000H to FFFFH.