A
PRACTICAL FILE ON
“COMPUTER
COMPUTER ORGANIZATION & ARCHITECTURE”
ARCHITECTURE
Bachelor of Technology 3rd Sem
SUBMITTED TO: SUBMITTED BY:
MR. AJAY KUMAR
DEPARTMENT OF COMPUTER SCIENCE & ENGINEERING
INDRAPRASTHA INSTITUTE OF MANAGEMENT & TECHNOLOGY
SAHARANPUR
Affiliated to Dr. APJ Abdul Kalam Technical University, Lucknow(UP)
INDEX
[Link] Practical Aim Date Sign.
1 AIM: Verification of logic gates.
2 Design and implementation of HALF ADDER
using basic logic gates.
3 Design and implementation of Binary to Gray,
Gray to Binary Code conversions.
4 Design and implementation of 3–8-line DECODER.
5 Design and implementation of 3–8-line DECODER,
4x1 MUX and 8x1 MULTIPLEXERS.
6 Verify the excitation table of various FLIP-FLOPS.
7 Design and implement 8-bit Input/Output System
with four 8-bit internal registers.
8 Design of an 8- bit ARITHMETIC LOGIC UNIT.
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PRACTICAL -1
1.1 AIM: Verification of logic gates
Procedure:
1. Identify the pin no’s of the given IC.
2. From the IC No. Find out the type of gate.
3. Check for the proper working of the gate.
4. Connect the circuit as per circuit diagram.
5. For all combination of input condition. Tabulate the output voltage by connecting
a voltmeter at the output end.
6. Verify it with truth Table.
7. Repeat the above procedure for all gates.
Equipment Required & Component Required:
Theory:
• Details of IC used and pin configurations.
• Working of logic gates.
1. OR GATE: Function of OR gate is to give output true when one of the either inputs
are true .In the remaining case output becomes false. Following table justify the
statement:-
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2. AND GATE: Function of AND gate is to give the output true when both the inputs are
true. In all the other remaining cases output becomes false. Following table justifies the
statement:-
3. NOT GATE: Function of NOR gate is to reverse the nature of the input .It converts true
input to false and vice versa. Following table justifies the statement :-
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Advanced Gates:
1. XOR GATE: - The function of XOR gate is to give output true only when both the inputs
are true. Following table explain this:-
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Result & Conclusion: All basic Logic Gates are verified.
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PRACTICAL - 2
2.1 Aim: Design and implementation of HALF ADDER using basic logicgates.
Equipment & Components Required:
[Link]. Equipments Specification Quantity
1 Digital IC Trainer kit - 1
2 Digital Multimeter 1
[Link]. Components Specification Quantity
7400, 7402,
7404, 1 each
1 Digital ICs 7408, 7432,
7486.
- 6
2 Patch cords
Theory:
To design and implement half adder using logic gates.
Procedure:
Identify the pins.
Connect the circuit as per circuit diagram.
Obtain outputs with various input combinations.
Verify it with the Boolean function using truth table
OUTPUTS
INPUT A INPUT B
S C
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1
CIRCUIT DIAGRAM TRUTH TABLE
Result & Conclusion: All logical circuits have been implemented & verified through truth
table.
2.2 Aim: Design and implementation of FULL ADDER using basic logic gates.
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Equipment & Components Required:
[Link]. Equipments Specification Quantity
1 Digital IC Trainer kit - 1
2 Digital Multimeter 1
[Link]. Components Specification Quantity
7400, 7402,
7404, 1 each
1 Digital ICs 7408, 7432,
7486.
- 6
2 Patch cords
Procedure:
Identify the pins.
Connect the circuit as per circuit diagram.
Obtain outputs with various input combinations.
Verify it with the Boolean function using truth table
Theory:
To design and implement FULL adder using logic gates
FULL ADDER:
CIRCUIT DIAGRAM
TRUTH TABLE
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Result & Conclusion: All logical circuits have been implemented & verified through truth
table.
VIVA QUESTIONS
Q.1 What are the applications of half adder?
Q.2 Explain the advantages of half adder?
Q.3 What are the applications of full adder?
Q.4 Elaborate the advantages of full adder over half
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PRACTICAL -3
Aim: Design and implementation of Binary to Gray, Gray to Binary Code conversions.
Equipment & Components Required:
Procedure:
Collect the components necessary to accomplish this experiment.
Plug the IC chip into the breadboard.
Connect the supply voltage and ground lines to the chips. PIN7 = Ground and PIN14=+5v
Make connections as shown in the respective circuit diagram.
Connect the inputs of the gate to the input switches of the LED.
Connect the output of the gate to the output LEDs.
Once all connections have been done, turn on the power switch of the breadboard
Operate the switches and fill in the truth table (Write "1" if LED is ON and "0" if
L1is OFF Apply the various combination of inputs according to the truth table and
observe the condition of Output LEDs.
Theory:
a) To design and implement Binary to Gray Code conversions
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Pin diagram of Binary to gray code converter using 7486 IC(Ex-Or Gate)
INPUT OUTPUT
A B C D G4 G3 G 2 G1
0 0 0 0 0 0 0 0
0 0 0 1 0 0 0 1
0 0 1 0 0 0 1 1
0 0 1 1 0 0 1 0
0 1 0 0 0 1 1 0
0 1 0 1 0 1 1 1
0 1 1 0 0 1 0 1
0 1 1 1 0 1 0 0
1 0 0 0 1 1 0 0
1 0 0 1 1 1 0 1
1 0 1 0 1 1 1 1
1 0 1 1 1 1 1 0
1 1 0 0 1 0 1 0
1 1 0 1 1 0 1 1
1 1 1 0 1 0 0 1
1 1 1 1 1 0 0 0
Truth Table
b) To design and implement Binary to Gray Code conversions
Pin diagram of Gray to Binary code converter using 7486 IC (Ex-Or Gate)
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INPUTS OUTPUTS
A B C D B3 B2 B1 B0
0 0 0 0 0 0 0 0
0 0 0 1 0 0 0 1
0 0 1 1 0 0 1 0
0 0 1 0 0 0 1 1
0 1 1 0 0 1 0 0
0 1 1 1 0 1 0 1
0 1 0 1 0 1 1 0
0 1 0 0 0 1 1 1
1 1 0 0 1 0 0 0
1 1 0 1 1 0 0 1
Circuit Diagram for Gray to Binary Code 1 1 1 1 1 0 1 0
Converter 1 1 1 0 1 0 1 1
1 0 1 0 1 1 0 0
1 0 1 1 1 1 0 1
1 0 0 1 1 1 1 0
1 0 0 0 1 1 1 1
T
TRUTH TABLE
Result & Conclusion: Binary to gray and gray to binary code converter has been designed
using EXOR gate and its truth table verified.
VIVA QUESTION:
Q.1 What is a code converter?
Q.2 Differentiate between translator and code
converter.
Q.3 Explain the primary usage of grey code.
Q.4 Illustrate the reasons for using grey code.
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PRACTICAL - 4
Aim: Design and implementation of 3–8-line DECODER.
Equipment’s & Components Required:
[Link]. Equipment’s Specification Quantity
1 Digital IC Trainer - 1
kit
2 Digital Multimeter 1
[Link]. Components Specification Quanti
ty
7400, 7402,
7404,
1 Digital ICs 1 each
7408, 7432,
7486.
2 Patch cords - 6
Procedure:
Collect the components necessary to accomplish this experiment.
Plug the IC chip into the breadboard.
Connect the supply voltage and ground lines to the chips. PIN7 = Ground
and PIN14 = +5V.
Make connections as shown in the respective circuit diagram.
Connect the inputs of the gate to the input switches of the LED.
Connect the output of the gate to the output LEDs.
Once all connections have been done, turn on the power switch of the breadboard
Operate the switches and fill in the truth table ( Write "1" if LED is ON and "0" if
L1is OFF Apply the various combination of inputs according to the truth table and
observe the condition of Output LEDs.
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Theory:
3 to 8 decoder using logic gates:
Symbol:
Truth table:
Circuit Diagram of 3:8 Decoder
Viva Questions:
Q1. How to use math module for finding square root of a
number? Q2. What is user defined function?
Q3. What is Lambda Function?
Q4. What are higher order functions?
Q5. List some inbuilt higher order functions.
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PRACTICAL – 5
Aim: Design and implementation of 3–8-line DECODER, 4x1 MUX and 8x1
MULTIPLEXERS
Procedure:
• Collect the components necessary to accomplish this experiment.
• Plug the IC chip into the breadboard.
• Connect the supply voltage and ground lines to the chips. PIN7 = Ground
• and PIN14 = +5V.
• Make connections as shown in the respective circuit diagram.
• Connect the inputs of the gate to the input switches of the LED.
• Connect the output of the gate to the output LEDs.
• Once all connections have been done, turn on the power switch of the breadboard
• Operate the switches and fill in the truth table ( Write "1" if LED is ON and "0" if
L1 is OFF Apply the various combination of inputs according to the truth table and
observe the condition of Output LEDs.
Equipment Required:- Digital trainer kit, AND-7411, OR-7432, NOT-7404 Gate IC,
Connecting wires.
Theory:-
4 to 1 MULTIPLEXER: -A multiplexer (MUX) is a device that accepts data from one of
many input sources for transmission over a common shared line. To achieve this MUX has
several data lines and a single output along with data-select inputs, which permit digital data
on any of the inputs to be switched to the output line. The logic symbol for a 1 to 4 data
selector/multiplexer is shown in Figure
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The selection lines decide the number of inputs lines of particular multiplexer. If the number
of n inputs lines is equal to 2m, then m select lines are required to select one of the n input
line. Note that if a binary zero appears on the data-select lines then data on input line D0 will
appear on the output. Thus, data output Y is equal to D0 if and only if S1=0 and S0=0.
Y=D0.S1’.S0’Similarly, the data output is equal to D1, D2 and D3 for y=C1.S1’.S0’
,Y=C2.S0’. S1 and Y=C3.S0.S1 respectively. Thus the total multiplexer logic expression,
formed from ORing terms.
The implementation of this equation is as shown in figure:
8 to 1 MULTIPLEXER: -A multiplexer (MUX) is a device that accepts data from one of
many input sources for transmission over a common shared line. In 8 x 1 Multiplexer, 8
represents number of inputs and 1 represents output line. So three (3) select lines are required
to select one of the inputs.
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Truth Table of 8:1 MUX
Result & Conclusion: 4x1 and 8x1 Mux have been implemented & verified through
truth table .
Viva Questions:
Q1. Explain the need of multiplexer.
Q2. Which is the major functioning responsibility of the multiplexing combinational
circuit? Q3. How many NOT gates are required for the construction of a 4-to-1 multiplexer
Q4. In 1-to-4 multiplexer, how many select lines are required?
[Link] 1-to-8 multiplexer, how many select lines are required?
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PRACTICAL – 6
Aim:- Verify the excitation table of various FLIP-FLOPS
Procedure:
• Collect the components necessary to accomplish this experiment.
• Plug the IC chip into the breadboard.
• Connect the supply voltage and ground lines to the chips. PIN7 =
Ground and PIN14 = +5V.
• Make connections as shown in the respective circuit diagram.
• Connect the inputs of the gate to the input switches of the LED.
• Connect the output of the gate to the output LEDs.
• Once all connections have been done, turn on the power switch of the breadboard
• Operate the switches and fill in the truth table ( Write "1" if LED is ON and "0" if
L1 is OFF Apply the various combination of inputs according to the truth table and
observe the condition of Output LEDs.
Equipments & Components Required:
Theory:
Flip-flops are synchronous bi-stable devices. The term synchronous means the output
changes state only when the clock input is triggered. That is, changes in the output occur in
synchronization with the clock. A flip-flop circuit has two outputs, one for the normal value
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and one for the complement value of the stored bit. Since memory elements in sequential
circuits are usually flip-flops, it is worth summarizing the behaviour of various flip-flop types
before proceeding further. All flip -flops can be divided into four basic types: SR, JK, D and
T. They differ in the number of inputs and in the response invoked by different value of input
signals. The four types of flip -flops are defined in the Table below.
State Table: -The state table representation of a sequential circuit consists of three sections
labelled present state next state and output. The present state designates the state of flip -flops
before the occurrence of a clock pulse. The next state shows the states of flip-flops after the
clock pulse, and the output section lists the value of the output variables during the present
state.
Flip-Flop:-The basic one bit digital memory circuit is known as [Link] can store either 0
or 1. Flip-flops are classifieds according to the number of inputs.
1. R-S Flip-Flop:- The circuit is similar to SR latch except enable signal is replaced by clock
pulse.
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2. D Flip-Flop:-The modified clocked SR flip-flop is known as [Link] the truth
table of SR flip-flop we see that the output of the SR flip-flop is in unpredictable state when
the inputs are same and high. In many practical applications, these input conditions are not
required. These input conditions can be avoided by making then complement of each other.
3. J-K Flip-Flop:- In a RS flip-flop the input R=S=1 leads to an indeterminate output. The
RS flip-flop circuit may be re-joined if both inputs are 1 than also the outputs are complement
of each other.
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4. T Flip-Flop:-T flip-flop is known as toggle flip-flop. The T flip-flop is
modification of theJ-K flip-flop . Both the J K inputs of the J K flip -flop are held
at logic 1 and the clock signalcontinuous to change.
Result & Conclusion: Verified excitation table of various flip flops.
Viva Questions:
Q1. How is a JK Flip Flop made to toggle?
Q2. How many stable states does a Flip Flop has?
Q3. What is the significance of the J and K terminals on the JK flip-
flop?
Q4. The truth table for an S-R flip-flop has how many VALID
entries? Q5. Difference between Latch and Flip Flop.
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PRACTICAL – 7
Aim: Design and implement 8-bit Input/Output System with four 8-bit internal registers
Procedure:
Connections are given as per circuit diagram.
Logical inputs are given as per circuit diagram.
Observe the output and verify the truth table.
Equipment’s & Components Required:
[Link]. Equipments Specification Quantity
1 Logic Simulator - 1
[Link]. Component Specification Qty.
1. D FLIP FLOP IC 7474 2
2. OR GATE IC 7432 1
3. IC TRAINER KIT - 1
4. PATCH CORDS - 15
Theory:
A register is capable of shifting its binary information in one or both directions is
known as shift register. The logical configuration of shift register consist of a D-Flip
flop cascaded with output of one flip flop connected to input of next flip flop. All
flip flops receive commonclock pulses which causes the shift in the output of the
flip- flop. The simplest possible shift register is one that uses only flip flop. The
output of a given flip flop is connected to the input of next flip flop of the register.
Each clock pulse shifts the content of register one bit position to right.
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8-Bit Input/Output System With Four 8-Bit
Internal Register
Result & Conclusion: Verified 8-bit Input/Output System with four 8-bit
internal registerson simulator.
Viva Questions:
Q.1 What are the advantages of using bus
interface?
Q.2 Define an Internal register?
Q.3 How many types of registers are there?
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PRACTICAL – 8
AIM: - Design of an 8- bit ARITHMETIC LOGIC UNIT.
Procedure:
• Connections are given as per circuit diagram.
• Logical inputs are given as per circuit diagram.
• Observe the output and verify the truth table.
Theory:
ALU or Arithmetic Logical Unit is a digital circuit to do arithmetic operations like addition,
subtraction, division, multiplication and logical operations like and, or, xor, nand, nor etc. A
simple block diagram of a 4-bit ALU for operations and, or, xor and add is shown in the
Logic diagram.
LOGIC DIAGRAM:
Design Issues:
The circuit functionality of a 1 bit ALU is shown here, depending upon the control signal S1
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and S0 the circuit operates as follows:
for Control signal S1 = 0 , S0 = 0, the output is A And B, for Control signal S1 = 0 , S0 = 1,
the output is A Or B, for Control signal S1 = 1 , S0 = 0, the output is A Xor B, for Control
signal S1 = 1 , S0 = 1, the output is A Add B.
The truth table for 16-bit ALU with capabilities similar to 74181 is shown
here: Required functionality of ALU (inputs and outputs are active high)
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