Q.1 Sketch pin diagram of 555 timer IC and Explain Each pin.
Now as shown in figure, there are eight pins for a 555 Timer IC namely,
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Function of Each Pin (Short Explanation)
1. GND (Pin 1) – Ground reference (0 V supply).
2. TRIGGER (Pin 2) – Starts timing when voltage < 1/3 Vcc.
3. OUTPUT (Pin 3) – Gives high/low square-wave output.
4. RESET (Pin 4) – Active-low reset; forces output LOW.
5. CONTROL VOLTAGE (Pin 5) – Controls internal threshold (usually via 0.01 µF
capacitor to ground).
6. THRESHOLD (Pin 6) – Stops timing when voltage > 2/3 Vcc.
7. DISCHARGE (Pin 7) – Discharges timing capacitor through internal transistor.
8. Vcc (Pin 8) – Positive supply (typically 5 V–15 V).
Pin 1
It is the ground pin directly connected to the negative rail. It should not be
connected using a resistor, because all the semiconductors inside the IC will
heat up due to stray voltage accumulating in it.
Pin 2
It is the Trigger pin to activate the IC’s timing cycle. It is generally low signal
pin and the timer is triggered when voltage on this pin is below one third of the
supply voltage. The trigger pin is connected to the Inverting input of the
comparator inside the IC and accepts negative signals. The current required
for triggering is 0.5 uA for a period of [Link] triggering voltage maybe 1.67
V if the supply voltage is 5V and 5 V if the supply voltage is 15V. The
triggering circuit inside the IC is too sensitive so that the IC will show false
triggering due to noise in the surroundings. It requires a pull up connection to
avoid false triggering.
Pin 3
It is the output pin. When the IC triggers via pin 2, the output pin goes high
depending on the duration of the timing cycle. It can either sink or source
current which is at maximum 200mA. For logic zero output, it is sinking current
with voltage slightly greater than zero. For logic high output, it is sourcing
current with the output voltage slightly lesser than Vcc.
Pin 4
It is the reset pin. It should be connected to the positive rail to work the IC
properly. When this pin is grounded, the IC will stop working. The reset
voltage required for this pin should be 0.7 volts at a current of 0.1mA.
Pin 5
Control pin – The 2/3 supply voltage point on the terminal voltage divider is
brought to the control pin. It requires to be connected to an external DC signal
to modify the timing cycle. When not in use, it should be connected to the
ground through a 0.01uF capacitor; otherwise the IC will show erratic
responses
Pin 6
It is the Threshold pin. The timing cycle is completed when voltage on this pin
is equal to or greater than two-third of Vcc. It is connected to the non inverting
input of the upper comparator so that it accepts the positive going pulse to
complete the timing cycle. Typical threshold current is 0.1 mA as in the case
of Reset pin. The time width of this pulse should be equal or greater than
0.1uS.
Pin 7
Discharge pin. It provides a discharge path for the timing capacitor through
the collector of the NPN transistor, to which it is connected. The maximum
allowable discharging current should be less than 50 mA otherwise the
transistor may damage. It can be also used as an open collector output.
Pin 8
It is positive rail connected pin which is connected to positive terminal of the
power supply. It is also known as Vcc. IC555 works in a wide range of voltage
from 5V to 18 V DC where as the CMOS version 7555 works with 3 Volts.
Q.2 Draw the functional block diagram of IC 555 and
explain it.
The pictorial representation showing the internal details of a 555 Timer is
known as functional diagram.
The functional diagram of 555 Timer IC is shown in the following figure −
Observe that the functional diagram of 555 Timer contains a voltage divider
network, two comparators, one SR flip-flop, two transistors and an inverter.
This section discusses about the purpose of each block or component in
detail −
Voltage Divider Network
The voltage divider network consists of a three 5KΩ resistors that are
connected in series between the supply voltage Vcc and ground.
This network provides a voltage of Vcc3 between a point and ground, if there
exists only one 5KΩ resistor. Similarly, it provides a voltage
of 2Vcc3 between a point and ground, if there exists only two 5KΩ resistors.
Comparator
The functional diagram of a 555 Timer IC consists of two comparators: an
Upper Comparator (UC) and a Lower Comparator (LC).
Recall that a comparator compares the two inputs that are applied to it and
produces an output.
If the voltage present at the non-inverting terminal of an op-amp is greater
than the voltage present at its inverting terminal, then the output of
comparator will be +Vsat. This can be considered as Logic High ('1') in
digital representation.
If the voltage present at the non-inverting terminal of op-amp is less than or
equal to the voltage at its inverting terminal, then the output of comparator
will be −Vsat. This can be considered as Logic Low ('0') in digital
representation.
SR Flip-Flop
Recall that a SR flip-flop operates with either positive clock transitions or
negative clock transitions. It has two inputs: S and R, and two outputs: Q(t)
and Q(t). The outputs, Q(t) & Q(t) are complement to each other.
The following table shows the state table of a SR flip-flop
S R Q(t+1)
0 0 Q(t)
0 1 0
1 0 1
1 1 -
Here, Q(t) & Q(t+1) are present state & next state respectively. So, SR flip-
flop can be used for one of these three functions such as Hold, Reset & Set
based on the input conditions, when positive (negative) transition of clock
signal is applied.
The outputs of Lower Comparator (LC) and Upper Comparator (UC) are
applied as inputs of SR flip-flop as shown in the functional diagram of 555
Timer IC.
Transistors and Inverter
The functional diagram of a 555 Timer IC consists of one npn
transistor Q1 and one pnp transistor Q2. The npn transistor Q1 will be
turned ON if its base to emitter voltage is positive and greater than cut-in
voltage. Otherwise, it will be turned-OFF.
The pnp transistor Q2 is used as buffer in order to isolate the reset input
from SR flip-flop and npn transistor Q1.
The inverter used in the functional diagram of a 555 Timer IC not only
performs the inverting action but also amplifies the power level.
The 555 Timer IC can be used in mono stable operation in order to produce a
pulse at the output. Similarly, it can be used in astable operation in order to
produce a square wave at the output.
Q.3 Write application of 555 timer IC.
Time Delay Generator
Produces accurate ON or OFF delays.
Used in automatic switches, alarm delays, relay control, and safety circuits.
2. Astable Multivibrator (Oscillator)
Generates continuous square waves.
Used in:
o LED flashers
o Clock pulse generators
o Tone generators
o Signal generators
3. Monostable Multivibrator (One-Shot Pulse Generator)
Produces single pulse for a fixed time interval.
Used in:
o Timer circuits
o Pulse generation
o Touch switches
4. Bistable Multivibrator (Flip-Flop)
Works as a memory element.
Used in:
o Toggle switches
o Digital ON/OFF control
o Latching systems
5. PWM (Pulse Width Modulation) Generator
Controls speed and power.
Used in:
o DC motor speed control
o LED brightness control
o Power regulation
6. Frequency Generator
Used to produce variable frequency signals.
Applied in:
o Function generators
o Frequency testing circuits
7. Tone Generator
Produces audio frequencies.
Used in:
o Burglar alarms
o Doorbells
o Electronic sirens
8. Pulse Width Modulator
Generates pulses of variable width.
Used in:
o SMPS
o Robotics
o Control systems
9. Voltage Controlled Oscillator (VCO)
Output frequency varies with input voltage.
Used in:
o FM modulation
o Communication systems
10. Wave Shaping Circuits
Converts signals into square waves.
Used in signal conditioning circuits.