MICROPROCESSOR PYQ
ANSWERS
By- Urmom
1
COMMANDS LIST
Data Transfer Operations:
• MOV r, m: Move the contents of one register or
memory into another.
• MVI r, data: Move immediate data into a register.
• LDA address: Load accumulator directly from memory.
• STA address: Store accumulator directly to memory.
• LHLD address: Load H and L registers directly from
memory.
• SHLD address: Store H and L registers directly to
memory.
• LDAX B/D: Load accumulator indirectly through B or D
register pair.
• STAX B/D: Store accumulator indirectly through B or D
register pair.
• XCHG: Exchange contents of D and E registers with H
and L registers.
Arithmetic Operations:
• ADD r/m: Add register or memory to the accumulator.
• ADI data: Add immediate to the accumulator.
• ADC r/m: Add register or memory to the accumulator
with carry.
• ACI data: Add immediate to the accumulator with carry.
• SUB r/m: Subtract register or memory from the
accumulator.
• SUI data: Subtract immediate from the accumulator.
• SBB r/m: Subtract register or memory from the
accumulator with borrow.
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• SBI data: Subtract immediate from the accumulator
with borrow.
• INX rp: Increment register pair.
• DCX rp: Decrement register pair.
• INR r/m: Increment register or memory.
• DCR r/m: Decrement register or memory.
• DAD rp: Double add register pair to HL register pair.
Logical Operations:
• ANA r/m: AND register or memory with accumulator.
• ANI data: AND immediate with accumulator.
• XRA r/m: Exclusive OR register or memory with
accumulator.
• XRI data: Exclusive OR immediate with accumulator.
• ORA r/m: OR register or memory with accumulator.
• ORI data: OR immediate with accumulator.
• CMP r/m: Compare register or memory with
accumulator.
• CPI data: Compare immediate with accumulator.
• RLC: Rotate accumulator left.
• RRC: Rotate accumulator right.
• RAL: Rotate accumulator left through carry.
• RAR: Rotate accumulator right through carry.
• CMA: Complement accumulator.
• CMC: Complement carry.
• STC: Set carry.
Branch Operations:
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• JMP address: Unconditional jump.
• JC address: Jump on carry.
• JNC address: Jump on no carry.
• JZ address: Jump on zero.
• JNZ address: Jump on not zero.
• JP address: Jump on positive.
• JM address: Jump on minus.
• JPE address: Jump on parity even.
• JPO address: Jump on parity odd.
• CALL address: Call subroutine.
• CC address, CNC address: Call on condition.
• CZ address, CNZ address: Call on zero/not zero.
• CP address, CM address: Call on positive/minus.
• CPE address, CPO address: Call on parity even/odd.
• RET: Return from subroutine.
• RC, RNC, RZ, RNZ, RP, RM, RPE, RPO: Return on
condition.
Stack Operations:
• PUSH rp: Push register pair onto stack.
• POP rp: Pop register pair from stack.
• XTHL: Exchange stack top with HL.
• SPHL: Set SP to HL.
• LXI rp, data16: Load register pair immediate.
I/O and Machine Control Operations:
• IN port: Input from port.
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• OUT port: Output to port.
• DI: Disable interrupts.
• EI: Enable interrupts.
• NOP: No operation.
• HLT: Halt.
PROGRAMS:
5
3a.
lda 2400h
mov b,a
lxi h,2500h
lxi d,5050h
loop: mov a,m
ani 82h
rlc
rlc
mov c,a
rlc
rlc
rlc
rlc
ora c
ani 82h
mov c,a
mov a,m
ani 7dh
ora c
stax d
inx d
inx h
dcr b
jnz loop
hlt
Initial Setup
1. Load and Initialize Counters and Pointers:
• The number of bytes to process (N) is loaded from
memory location 2400H into the accumulator and
then moved to register B to be used as a loop
counter.
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• HL is initialized to 2500H, pointing to the start of
the source data.
• DE is initialized to 2510H, pointing to the start of
the destination where the modi ed bytes will be
stored.
Loop Operation
2. Process Each Byte:
• The byte at the current HL address is loaded into
the accumulator.
• An AND operation with 82H (binary 10000010)
isolates bits D7 and D1 of the byte, clearing all
other bits.
3. Bit Manipulation:
• The byte in the accumulator is rotated left twice
(RLC twice). After these operations, D7 moves to
the position of D1, and D1 moves two positions
left.
• This intermediate result is stored in register C.
• Another set of four left rotations (RLC four times)
moves D1 (originally) to the position of D7. Since
each rotation also involves the carry, it e ectively
results in repositioning the bits to swap their
places.
4. Combine the Swapped Bits:
• An OR operation between the accumulator (which
now has D1 in the position of D7) and C (which
has the earlier shifted bits) recombines these into
a single byte with D7 and D1 swapped.
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fi
ff
• Another AND operation with 82H ensures only D7
and D1 are a ected, removing any unintended
alterations to other bits.
5. Prepare Original Byte:
• Reload the original byte to clear the positions of
D7 and D1.
• An AND operation with 7DH (binary 01111101)
clears D7 and D1 in the original byte.
6. Merge and Store Result:
• An OR operation with the content of C (which has
the swapped bits D7 and D1) merges these into
the cleared positions in the original byte.
• This nal modi ed byte is then stored in the
destination memory location pointed to by DE.
•
Q3.b
lda 2200h
mov b,a
lxi h,2500h
mvi d,00h
mvi c,00h
loop: mov a,m
ani 01h
jz even
odd: mov a,m
add d
mov d,a
mvi a,00h
8
fi
ff
fi
jmp skip
even: mov a,m
add c
mov c,a
skip:inx h
dcr b
jnz loop
mov a,d
sta 2300h
mov a,c
sta 2301h
hlt
4a.
lda 2500h
mov b,a
lxi h,2501h
lxi d,2600h
loop: mov a,m
ani 18h
jz skip ;if d4d3 == 00
sbi 18h
jz skip ;if d4d3 == 11
mov a,m
stax d
inx d
skip: inx h
dcr b
jnz loop
hlt
9
4b.
lda 2400h
mov b,a
lxi h,2500h
mvi c,00h ;to store the sum
mvi d,00h ;to store the carry
loop: mov a,m
ani 0ch ;a= 0 0 0 0 d3 d2 0 0
sbi 0ch ; if a- 0001100 != 0 then d3d2 !=11
jnz skip ;if d3d2 != 11
mov a,m
add c
mov c,a
jnc skip
inr d
skip: inx h
dcr b
jnz loop
mov a,c
sta 2300h
mov a,d
sta 2301h
hlt
5c. Same as Assignment 2 qn 4
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Programs
4a. Same as Assignment 2 qn 4
4b. Yeh bhi Hogya xD
5a.
lda 2200h
mov b,a
lxi h,2500h
mvi c,00h ;to store the sum
mvi d,00h ;to store the carry
loop: mov a,m
ani 80h
jz skip ;if d7 != 1
mov a,m
add c
mov c,a
jnc skip
inr d
skip: inx h
dcr b
jnz loop
11
mov a,c
sta 2300h
mov a,d
sta 2301h
hlt
Programs
4a. Done
4b. Done
5a. Done
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3. Done
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