7.
11 Basic computers
1. In the computer model described, which combination BEST captures the minimal set
of elements required to qualify a device as a “computer” in this context?
A. Microprocessor IC + any kind of actuator
B. Memory + keyboard + power supply
C. Microprocessor IC + memory + user interface hardware ✔
D. Motherboard + screen + external storage device
2. In the given material, firmware is most precisely characterised as:
A. A set of user applications stored in RAM
B. Microcode and low-level routines stored in non-volatile memory that directly
control hardware ✔
C. Any software that runs without an operating system
D. Hardware diagnostics that are executed only once at production test
3. Which statement about the CPU Control Unit (CU) is most consistent with the slides?
A. It performs all arithmetic and logic operations
B. It is considered the primary source of design bugs due to its complexity ✔
C. It generates only timing signals, but not control signals
D. It is normally implemented outside the microprocessor IC as discrete logic
4. According to the material, hard-wired control differs from micro-programmed control
primarily because hard-wired control:
A. Uses microcode stored in EPROM
B. Is easier to modify after deployment
C. Relies on fixed logic circuits like PLAs, making it fast but inflexible ✔
D. Is limited to very low-speed microprocessors only
5. The clock signal in a microcomputer is generated by:
A. A programmable timer driven from the power line frequency
B. A quartz-crystal oscillator dedicated to synchronising the microprocessor and other
ICs ✔
C. A free-running RC network inside the ALU
D. A digital PLL located in the system memory controller only
6. From the viewpoint of the slides, which limitation of clock frequency as a
performance metric is explicitly mentioned?
A. High clock frequency automatically increases instruction set size
B. Different designs may perform different actions per clock cycle ✔
C. Clock frequency is irrelevant to performance
D. Frequency is fixed by the type of RAM used and cannot be changed
7. In the architecture described, the ALU and FPU relationship is best summarised as:
A. Completely independent units that never share the same chip
B. FPU replaces ALU in floating-point systems
C. ALU handles simple integer/logic operations while complex/decimal operations are
offloaded to an FPU which is usually integrated on the same chip ✔
D. FPU is an optional external peripheral accessed via I/O ports only
8. Which register is directly associated with calculating and storing effective memory
addresses in the architecture described?
A. Program Counter (PC)
B. Effective Address Register (EAR) ✔
C. Status Register (SR)
D. Accumulator
9. When a conditional branch instruction is executed, which combination of elements is
most directly involved according to the slides?
A. Accumulator only
B. Stack Pointer and Instruction Register
C. Status Register flags and Program Counter ✔
D. Data bus and Chip Select line
10. In the bus structure described, which statement about the address bus is correct?
A. It is bi-directional and carries both addresses and data
B. It is one-way from memory to CPU
C. It is one-way from CPU towards memory/I/O, determining which location is
accessed ✔
D. It is only used during write operations, not reads
11. If an address bus has 8 lines as in the given example, which assertion is valid and
explicitly supported?
A. It can address 128 locations
B. It can address 256 independent memory locations ✔
C. It can address 512 words of 8 bits
D. It can only be used for ROM addressing
12. Which bus is explicitly stated to carry timing and control signals such as Read/Write
and Interrupts?
A. Address bus only
B. Data bus
C. Control bus ✔
D. Peripheral bus
13. In the described memory model, a 256 × 1 chip requires which minimum set of lines
to be fully functional?
A. 8 address lines, 1 data line, 1 W/R, 1 CS ✔
B. 4 address lines, 8 data lines, 1 CS
C. 16 data lines, no address lines, 1 W/R
D. 8 address lines and 8 data lines only
14. During a write operation to a 256 × 1 chip, which control line combination is
necessary according to the example?
A. CS = 0, W/R = 1
B. CS = 1, W/R = 0 ✔
C. CS = 0, W/R = 0
D. CS = 1, W/R = 1
15. The primary purpose of the Chip Select (CS) line in memory chips is to:
A. Select between read and write operations
B. Place the chip in a high-impedance state when not used ✔
C. Control timing set-up and hold
D. Determine the number of bits per word
16. When multiple 1-bit chips are arranged in parallel to form a wider memory word,
which statement is correct?
A. Each chip must have a unique address bus
B. All chips share the same address and control lines, but each chip contributes one
data bit ✔
C. Each chip uses a separate Chip Select
D. Timing requirements are completely different for each chip
17. To construct a 1024 × 8 memory from 256 × 8 chips as described, a 2-to-4 line
decoder is used primarily to:
A. Generate address bits A0–A7
B. Convert data from serial to parallel format
C. Decode the higher-order address bits A8–A9 to drive individual chip select lines ✔
D. Generate the system clock from address transitions
18. In the memory expansion example, non-selected memory chips go into:
A. A forced read mode
B. A forced write mode
C. High-impedance state to avoid bus contention ✔
D. An internal refresh loop only
19. The text states that square arrays of memory cells are preferred mainly because they:
A. Are faster than rectangular arrays for all access types
B. Simplify quality control and printed circuit board layout ✔
C. Require fewer decoders than linear arrays
D. Eliminate the need for control lines
20. Regarding alternate memory structures, the 256 × 256 array is highlighted to show
that:
A. Only one addressing format is possible for each physical array
B. A single physical array can represent different logical configurations such as 64K ×
1✔
C. Column decoders are optional
D. Row decoders eliminate the need for Chip Select
21. The distinction between sequential and random access memory (SAM vs RAM) in the
slides is primarily based on:
A. Whether the data is volatile or non-volatile
B. Whether access is limited to fixed time intervals
C. Whether data can be accessed directly by address or must be read in sequence ✔
D. Whether the memory is magnetic or semiconductor
22. Which characteristic is unique to DRAM compared with SRAM in the material?
A. Stores information as a stable flip-flop
B. Does not require refresh
C. Uses a capacitor to store charge, requiring periodic refresh ✔
D. Cannot be used in main memory
23. The principal advantage of DRAM over SRAM mentioned in the slides is:
A. Lower access time
B. Ability to operate without power
C. Higher density and lower cost per bit ✔
D. Built-in error correction
24. The principal advantage of SRAM over DRAM according to the text is:
A. Requires less power during operation
B. Much faster access time, making it suitable for cache ✔
C. Easier to manufacture than DRAM
D. Non-volatile under power loss
25. In the RAM technology comparison, MOS RAMs vs bipolar RAMs are distinguished
primarily by:
A. MOS RAMs being faster than bipolar
B. MOS RAMs consuming less power, while bipolar RAMs offer higher speed ✔
C. Bipolar RAMs always being non-volatile
D. MOS RAMs being only suitable for cache
26. A key property of ROM as described is that it:
A. Can always be rewritten in the field
B. Is programmed during fabrication and cannot be changed afterward (mask ROM)
✔
C. Stores data in flip-flops that require refresh
D. Must be programmed every time power is turned on
27. PROM differs from mask ROM in that PROM:
A. Is programmed at the factory with fixed masks
B. Can be electrically erased and rewritten many times
C. Can be programmed once after manufacture using a PROM programmer ✔
D. Stores data using capacitors that require refresh
28. According to the slides, which distinguishing feature of EPROM is explicitly
highlighted?
A. It is erased electrically using a low-voltage signal
B. It uses ultraviolet light for erasure and can then be reprogrammed ✔
C. It can be erased only by replacing the chip
D. It is volatile and must be refreshed
29. EEPROM, in contrast to EPROM, is described as:
A. Erased only in large blocks
B. Requiring UV light for erasure
C. Electrically erasable at the byte or small-block level and reprogrammable in-circuit
✔
D. Always slower than magnetic tape
30. Flash memory is characterised in the slides as:
A. A variant of SRAM with built-in battery backup
B. An EEPROM variant that is erased and programmed in blocks ✔
C. A type of mask ROM
D. A dynamic RAM with internal refresh and checksum
31. The key idea behind NVRAM (Non-Volatile RAM) in the material is that it:
A. Uses only ROM cells configured as RAM
B. Combines RAM with a backup ROM or EEPROM so that RAM contents can be
stored on power-down ✔
C. Is identical to cache memory
D. Eliminates the need for any backup power
32. In the NVRAM process, which sequence is explicitly described?
A. STORE from ROM to RAM on shutdown, RECALL from RAM to ROM on
startup
B. RECALL from RAM to ROM on shutdown, STORE from ROM to RAM on
startup
C. On startup, ROM contents are copied to RAM (RECALL); before shutdown, RAM
is copied back to ROM (STORE) ✔
D. ON/OFF cycles are irrelevant to NVRAM behaviour
33. In the NVRAM description, the requirement for +5 V backup for ~20 ms is needed to:
A. Maintain DRAM refresh indefinitely
B. Allow the STORE cycle to complete copying RAM to ROM/EEPROM ✔
C. Re-initialize the CPU
D. Erase the NVRAM contents
34. From the cache vs main memory discussion, which statement best captures their
relationship?
A. Cache is larger and slower than main memory
B. Cache is smaller, faster, and holds frequently used information copied from main
memory ✔
C. Main memory holds only program, cache holds only data
D. Cache replaces main memory completely
35. In the cache analogy, the performance improvement is likened to:
A. Reading from tape vs optical disk
B. Accessing data from internal memory vs a floppy disk ✔
C. Using SRAM vs Flash
D. Using DVD vs CD-ROM
36. In the input device description, which function is explicitly assigned to the keyboard’s
internal microprocessor?
A. Generating video output
B. Detecting key presses and sending corresponding ASCII codes ✔
C. Refreshing DRAM contents
D. Performing parity checking on the CPU data bus
37. The extended set of characters reachable from the keyboard arises when:
A. The keyboard is used with a mouse in combination
B. Control and ALT keys are used with standard keys, extending beyond 128 ASCII
codes ✔
C. The power supply is stabilised at a higher voltage
D. The disk subsystem is active during typing
38. The mouse and trackball distinction in the slides is that:
A. A mouse uses a ball and a trackball uses optics
B. Both are identical in mechanical construction
C. A mouse moves over the surface while a trackball remains stationary and the ball is
rotated by the user ✔
D. Trackballs cannot be used for cursor movement
39. Which device in the slides is clearly described as both an input and output device?
A. Keyboard
B. Printer
C. Modem or magnetic disk ✔
D. LCD monitor only
40. For raster scanning, the scanning pattern is:
A. Radial from the centre to corners
B. Continuous random access pattern
C. Line by line from left to right, top to bottom, with continuous refreshing ✔
D. Only along vertical lines with no horizontal motion
41. Vector scanning differs from raster in that vector scanning:
A. Refreshes the entire screen even if nothing changes
B. Only updates the parts of the display that change ✔
C. Is limited to monochrome displays
D. Cannot display characters
42. In the magnetic disk description, which three factors together determine the effective
data access performance?
A. Seek time, latency, read/write time ✔
B. Seek time, access bus width, CPU speed
C. Rotation speed, power consumption, cylinder count
D. Latency, buffer size, display resolution
43. For a floppy disk, the head retraction before ejection is emphasised primarily to:
A. Reduce noise during spin-down
B. Prevent mechanical damage and data loss ✔
C. Increase data transfer rate
D. Erase the disk automatically
44. The primary advantage of optical disks over floppy disks highlighted in the text is:
A. Lower manufacturing cost
B. Much higher capacity, up to about 680 MB for CD-ROM ✔
C. Non-circular physical shape
D. Ability to be read magnetically or optically
45. CD-R is characterised as WORM because:
A. Data can be written and erased many times
B. Data is permanently stored by burning organic dye spots and cannot be erased ✔
C. It behaves like a tape with sequential access
D. It supports random physical rewriting of pits
46. CD-RW differs from CD-R in that CD-RW:
A. Uses an excitable crystal layer that can be erased and rewritten ✔
B. Is pressed at the factory like CD-ROM
C. Supports only single-session recordings
D. Cannot be read by any standard CD drive
47. A key reason DVD can store more data than a CD, according to the slides, is that
DVD:
A. Spins at a lower speed
B. Uses a higher-power red laser and smaller pits and tracks ✔
C. Uses analogue encoding instead of digital
D. Has a larger physical diameter than CD
48. According to the material, DVD players can read CDs because:
A. CD uses the same pit size as DVD
B. DVD drives are designed to handle both formats, but CD players cannot read
DVDs ✔
C. Both use identical lasers
D. DVD is simply a multi-session CD
49. Magneto-optical disks (MOD) are distinguished by which write principle?
A. Directly scratching pits with a mechanical head
B. Heating spots with a strong laser while applying a magnetic field to set
magnetisation direction ✔
C. Using only magnetisation, with no laser
D. Using only an electric field to polarise crystals
50. In the MOD reading process, which physical quantity is detected?
A. Electric charge on the surface
B. Changes in pit depth
C. Different magnetisation directions that produce different light polarisations ✔
D. Surface temperature gradient
51. Magnetic tape is noted as being especially suitable for:
A. Random access main memory
B. High-speed CPU cache
C. Low-cost auxiliary memory and backups with sequential access ✔
D. Replacing all disk drives in modern systems
52. Digital Audio Tape (DAT) in the slides is notable for:
A. Storing about 2 GB per small 4 mm-wide cartridge ✔
B. Being limited to audio-only data
C. Using only analogue recording
D. Being incompatible with computer data
53. In aircraft applications, the Quick Access Recorder (QAR) or PMR tape system is
described as:
A. A single-direction tape that stops at the end
B. Continuously writing and reversing direction at tape ends, requiring manual
cassette change when full ✔
C. Using random access to selected tracks
D. Only recording on power-up
54. In the Computer Self-Monitoring Methods section, self-monitoring is especially
important because:
A. It increases the speed of the CPU
B. It allows detection of internal faults in systems where human life may depend on
correct operation ✔
C. It eliminates the need for maintenance
D. It replaces all external test equipment
55. CPU circuit self-check focuses mainly on:
A. Mechanical actuators throughout the aircraft
B. STATUS, CONTROL, ADDRESS, and DATA BUS lines of the CPU ✔
C. Only the power supply of the CPU
D. Only the RAM chips external to the CPU
56. The ROM checksum method is classified under which self-check category?
A. Timing check
B. Data validity check
C. Conversion check of ROM contents ✔
D. System-level mechanical test
57. In the ROM checksum self-check, failure is detected when:
A. The number of bits in ROM is not a power of two
B. The computed checksum does not match a pre-stored reference value ✔
C. The CPU clock is too slow
D. The ROM content is all zeros
58. The walking bit test belongs primarily to which self-check area?
A. ROM conversion
B. Timing check
C. Memory & register data validity check ✔
D. Watchdog reset sequence
59. The purpose of the walking-bit pattern (0001, 0010, 0100, 1000, …) is to:
A. Check only the parity generation
B. Verify each bit can independently assume 1 while others remain 0, detecting stuck
bits ✔
C. Reduce memory access time
D. Test the capacity of the EEPROM
60. The watchdog timer is specifically mentioned as:
A. A power supply noise filter
B. A separate timing circuit that resets or interrupts the CPU if it fails to “kick” it in
time ✔
C. A ROM checksum calculator
D. A memory controller component only
61. Timing checks, including those using a watchdog timer, are important because:
A. Computers process data slowly and need mechanical synchronisation
B. Timing errors can cause data corruption or logic faults in high-speed systems ✔
C. They replace all other self-check methods
D. They remove the need for ROM checks
62. In the feedback self-check method, an essential feature is:
A. The CPU is bypassed
B. Part of the output is routed back to an input where the CPU can compare expected
vs measured signals ✔
C. Only digital signals can be tested
D. No comparison is done; only timing is monitored
63. In the analog feedback example, the CPU verifies circuit health by:
A. Measuring temperature of components
B. Comparing an A/D-converted feedback signal with an expected output ratio ✔
C. Counting clock pulses
D. Checking the ROM checksum only
64. Wrap-around self-check is distinguished from simple feedback by:
A. Testing no external circuits
B. Feeding only a small portion of the output back
C. Returning the entire output path back to the CPU for comparison ✔
D. Ignoring DA and AD conversions
65. A typical wrap-around method for mixed-signal systems includes:
A. Digital output → DAC → analog path → ADC → digital comparison ✔
B. Digital output → direct CPU comparison
C. Analog input → mechanical relay → CPU
D. EEPROM → DRAM → ROM
66. Comparison self-check is particularly useful when:
A. Only one processor is available
B. Two identical or similar circuits operate in parallel and their outputs are compared
for mismatch ✔
C. Memory is too small for feedback
D. Watchdog timers are disabled
67. System self-check differs from module self-check mainly because it:
A. Ignores mechanical components
B. Verifies operation of the entire system including mechanical motion, transducers,
wiring, and relays ✔
C. Only checks power supply rails
D. Is cheaper and simpler than module self-check
68. The text notes that system self-check is used only when essential, mainly because:
A. It reduces reliability
B. It requires fewer components
C. It adds cost and weight due to extra hardware and transducers ✔
D. It cannot be combined with feedback methods
69. Power-up self-check is especially suitable for:
A. Verifying hardware before main operations start ✔
B. Reducing boot time by skipping tests
C. Testing only the printer
D. Rewriting ROM contents automatically
70. During power-up self-check, which items are explicitly mentioned as being tested?
A. Only keyboard and mouse
B. ROM, RAM, timing circuits, inputs, actuators, lights, indicators, power supply and
reset ✔
C. Only display devices
D. Only magnetic disks
71. Continuous self-check, compared with power-up self-check, is described as:
A. Longer and more comprehensive
B. Running during normal operation, but shorter and more limited due to processing
load ✔
C. Only checking mechanical devices
D. Requiring no CPU involvement
72. In critical avionics, continuous self-check typically leads to which action upon
detecting a fault?
A. Ignoring the fault until landing
B. Switching to a redundant system while the faulty unit powers down ✔
C. Erasing flight data
D. Clearing all alarms automatically
73. In the single self-monitoring type, a system with only one CPU relies on:
A. Another external monitor CPU
B. Internal checks like ROM, RAM, timing and internal logic self-check ✔
C. Only watchdog timers without ROM checks
D. Only module-level feedback
74. In interactive self-monitoring, the presence of two or more CPUs allows:
A. No need for handshaking
B. CPUs to perform handshaking, watchdog timing and data exchange to check each
other ✔
C. Only one CPU to run tests
D. Elimination of ROM checks
75. The monitor self-monitoring type differs from interactive checking primarily because:
A. It uses a dedicated monitor CPU that evaluates the main CPU’s performance ✔
B. No data comparison is done
C. It only checks timing
D. It is cheaper than single-type checking
76. A reference computer such as an Inertial Reference System (IRS) is characterised by:
A. Continuous need for external inputs during normal operation
B. Being self-contained and mainly outputting reference data after initialisation ✔
C. Being unable to store data
D. Requiring pilot control input at every clock cycle
77. Parameters typically provided by the IRS as listed in the slides include:
A. Only altitude and airspeed
B. Attitude, heading, acceleration, and angular rate ✔
C. Only temperature and pressure
D. Magnetic variation alone
78. An information/warning/display system like Airbus EFIS/ECAM is primarily
responsible for:
A. Directly actuating slats and flaps
B. Centralising flight and engine data, warnings, and status information for pilots and
maintenance ✔
C. Only storing maintenance data on tape
D. Controlling fuel pumps directly
79. In the Airbus EFIS/ECAM example, the system includes:
A. 1 DMC, 1 FWC, 5 SDACs
B. 3 DMCs, 2 FWCs, 2 SDACs ✔
C. 2 DMCs, 3 FWCs, 2 SDACs
D. 4 DMCs, 1 FWC, 2 SDACs
80. Each Display Management Computer (DMC) in the Airbus example is stated to:
A. Handle only EFIS
B. Handle only ECAM
C. Provide two functions – one for EFIS and one for ECAM ✔
D. Serve only as a data recorder
81. A controlling computer such as the Slat/Flap Control Computer (SFCC) is defined as:
A. A unit that only displays information about flaps
B. A controller that monitors lever position and commands actuators (PCUs) to move
the slat/flap surfaces ✔
C. A system that only records flap positions
D. A device used only on the ground
82. In the SFCC system, Power Control Units (PCUs) are driven by:
A. Electric motors and solenoids
B. Hydraulic motors controlled via valve blocks and gearboxes ✔
C. Pneumatic servos only
D. Mechanical cables from the cockpit
83. Wing Tip Brakes in the SFCC system are used to:
A. Increase flap extension speed
B. Stop and lock the system when a failure is detected ✔
C. Provide noise reduction
D. Replace primary flight controls
84. In SFCC feedback, Position Pick-off Units (PPUs) have roles including:
A. Measuring fuel quantity only
B. Providing feedback for PCU output, surface asymmetry detection, and
instrumentation display ✔
C. Measuring cabin temperature
D. Controlling engine thrust
85. An interactive computer such as the Flight Management Computer (FMC) is
characterised by:
A. Being read-only and non-interactive
B. Two-way interaction: displaying data and accepting pilot input via the CDU ✔
C. Only computing climb performance
D. Only storing maintenance data
86. The FMC’s primary optimisation function mentioned is:
A. Optimising only landing performance
B. Calculating optimum cost profiles for climb, cruise and descent ✔
C. Minimising memory usage of the OS
D. Controlling cabin entertainment
87. The FMC interfaces directly with which aircraft systems according to the slides?
A. Fuel jettison systems
B. Autopilot and autothrottle ✔
C. De-icing systems
D. Weather radar only
88. The same FMC can simultaneously be classified as:
A. Only a reference computer
B. Only a warning computer
C. Interactive, controlling, information, and warning computer ✔
D. Only a data recorder
89. In the summarised Airplane Digital Systems section, computers may be:
A. Only digital
B. Only analogue
C. Analogue, digital, or hybrid, depending on function ✔
D. Only optical
90. Which combination BEST represents the main categories of aircraft computers by
application as given in the slides?
A. Server, client, gateway, router
B. Interactive, reference, information/warning/display, controlling ✔
C. Sensor, actuator, motor, relay
D. Memory, CPU, bus, I/O
91. In the memory timing discussion, setup and hold times are required primarily so that:
A. The CPU can change address during writes
B. Address and data remain stable long enough around activation to avoid spurious
signals and errors ✔
C. ROM checksums can be calculated
D. Watchdog timers can synchronise with the clock
92. During read timing, the text emphasises that:
A. Output data is valid immediately after address change
B. Output data is valid only after a minimum access time once the address is stable ✔
C. Address may not change before data is read
D. Chip Select must always be held low
93. The high-impedance state of memory chips when CS is OFF is particularly important
because:
A. It speeds up refresh
B. It prevents multiple chips from driving the same bus line simultaneously ✔
C. It reduces ROM checksum values
D. It increases address range
94. In the peripherals section, which statement is most accurate?
A. Peripherals are defined as memory devices only
B. Peripherals extend system capability and follow standard interfaces and protocols
✔
C. Peripherals must be located inside the CPU
D. Peripherals cannot control external systems
95. The display explanation highlights that a pixel can:
A. Only display one colour at a time
B. Represent colour using combinations of red, green and blue intensities ✔
C. Only be monochrome
D. Only be turned fully on or fully off
96. CRT vs LCD in the slides: which distinction is explicitly stated?
A. CRT is flat-panel and LCD is bulky
B. CRT uses a scanning electron beam, while LCD uses liquid crystals in a flat panel
✔
C. LCD requires a vacuum tube, CRT does not
D. LCD is always monochrome and CRT always colour
97. LED displays are highlighted as especially suitable for:
A. Large high-resolution graphics
B. Simple numeric or status indicators such as seven-segment displays ✔
C. Sequential tape emulation
D. Magnetic recording
98. Cache memory, as compared with main memory, is described as:
A. Larger capacity but slower speed
B. Smaller capacity but faster, holding frequently used information ✔
C. Always implemented in DRAM
D. Located on magnetic disk
99. In CPU register tests, the use of walking 1/0 patterns primarily detects:
A. Address decoder malfunction in external memory only
B. Bits that are stuck at 1 or 0 inside registers ✔
C. Timing violations
D. Power supply instability
100. Overall, the slides emphasise that modern aircraft computers are:
A. Dedicated to single roles with strict separation
B. Often multi-functional, combining control, monitoring, reference, information, and
warning roles in the same hardware ✔
C. Only used for passenger entertainment
D. Unrelated to safety or maintenance