ELECTRONIC DEVICES
Unit-4 :MOSFET & Nano- electronic devices
characteristics and applications
Session-29
Topics covered : Session-29
Introduction to MOSFET
NMOS working & VI-characteristics
PMOS- Working &VI characteristics
MOS capacitor
CV-characteristics
Problem discussions & quiz
Non-ideal effects
Small signal model
Pass transistors & transmission gates
CMOS digital logic circuits
CMOS Inverter design
Standard Cell Design
SPICE modeling
Finfet’s and Introduction to quantum devices
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2
Problem-1
The drain of an NMOSFET is shorted to the gate.
Threshold voltage = 1V. If the drain current is 1mA
for VGS = 2V, what will be the drain current value if
VGS is increased by 1V
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Solution to problem1
As gate is shorted with drain , its a diode
connected transistor and it operates in
saturation region
ID = kn (Vgs – Vt)2
1mA = Kn (2-1)2
Kn = 1 mA / V2
If Vgs is increased by 1V , Vgs = 3V
ID = kn (Vgs – Vt)2
= 1m (3-1)2 = 4mA
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Problem-2
In a MOS capacitor with an oxide layer thickness of 10
nm, the maximum depletion layer thickness is 100 nm.
The permittivity of the semiconductor and the oxide
layer are 𝜀𝑠 𝑎𝑛𝑑 𝜀ox respectively. What is the ratio of
the maximum capacitance to minimum capacitance of
this MOS capacitor
Assume 𝜀𝑠/𝜀ox=3
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Solution to problem2
Given
tox = 10nm
td = 100nm
𝜀𝑠/𝜀ox=3
Maximum capacitance is in accumulation region
C
max = C0X
Minimum capacitance in inversion region
1/C
min = 1/Cox + 1/Cdep
Cox and Cdep are capacitance per unit area
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Solution to problem2
Ratio of Cmax to Cmin
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Problem-3
Calculate the current Id flowing through pmos.
Given : Vtp = - 3V and μp Cox (W/L) = 0.4mA/V2
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Solution to problem-3
Solution
Given : Vtp = - 3V and μp Cox (W/L) = 0.4mA/V2
It can be observed that : VSG = 5V and VSD = 11V
Comparing VSG and | Vtp | : 5 > |-3| --- PMOS is ON
Comparing VSD with VSG – |Vtp| : 11 > 2 – Saturation
ID = 0.5 * μp Cox (W/L) * Vov2
= 0.5 * 0.4m * 22
= 0.8mA
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Problem-4
A PMOS transistor has W/L=10 with process
parameters kp’ = 30μA/V2 and Vtp = -0.6V. For
each of the cases below, calculate the current ID.
Assume VDD = 3V.
a) VSG = 1V, VSD = 3V
b) VSG = 3V, VSD = 2V
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Solution to problem4
Case-1 : VSG = 1V, VSD = 3V and Vtp = -0.6V
Let us first find the region of operation
Comparing VSG with |Vtp|:
1 > |-0.6| : PMOS is ON
Comparing VSD with VSG – |Vtp | :
3 > 1 - | (-0.6) |
PMOS is operating in saturation region
Equation for current : ID = ½ * KP` * (W/L) ( Vsg – |Vtp|)2
ID = 0.5 * 30 * 10-6 * 10 * (1 - |-0.6|)2
ID = 24 * 10-6 A
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Solution to problem4
Case-2 : VSG = 3V, VSD = 2V and Vtp = -0.6V
Let us first find the region of operation
Comparing VSG with |Vtp|:
3 > |-0.6| : PMOS is ON
Comparing VSD with VSG – |Vtp| :
2 < 3 - | -0.6 |
PMOS is operating in Linear region
Equation for current :
ID = KP` * (W/L) [ (VSG – |Vtp|)*VSD - (VSD2/2) ]
ID = 30 * 10-6 * 10 * [(|3-0.6|)*2 - (4/2)]
ID = 840*10-6 A
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Thank You
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