Here is a simple and correct 8086 Assembly Language Program to find ( A^B )

(raise any number to any power):

Program: Compute A^B

; Program to compute A^B (Power)

; A = Base, B = Exponent

DATA SEGMENT
BASE DB 03h ; A = 3
EXP DB 04h ; B = 4
RESULT DW 0001h ; Initialize result = 1
DATA ENDS

CODE SEGMENT
ASSUME CS:CODE, DS:DATA

START:
MOV AX, DATA
MOV DS, AX

MOV AL, BASE ; AL = Base (A)

MOV BL, EXP ; BL = Exponent (B)
MOV AX, 1 ; Result = 1

POWER_LOOP:
MUL BYTE PTR BASE ; AX = AX × BASE
DEC BL ; Reduce exponent
JNZ POWER_LOOP ; Repeat until BL = 0

MOV RESULT, AX ; Store final result

MOV AH, 4CH ; Exit to DOS

INT 21H
CODE ENDS
END START

Explanation
 Register / Memory Purpose

BASE Base number (A)

EXP Exponent (B)

RESULT Stores the final answer

AX Running multiplication result

BL Loop counter for exponent

Logic:
Initialize result = 1 → multiply by base repeatedly → reduce exponent until it becomes zero.

Example in Program

For BASE = 3 , EXP = 4 →

Result = 3 × 3 × 3 × 3 = 81

(i) ASSUME Directive

The ASSUME directive tells the assembler which segment registers should be associated with which
segments in the program.

Example:

ASSUME CS:CODE, DS:DATA, SS:STACK

This means:

Segment Register Points to

CS Code Segment

DS Data Segment

SS Stack Segment

🔹 It does not load segment registers physically — the programmer must still initialize them using
instructions (e.g., MOV AX, DATA / MOV DS, AX ).
🔹 ASSUME only guides the assembler to generate the correct memory addresses during instruction
translation.
(ii) SEGMENT Directive

The SEGMENT directive defines the start of a logical segment.

The ENDS directive marks the end of that segment.

Example:

DATA SEGMENT
NUM DB 10, 20, 30
DATA ENDS

Here, a data segment named DATA is created.

🔹 Segment types may include CODE , DATA , and STACK .

🔹 The assembler groups instructions/data declared inside the segment into that specific memory
block.
🔹 Multiple segments allow structured and modular programming.
Difference in short

ASSUME SEGMENT

Maps segment registers to segments Creates a segment block

Only a directive for assembler Defines physical storage layout

Does not load registers Holds instructions/data

⭐ Instruction Format
An instruction format tells how an assembly instruction is represented in memory and how its fields are
organized.
It specifies:

Field Meaning

Opcode Operation to be executed (ADD, MOV, INC, etc.)

Operands Registers / Memory / Immediate values

Addressing Mode How the operand is accessed

 Field Meaning

Data Size Byte / Word

Displacement / Offset For memory operand addressing

General example format:

<Opcode> <Destination>, <Source>

Example:

MOV AX, [2000H]

Opcode = MOV → tells CPU action

Destination = AX
Source = memory at address 2000H

🔹 (i) ADC — Add with Carry

Meaning: Adds source + destination + carry flag (CF).
Used for multi-byte or multi-word addition.

Format

ADC DEST, SRC

Example

MOV AX, 7FFFH

MOV BX, 8000H
STC ; CF = 1
ADC AX, BX

Result

AX = 7FFFH + 8000H + 1 = 0000H (carry generated)

Flags Affected

CF ZF SF OF AF PF
 CF ZF SF OF AF PF

✔ ✔ ✔ ✔ ✔ ✔

🔹 (ii) LEA — Load Effective Address

Loads offset address (effective address) of a memory operand into a register.
It does not load the data itself.

Format

LEA REG, MEMORY

Example

ARRAY DB 10,20,30,40
LEA SI, ARRAY

SI gets offset of ARRAY, not its values.

Use Cases

Purpose Example

Pointer creation LEA BX, BUFFER

Address calculation LEA AX, [SI + DI + 10]

Used in high-level parameter passing LEA SP, VAR

Flags

❌ No flags affected

🔹 (iii) PUSH — Push Operand on Stack

Stores operand into the stack by decrementing SP by 2 and writing value at stack top.
Format

PUSH REG / MEMORY / SEGMENT

Example

PUSH AX

Stack Operation

If SP = 4000H:

SP = SP – 2 → 3FFEH
[3FFEH] ← AX (LSB/MSB depending on memory format)

Use Cases

Purpose Example

Saving registers PUSH BX

Subroutine parameter transfer PUSH NUM

Stack frame creation PUSH BP

Flags

❌ No flags affected

🔹 (iv) INC — Increment

Adds 1 to register or memory.
Useful for loop counters, index increment, iterative logic.

Format

INC OPERAND

Example
 INC BL

Flags Affected

CF ZF SF OF AF PF

❌ ✔ ✔ ✔ ✔ ✔

⚠ CF remains unchanged — major distinction from ADD.

🔹 (v) JNZ — Jump if Not Zero

Performs program control transfer depending on Zero Flag.

Format

JNZ LABEL

Working

Jump executes only if ZF = 0.

Example

MOV CL, 05
LOOP1: DEC CL
JNZ LOOP1

Loop continues while CL ≠ 0

When CL = 0 → ZF = 1 → exit loop

Use Cases

Purpose Example

Looping JNZ LOOP1

Comparing CMP AX, BX + JNZ

 Purpose Example

Searching JNZ NEXT

⭐ Summary Table for Revision

Instruction Operation Flags Typical Use

ADC Addition with carry All affected Multi-byte addition

Load effective Pointer and address

LEA None
address calculation

PUSH Store on stack None Save values / call function

INC Increment by 1 All except CF Counter / indexing

Depends on previous
JNZ Jump if ZF = 0 Loop and condition tests
instruction

⭐ Addressing Modes of 8086

Addressing mode refers to the method of specifying the operand (data) for an instruction. It tells the
processor where the operand is located — in a register, memory, or inside the instruction itself.

8086 supports the following major addressing modes:

🔹 1. Immediate Addressing Mode

The operand (data) is present directly in the instruction.

Example

MOV AX, 1234H

→ 1234H is the immediate data.

Use: For constants.

🔹 2. Register Addressing Mode
Operand is inside a CPU register.

Example

MOV BX, AX

AX contents are copied to BX.

Use: Fastest mode (no memory access).

🔹 3. Direct Memory Addressing Mode

Instruction contains the memory address (offset) explicitly.

Example

MOV AX, [5000H]

Reads data from memory location 5000H into AX.

Use: Accessing fixed memory locations.

🔹 4. Register Indirect Addressing Mode

A register holds the offset address of the operand.

Valid address pointer registers:

BX, BP, SI, DI

Examples

MOV AX, [BX]

MOV DL, [SI]

Use: Indexed arrays, pointers.

🔹 5. Base Addressing Mode
Content of base register (BX or BP) + displacement gives effective address.

Example

MOV AX, [BX + 2000H]

Use: Accessing structure fields.

🔹 6. Indexed Addressing Mode

Content of index register (SI or DI) + displacement gives effective address.

Example

MOV CL, [SI + 05H]

Use: Array access.

🔹 7. Base-Indexed Addressing Mode

Effective address = base register + index register

Example

MOV AX, [BX + SI]

Use: Multidimensional arrays.

🔹 8. Base-Indexed with Displacement Mode

Effective address = base register + index register + displacement

Example

MOV AX, [BP + DI + 02H]

Use: Dynamic data structure (record + index).

🔹 9. Relative Addressing Modes (for branching)

Offset added to instruction pointer (IP).

a) Relative Jump

JMP LABEL

New IP = IP + displacement.

b) Conditional Jump

JNZ NEXT

Jumps if ZF = 0.

🔹 10. Implied / Implicit Addressing Mode

Operand is implied in instruction; not written.

Examples

CLC ; clears carry flag

AAA ; adjusts AL

Operand is not specified — CPU knows it.

⭐ Summary Table (Memory-Friendly)

Mode Source of Operand

Immediate Inside instruction

 Mode Source of Operand

Register CPU register

Direct Direct offset in instruction

Register Indirect Address inside register

Base BX/BP + displacement

Indexed SI/DI + displacement

Base-Indexed BX/BP + SI/DI

Base-Indexed + Disp BX/BP + SI/DI + displacement

Relative Current IP + displacement

Implied Operand built-in

🔥 Marks Booster Tip

Remember valid registers:

Base registers Index registers

BX / BP SI / DI

And addressing expressions look like:

Direct: [5000H]
Base: [BX + disp]
Indexed: [SI + disp]
Base-Indexed: [BX + SI]
Base-Indexed + Displacement: [BP + DI + disp]

⭐ (i) XCHG — Exchange Instruction

Purpose

Swaps the contents of two operands without using a temporary register.

Allowed: Register ↔ Register, Register ↔ Memory
Not allowed: Memory ↔ Memory or Operand with immediate

Internal Working
 The microprocessor temporarily stores one operand internally
Copies the second operand into the first operand
Writes the temporary value back to the second operand

Flags Affected

❌ No flag is modified.
Example

MOV AX, 5000H

MOV CX, 1234H
XCHG AX, CX

Final result: AX = 1234H, CX = 5000H

Use cases

Implement swapping in algorithms

Register rotation in multiprecision calculations
Useful for semaphore operations in OS (atomic swap)

⭐ (ii) XLAT — Translate Table Lookup

Purpose

Used to fetch a byte from a lookup table and store it into AL.
Effective address calculated as:

Physical address = DS : (BX + AL)

Internal Working

1. AL contains an index
2. Processor computes effective address = BX + AL
3. Load the byte from that location into AL

Flags Affected
❌ No flag changes
Example

MOV AL, 03H ; index = 3

MOV BX, OFFSET TABLE
XLAT ; AL = TABLE[3]
TABLE DB 10H, 20H, 30H, 40H, 50H

Final result: AL = 40H

Use cases

ASCII/Unicode conversion table

Encryption/Decryption lookup
Display symbol mapping

⭐ (iii) DAA — Decimal Adjust AL After BCD Addition

Purpose

After adding two packed BCD numbers, DAA adjusts AL so the result is a valid BCD.

Internal Working

If lower nibble of AL > 9 or AF = 1

AL = AL + 06
Set AF = 1

If upper nibble of AL > 9 or CF = 1 after previous step

AL = AL + 60
Set CF = 1

Example

MOV AL, 45H

ADD AL, 38H ; AL = 7DH → invalid packed BCD
 DAA

Final result:

AL = 83H (valid packed BCD)

CF = 1, AF = 1

Use cases

Commercial arithmetic
Billing and accounting calculators
Decimal-based embedded systems

⭐ (iv) AAA — ASCII Adjust AL After Addition

Purpose

Used after adding two ASCII decimal digits (digits 0–9 encoded 30H–39H).
AAA converts the result into unpacked BCD.

Internal Working

If (AL & 0F) > 9 or AF = 1

AL = AL + 06
AH = AH + 1
AF = 1, CF = 1

Else

CF = 0, AF = 0

Finally:

AL = AL & 0F

Example

MOV AL, 39H ; '9'

ADD AL, 37H ; '7'
AAA
Final result after adjustment:

AL = 06H, AH increased by 1
Actual interpreted value = 16 decimal

Use cases

Digital calculators using ASCII input

Keyboard-based decimal arithmetic

🔥 Summary Table for Quick Revision

Instruction Operation Data Type Flags Main Use

No
XCHG Swap two operands Binary Fast swapping
change

No
XLAT Table lookup Binary Encoding/Mapping
change

Adjust packed BCD

DAA Packed BCD CF, AF Financial arithmetic
result

ASCII/Unpacked ASCII → decimal

AAA Adjust ASCII digit result CF, AF
BCD arithmetic

✅ 8086 ALP — Fibonacci Series (10 terms)

DATA SEGMENT
FIB DW 10 DUP(?) ; space for 10 Fibonacci numbers
DATA ENDS

CODE SEGMENT
ASSUME CS:CODE, DS:DATA

START:
MOV AX, DATA
MOV DS, AX

; Initialize first two terms

MOV AX, 0000H
 MOV BX, 0001H

MOV SI, OFFSET FIB ; SI points to array

MOV [SI], AX ; store 0
ADD SI, 2
MOV [SI], BX ; store 1
ADD SI, 2

MOV CX, 8 ; remaining (10 − 2) = 8 terms

NEXT_TERM:
MOV DX, AX ; DX = previous value
ADD DX, BX ; DX = next Fibonacci term

MOV [SI], DX ; store term

ADD SI, 2 ; move to next memory location

MOV AX, BX ; update previous

MOV BX, DX ; update current

LOOP NEXT_TERM

MOV AH, 4CH ; terminate program

INT 21H

CODE ENDS
END START

🔍 How it works
Register Purpose

AX (n−2)th Fibonacci number

BX (n−1)th Fibonacci number

DX nth Fibonacci number (temporary)

CX Loop counter (8 iterations)

SI Memory pointer to store series

Generated series stored in memory (DW):

0, 1, 1, 2, 3, 5, 8, 13, 21, 34