RAMESHWARAM INSTITUTE OF TECHNOLOGY & MANAGEMENT
Govindpuram, Opp. AKTU Campus, Sitapur Road, Lucknow, Uttar
Pradesh 226201
Pre University Test-1 (SESSION-: 2025-26)
Subject Name: Computer Organization and Architecture Subject Code: BCS
302
Branch: CSE Semester: 3rd
Time:-03:00 Hrs. Total Marks: - 70
SECTION:-A
Q.1. Attempt all parts. All parts carry equal marks. (2x7 = 14)
Part Question Course
Outcome
a List and briefly define the main structural components of a
computer.
b Design a 4-bit combinational incremental circuit using four full
adder circuits.
c Differentiate between Daisy chaining and centralized parallel
arbitration.
d Register A holds the binary values [Link] is the
register value after arithmetic shift right? Starting from the
initial number 10011101, determine the register value after
arithmetic shift left, and state whether there is an overflow.
e What are the different types of instruction formats?
f Write the difference between RISC and CISC.
g Perform the 2's complement subtraction of 101011 from 11100.
SECTION:-B
[Link] any three questions from this section. (7x3 =21)
Part Question Course
Outcome
a Explain 2-bit by 2-bit Array multiplier. Draw the flowchart for
divide operation of two numbers in signed magnitude form.
b A binary floating-point number has seven bits for a biased
exponent. The constant used for the bias is 64.
I. List the biased representation of all exponents from -64 to
+63.
II. Show that after addition of two biased exponents, it is
necessary to subtract 64 in order to have a biased exponent’s
RAMESHWARAM INSTITUTE OF TECHNOLOGY & MANAGEMENT
Govindpuram, Opp. AKTU Campus, Sitapur Road, Lucknow, Uttar
Pradesh 226201
sum.
III. Show that after subtraction of two biased exponents, it is
necessary to add 64 in order to have a biased exponent’s
difference.
c Show the multiplication process using Booth algorithm, when
the following binary numbers, (+13) x (-15) are multiplied.
d Draw a diagram of a Bus system in which it uses 3 state buffers
and a decoder instead of the multiplexers.
e Explain in detail multiple bus organization with the help of a
diagram.
SECTION:-C.
Q.3. Attempt any one question. (7x1 = 7)
Part Question Course
Outcome
a Write a program to evaluate arithmetic expression using stack organized
computer with 0-address instructions. X = (A-B) * (((C - D * E) / F) / G)
b Evaluate the arithmetic statement X = (A+B)*(C+D) using a general register
computer with three address, two address and one address instruction format
a program to evaluate the expression .
Q.4. Attempt any one question. (7x1 = 7)
Part Question Course
Outcome
a Draw a flowchart for adding and subtracting two fixed point binary numbers
where negative numbers are signed 1’s complement presentation.
b Explain the basic concept of Hardwired and Software control unit with neat
diagrams.
Q.5 Attempt any one question. (7x1 = 7)
Part Course
Outco
me
a Explain all the phases of instruction cycle.
b Draw a flowchart for adding and subtracting two fixed point binary numbers
where negative numbers are signed 1’s complement presentation.
Q.6 Attempt any one question. (7x1 = 7)
Part Question Course
Outcome
RAMESHWARAM INSTITUTE OF TECHNOLOGY & MANAGEMENT
Govindpuram, Opp. AKTU Campus, Sitapur Road, Lucknow, Uttar
Pradesh 226201
a What do you mean by processor organization? Explain various types of
processor organization.
b Explain IEEE standard for floating point representation. Represent the
number (1460.125)10 in single precision and double precision format.
Q.7 Attempt any one question. (7x1 = 7)
Part Question Course
Outcome
a Explain addressing Modes. Briefly explain different types of Addressing
Modes.
b Explain registers. Briefly explain different types of Registers.
END