College of Engineering and architecture
ECE Department
ECE 510
by: Engr. Norman V. Mabalot
An electronic device for storing and
processing data, typically in binary form,
according to a set of instructions given to it
The set of instructions are commonly known
as “programs”.
Essential Parts:
CPU – central processing unit
Memory – a storage for data
I/O – input and output interfaces
Block Diagram Functional Diagram
Calculator Mobile Phone GPS Unit Laptop Tablet
An solid-state, integrated circuit that essentially
contains almost all the functions of a central
processing unit of a computer.
Its main purpose is to process and manipulate data
in binary form
Needs external components to function properly
such memory/storage, I/O devices, etc.
CPU – central processing unit or MPU.
based on Application Segment (Computing Power)
Mainframe / Server / Supercomputer
Desktops / Workstations
Laptops / Notebook / Netbooks
PDA / Mobiles / Tablets
based on Function
Microprocessing unit (MPU) or Central Processing Unit (CPU)
Graphics/Visual processing unit (GPU/VPU)
Microcontrolling Unit (MCU)
Accelerated/Advanced Processing Unit (APU)
Network Processing Unit (NPU)
Digital Signal Processing Unit (DSP)
Physics Processing Unit (PPU )
based on Instruction Set
Reduced Instruction Set Computing (RISC)
Complex Instruction Set Computing (CISC)
Extendable Instruction Set Computing (EISC)
based on micro-Architecture
x86 Family
68k Family
MIPS Family
ARM Family
SPARC Family
Instruction Set Thermal Design Power
Micro-Architecture Fabrication Process
Clock Speed Packaging
Number of Cores Proprietary Technologies
Bus-Width Manufacturer
Cache size
Computing Performance
A system on chip (SoC ) is an integrated circuit (IC)
that integrates all components of a computer or
other electronic system into a single chip. It may
contain digital, analog, mixed-signal, and
often RF functions, and GPU – all on a single
chip substrate.
SoCs are very common in the mobile electronics
market because of their low power consumption. A
typical application is in the area of embedded
systems.
CPU: Apple A7 GPU: PowerVR SGX543
Bus width: 64-bit Bus width: 256-bit
Cores: Dual-core Cores: Tri-core
Clock: 1.3 GHz Clock: 266 MHz
Process: 28 nm
Micro-Architecture: ARM v8
Cache:128kB, 1MB, 4MB
Manufacturer: Samsung
iPhone 5s SoC (A7 CPU)
The world’s first
Microprocessor
INTEL 4004
(November 1971)
• Single core
• Max rated clock speed: 108 kHz
• 4-bit system bus
• 2,300 transistors
• 10 um technology
• DIP-16 package
• TDP = 630 mW
• Market Price: $1,500-$2,500 (Collector’s Item)
Actual size Processor Die Size = 12 [Link].
INTEL’s fastest
Desktop Processor
Core i7 4960X
(Sept. 2013)
• Max rated clock speed: 4.0 GHz
• Six (6) cores Front Back
• 64-bit
• 1.86 billion transistors
• 22 nm technology
• LGA-2011 package
• TDP = 130 Watts
• Market Price: $990 (as of May 2014)
Actual size Processor Die Size = 256.5 [Link].
INTEL’s fastest
Server Processor
Xeon E7-8890v2
(Feb. 2014)
• Max rated clock speed: 3.4 GHz
• Fifteen (15) cores Front Back
• 64-bit
• 4.31 billion transistors
• 22 nm technology
• LGA-2011 package
• TDP = 155 Watts
• Market Price: $6,840 (as of May 2014)
Not available
Actual size Processor Die Size = 541 [Link].
World’s fastest
Supercomputer
Tianhe-2 (China)
(as of June 2013)
Xeon E5 Xeon Phi
Processors:
32,000 x Intel Xeon E5-2692 (12-Core) 2.2GHz 115Watts TDP
48,000 x Intel Xeon Phi 31S1P (57-Core) 1.1 GHz 270Watts TDP
Performance:
33.6 PetaFlops
Power Consumption
17.8 MegaWatts
Memory Capacity
1,024,000 GB
Operating System
LINUX
Cost
$390 Million USD
INTEL® Xeon Phi™
Co-Processor Modules
Intel Xeon Phi 31S1P
57 Cores - 1.1 GHz - 270Watts TDP
How Powerful is the Tianhe-2?
• The Apple’s iPad 2, has a dual core A5
processor inside running at 1.0 GHz clock
speed. The A5 processor can deliver
around 170 megaflops of computing power.
• The Intel Core i7 980 EX used in high-end
desktop computers run at a maximum clock of
3.6 GHz and delivers a typical performance of
109 gigaflops.
COMPARISON
A5 processor 170 Megaflops You need
Intel Core i7 980 EX 109 Gigaflops 197.6 Million iPads
Tianhe-2 33.6 Petaflops to match the
Tianhe-2!
How to determine the computing
power of your Android device?
Use LINPACK Benchmark!
• It measures the system’s floating point computing power.
• Introduced by Jack Dongarra in 1979
• It solves a dense matrix using Gaussian elimination.
• The result is reported in MFLOPs.
• Used by the world’s Top 500 supercomputers for benchmarking.
• Evaluates the computer system as a whole.
• Does not primarily rely on processor performance.
LINPACK for: Windows, OSX, LINUX, etc. Just google it
Micro-processing unit (MPU) or “CPU”
Graphics/Visual processing unit (GPU/VPU)
Micro-controlling unit (MCU)
Accelerated/Advanced Processing Unit (APU)
Network Processing Unit (NPU)
Digital Signal Processing Unit (DSP)
Physics Processing Unit (PPU)
Etc.
A type of processor intended for general purpose
applications, where much of its function is
dedicated to the processing of data.
Comes in various packages w/ different
performance levels.
Commonly found in Computers / Servers.
MCH – Memory Controller Hub
also called NorthBridge (NB)
ICH – I/O Controller Hub
also called SouthBridge (SB)
DDR – double data rate SDRAM
GDDR – graphics DDR-SDRAM or
Video RAM (VRAM)
NB & SB = termed as “chipset”
Chipsets handle communications
functions between elements.
MCH+ICH = PCH (platform controller hub)
= FCH (fusion controller hub)
Interconnections
•Front Side Bus (FSB)
•Memory Bus
•PCIe Bus (formerly AGP , PCI)
•Direct Media Interface (DMI)
•SATA Bus
1. Graphics processing has been transferred to the Northbridge. (IGP)
2. The memory controller in the NB has been transferred to the CPU.
3. Graphics processing has been embedded in the CPU. (APU)
1st Evolution 2nd Evolution 3rd Evolution
Old IBM Laptop
Motherboard
Basic elements:
-CPU
-GPU w/ VRAM
-NB
-SB
An electronic device designed
primarily to control or
monitor other devices.
Typically contains some of
the essential components of a
computer system.
Can operate independently.
Has limited processing
capability compared to a
CPU.
Microchip Technology is an American manufacturer of
microcontrollers, memory and analog semiconductors.
The name PIC initially referred to "Peripheral Interface
Controller'" now it is "PIC'" only.
PIC uses a modified Harvard architecture MCU.
Microcontroller Products (PICmicro, dsPIC, PICxx)
PICKit -V1
Used for
programming via
USB interface to PC
OLD PIC EPROMS
A specialized electronic circuit
or device designed to rapidly
manipulate and alter memory
to accelerate the creation of
images in a frame buffer
intended for output to a given
display.
Usually directly connected to a
display which receives graphics
data from a computer system. 3 Ways of GPU implementation
Dedicated for graphics 1.) Discrete Graphics processor
processing only, although there 2.) Integrated Graphics processor (IGP)
is a new type called GPGPU, 3.) Embedded Graphics processor
where it can also be used for
data processing.
Pros: Offers the best performance since
there is a dedicated processing unit and
dedicated memory allocated specifically
for video processing.
Cons: Additional costs to the user. Nvidia GeForce™ GPU
ASUS Graphics Card using
GeForce™ processor
Pros: Usually offers the least cost to the user. Ideal for
basic computer usage. No need to buy discrete GPU.
Cons: Offers baseline performance, just enough to
handle light video processing. Video memory is
shared with the Main Memory. Therefore reducing
available physical memory of the system.
A processing unit that
includes additional
processing capability
designed to accelerate one
or more types of
computations.
APU = CPU + GPU
Typically contains a CPU
and GPU or GPGPU in one
physical device.
Cost-effective and more
efficient, although
performance is limited.
The Mali series of GPUs are semiconductor intellectual
property cores produced by British company ARM
Holdings for licensing in various ASIC designs.
The PowerVR graphics designs and patents by British
corporation, Imagination Technologies, and licensed to
Intel, BlackBerry, Samsung, Apple, and many others.
The Adreno series of GPUs are initially developed by ATI
Technologies, which was acquired by AMD in 2006. After
the buyout in 2008, Qualcomm renamed the product to
Adreno.
Vivante, an American fabless semiconductor company,
with an R&D center in Shanghai, China. GPU design was
used in tablets by Samsung and other manufacturers.
DMP or Digital Media Professionals Inc. is a Japanese
research and development fabless semiconductor vendor
engaged in licensing of hardware IP and software IP.
A computer processor specifically
designed to handle network-related
functions.
These little processors are typically
found on embedded systems, but
recently there have been moves to
bring them into the realm of personal
computers (PCs).
One example is a network card
(called KillerNIC) that's designed to
make gaming over the Internet faster.
Primarily operates on the Layer 3 of
the OSI model.
A specialized microprocessor with an architecture
optimized for the operational needs of digital signal
processing.
The goal of DSPs is usually to measure, filter and/or
compress continuous real-world analog signals.
The main applications of DSP are audio signal
processing, audio compression, digital image
processing, video compression, speech
processing, speech recognition, digital
communications, RADAR, SONAR, seismology and
biomedicine, etc.
Designed to handle the
calculations of physics,
especially in the physics
engine of simulation, rendering,
and modelling applications.
Calculations involving a PPU
includes rigid body
dynamics, soft body
dynamics, collision
detection, fluid dynamics, hair
and clothing simulation, finite
element analysis, and fracturing
of objects, etc.
Ageia's PhysX™ PPU
With the latest development in the manufacturing and processing
technology, we expect that soon, there will be more specific and dedicated
MPU/MCU for each computing task at hand.
Example:
ECU (engine control unit)
1. Control of Air/Fuel ratio
2. Control of ignition timing
3. Control of idle speed
4. Control of variable valve timing
5. Electronic valve control
Toyota Fortuner™ ECU
A system on a chip or system on chip (SoC
or SOC)
is an integrated circuit (IC) that integrates all
components of a computer or other
electronic system into a single chip.
It may contain digital, analog, mixed-signal,
and often radio-frequency functions—all on a
single chip substrate.
QUALCOMM®
a "fabless" semiconductor company based
in San Diego, California, USA.
Snapdragon™ is a family of
mobile systems on a chip (SoC)
by Qualcomm.
The original Snapdragon CPU,
dubbed Scorpion, is Qualcomm's own
design. It has many features similar to
those of the ARM Cortex-A8 core and it is
based on the ARMv7 instruction set.
Snapdragon™ 200 Series
8110, 8210, 8610, 8112, 8212, 8612, 8225Q and 8625Q
Snapdragon™ 400 Series
8026, 8028, 8228, 8628, 8928, 8926, 8030AB, 8226, 8230,
8230AB, 8626, 8630, 8630AB, 8930 and 8930AB, 8916
Snapdragon™ 600 Series
8939, APQ8064T, APQ8064AB, APQ8064M, 8064-AU
Snapdragon™ 800 Series
8074-AA, 8274-AA, 8674-AA, 8974-AA, 8974-AB, 8074-AB,
8274-AB, 8274-AC, 8674-AB, 8974-AB, 8974-AC,
APQ8084, MSM8992, MSM8994
CPU: Krait®
GPU: Adreno®
DSP: Hexagon®
MSM8928 MSM8926 MSM8226 MSM8930 MSM8930 MSM8226
Adreno 305 Adreno 305 Adreno 305 Adreno 305 Adreno 305 Adreno 305
MEDIATEK®
MediaTek Inc. is a fabless semiconductor
company that provides system-on-
chip solutions.
Headquarters in Hsinchu, Taiwan, the company
has 25 offices worldwide and is one of the top 25
semiconductor suppliers globally by sales
volume.
On February 25, 2014, MediaTek announced the
industry’s first 5-in1 Wireless SoC MT6630:
Wi-Fi 802.11 a/b/g/n
Bluetooth/LE 4.1
ANT, ANT+
GNSS/GPS Navigation
FM transceiver
CPU: MT6572 (28 nm, 1.2 GHz, Dual-Core, ARMv7)
GPU: Mali400-MP1
Used in:
A. Alcatel One Touch Idol Mini
B. Acer Liquid Z5
C. Huawei Ascend Y320
D. Lenovo A316i
E. iconBit Callisto-100
IconBit Callisto-100
A B C D Android™ Smart Watch
NVidia®
an American technology company based
in Santa Clara, California.
Nvidia manufactures graphics processing
units (GPUs), as well as system-on-chip units
(SOCs) for the mobile computing market.
Noted for their GPUs used in Microsoft’s Xbox
and Sony’s PS3.
PRODUCTS
• GeForce, for discrete and integrated gaming graphics processing units.
• Quadro, CAD and digital content creation workstation graphics processing products.
• Tegra, a system on a chip series for mobile devices.
• Tesla, dedicated GP-GPU for high-end image applications in professional fields.
• nForce, a motherboard chipset created for AMD and INTEL microprocessors.
CPU: Tegra-3 T30 (40 nm, 1.4 GHz, Quad-Core, ARMv7)
GPU: GeForce ULP (12-core GPU, ultra-low power)
Used in:
A. Asus Eee Pad Transformer
B. Acer Iconia Tab A510
Parts of the Asus Eee Pad Transformer
Other SoC makers:
OMAP by Texas Instruments
used in: Lenovo IdeaPad A1, Nokia N950,etc.
Exynos by Samsung
used in: Galaxy Note 3, Galaxy S4, etc. (exclusive)
Ax by Apple (i.e. A4, A5, A6, A7)
used in: iPhone, iPad (exclusive)
NovaThor by ST-Ericsson
used in: Sony Xperia P, Galaxy Ace 2, Motorola XT760
Atom by Intel
used in: Lenovo K800, Acer Iconia W4, Motorola RAZR-i
[Link] by Freescale Semiconductor
used in: Fujitsu M350/CA2 Tablet
RK3 by Rockchip
used in: Asus MemoPad 10, Toshiba Excite 7
,
Research the following data, on a specific
Mobile Device: (include photo)
Fill-up the information required in the table
at the right (don’t leave any item blank)
based on Instruction Set
Reduced Instruction Set Computing (RISC) *
Complex Instruction Set Computing (CISC) *
Extendable Instruction Set Computing (EISC)
Minimal Instruction Set Computing (MISC)
Zero Instruction Set Computing (ZISC)
One Instruction Set Computing (OISC)
Etc.
RISC and CISC are the most common and widely used
architectures today, and hence the differences between
CISC and RISC architectures will be the only focus in this course.
Answer: It is a set of instructions that specifies a
processor’s functionality:
• what operations and instructions it supports
• what storage mechanisms are used & how they are accessed
• how the programmer/compiler communicates programs
The instruction set architecture (ISA), is the part of
the processor architecture related to programming.
An ISA includes a specification of the set of operation
codes (op-codes for machine language programming) and/or
the native commands implemented by a particular processor.
Parts of the ISA include: data types, instructions,
registers, addressing modes, memory
architecture, interrupt and exception handling,
and external I/O.
Different processors have different ISAs.
Processors that have a common set of instructions
are known to be part of the same FAMILY.
Example: x86 Family, ARM Family, 68k Family, etc.
A machine language program written for the x86
family will NOT directly run on an ARM processor.
Implementability
• supports a range of implementations (efficient)
• support for high performance implementations
Programmability
• easy to express programs (for human and/or compiler)
Compatibility (backward/forward)
• implementability & programmability across generations
• e.g. x86 generations: 8086, 80186, 80286, 80386, 80486, Pentium,..
INTEL 8086 AMD 8086
Microarchitecture is the manner in which a given instruction set
architecture (ISA) is implemented on a processor on the hardware
level.
A given ISA may be implemented with different microarchitectures.
Implementations may vary due to different goals of a given design
or due to shifts in technology.
INTEL ® CORE µArchitecture INTEL ® NEHALEM µArchitecture
The discussions and debates about CISC and RISC
have been very famous among computer scientists
and engineers from 1980s until today.
The reason is that both of these architectures have
advantages and disadvantages.
CISC architecture has a very rich and different set
of commands to accomplish different tasks and has
some very complex instructions (such as powers,
square roots, etc.), whereas in RISC architecture, it
has a very narrow set of commands. (such as add,
subtract, divide, etc.)
Question: Which is better? It’s Complicated!
Answer:
The x86 instruction set architecture is a
native CISC design.
But, todays x86 processor microarchitectures
are internally RISC designed.
The CISC instructions are translated into RISC
instructions before execution. Therefore,
today’s x86 processors are both RISC and
CISC at the same time.
For a PROCESSOR:
Primary Factors that affect computing performance:
1.) Instruction Set Architecture
2.) Processor Clock Speed
3.) Application or Program
For a COMPUTER SYSTEM:
Primary Factors that affect overall system performance:
1.) Computing Performance (CPU)
2.) Memory Latency and Bandwidth (RAM/ROM)
3.) Input and Output Throughput (I/O)
Which among the three processor models runs faster:
a.) using Program A?
b.) using Program B?
based on micro-Architecture
x86 Family
68k Family
MIPS Family
ARM Family
SPARC Family
The term Von Neumann architecture, is an architecture derived from the
1945 computer architecture description by the mathematician and physicist
John von Neumann .
The Harvard architecture originated from the Harvard Mark I relay-based
computer. It has a separate physical storage and signal pathways for
instructions and data.
von Neumann architecture
CPU cannot read an instruction and
read/write data from/to the memory at
the same time since the instructions
and data use the same bus system.
Harvard architecture
CPU can both read an instruction and
perform a data memory access at the
same time. Widely used in DSP and
MCU.
In computer engineering, computer architecture is the
conceptual design and basic operational structure of a
computer system.
It is a blueprint and functional description of requirements and
design implementations for the various parts of a computer —
focusing largely on the way by which the CPU performs internally
and accesses addresses in memory.
It may also be defined as the science and art of selecting and
interconnecting hardware components to create computers that
meet functional, performance and cost goals.
Computer architecture comprises of three main subcategories:
Instruction Set Architecture √ (discussed)
Microarchitecture √ (discussed)
System Design x (not yet)
System Design includes all of the hardware components within a
computer system such as:
▪ system interconnects (such as computer buses and switches)
▪ memory controllers and hierarchies (such as main memory and caches)
▪ CPU off-load mechanisms (such as direct memory access)
▪ multi-processing and multi-threading (such as parallel computing)
Once both ISA and microarchitecture has been specified, the actual device
needs to be designed into hardware.
This system design process is also called implementation.
Implementation is therefore considered as hardware design engineering.
For CPUs, the entire implementation process is often called CPU design.
Design Goals:
1.) Power Consumption (watts per FLOP)
2.) Performance (bandwidth vs. latency)
Latency - a measure of the time delay Example:
experienced by a system. (seconds)
Bandwidth – the maximum
theoretical rate at which data is
transmitted. (bits per second)
Throughput - rate of successful data
delivery over a communication
channel. (bits per second)
The efficiency of a transmission system
can be determined by knowing its
maximum throughput and minimum
latency.
Latency (T) is a function of distance.
T = s / c where s: distance Tx to Rx
c: speed of signal
Logic Implementation/Design - where the blocks that
were defined in the microarchitecture are implemented
as logic equations or as logic gates.
Circuit Implementation/Design - where speed critical
blocks or logic equations or logic gates are implemented
at the transistor level.
Physical Implementation/Design - where the circuits
are drawn out, the different circuit components are placed
in a chip floor-plan or on a board and the wires connecting
them are routed.
The 68K family of CISC microprocessor chips are
originally designed by Motorola.
They were the primary competition for the Intel x86
family of chips in personal computers of the 1980s
and early 1990s.
Macintosh™ , Apple’s PC used the 68k family in
their line of computers in the 1980s.
Although no modern desktop computers are based on
the 68k family, derivative processors are still widely
used in embedded applications.
Later on, the 68k family has evolved and were
known as the PowerPC Family.
Steve Jobs introducing the Mac-PC
in 1983 w/c uses the 68000 CPU
PowerPC (Performance Optimization With Enhanced RISC – Performance Computing)
is a RISC instruction set architecture created in 1991 by the Apple–IBM–Motorola alliance
known as AIM.
PowerPC, as an evolving instruction set, was also known as Power Architecture based
processors.
Originally intended for personal computers, PowerPC CPUs have since become popular
as embedded and high-performance processors.
Well known for being used by Apple's Macintosh lines from 1994 to 2006 (before Apple's
transition to Intel).
It is used in video game consoles (XBox360, Wii, PS3) and other embedded applications.
Used in ECU (engine control units) of Ford, Volvo, Jaguar, etc.
SPARC (Scalable Processor ARChitecture) is a RISC microprocessor instruction set
architecture originally designed in 1985 by Sun Microsystems.
SPARC is a registered trademark of SPARC International, Inc., an organization
established in 1989 to promote the SPARC architecture.
SPARC architecture has been licensed to several manufacturers, including Texas
Instruments, Cypress Semiconductor, and Fujitsu. As a result of SPARC International,
the SPARC architecture is fully open and non-proprietary.
The current K supercomputer, built for the
Japanese government uses the Sparc64-
VIIIfx processors, which runs at 2GHz and
delivers a total of 10.5 petaflops.
China’s Tianhe-1A supercomputer, uses:
• 14,336 Intel Xeon processors
• 7,168 Nvidia Tesla processors
• 2,048 SPARC processors
MIPS stands for Microprocessor without Interlocked Pipeline
Stages, is a RISC microprocessor architecture developed by MIPS
Technologies.
MIPS designs are used in many embedded systems such as the Series2
TiVo, Windows CE devices, Cisco routers, and video game consoles like
the Nintendo 64 and Sony PlayStation, PlayStation 2, and PlayStation
Portable handheld system.
MIPS Technologies was acquired December, 17th 2012 by Imagination
Technologies, maker of the PowerVR GPU designs used in the mobile
industry and started designing SoCs for the mobile market.
• The ARM architecture (Acorn / Advanced RISC Machine) is a
RISC processor architecture developed by ARM Holdings
Limited that is widely used in a number of embedded designs.
• Because of their power saving features, ARM CPUs are
dominant in the mobile electronics market, where low power
consumption is a critical design goal.
• Today, the ARM family is one of the most prolific CPU
architectures in the world. (Apple A7™, Samsung Exynos™)
ARMv7, that defines the architecture for the first of the Cortex
series of cores, defines three architecture "profiles":
• A-profile, the "Application" profile: Cortex-A series
• R-profile, the "Real-time" profile: Cortex-R series
• M-profile, the "Microcontroller" profile: Cortex-M series
The x86 term refers to the CISC type instruction set architecture of the most
commonly used and commercially successful CPUs in the history of personal
computing from Intel, AMD, and others.
As a generic name, it derived from the brands of the first few generations of
processor, backwards compatible with the original 16-bit 8086 of 1978.
The only significant competitors to x86 in PCs were the Motorola 68k, CISC Desktop
type, and the PowerPC, RISC type, instruction sets.
However, by August 7, 2006, Apple Inc. switched to x86 CPUs granting the
x86 an effective monopoly among desktop and mobile processors.
Microsoft’s Xbox One and Sony’s PlayStation 4 use AMD’s x86 CPU and GPU
cores.
The x86 is supported by nearly all modern commercial operating systems,
Laptop
from DOS and Windows to Linux, BSD, Solaris, and Mac OS X.
Microsoft Xbox One Sony PlayStation 4 Apple Mac PC Server
In computer science, the kernel is the
central component of most computer
Operating Systems (OS).
Its responsibilities include managing the
system's resources (the communication
between hardware and software
components).
It provides the lowest-level abstraction
layer for the resources (especially
memory, processors and I/O devices) that
application software must control to WINDOWS®
perform its function.
These tasks are done differently by
different kernels, depending on their
design and implementation.
- Monolithic kernels
- Microkernels
- Hybrid kernel
- Nanokernels
- Exokernels
BSD LINUX ANDROID OSX
Flynn's taxonomy is a classification of computer architectures, proposed by Michael J.
Flynn in 1966.
Single Instruction, Single Data stream (SISD) A sequential computer which exploits no
parallelism in either the instruction or data streams. Single control unit (CU) fetches
single Instruction Stream (IS) from memory. The CU then generates appropriate control
signals to a direct single processing element (PE) to operate on single Data Stream (DS)
i.e. one operation at a time. Examples include old PC and mainframes.
Multiple Instruction, Single Data stream (MISD) Multiple instructions operate on a
single data stream. Uncommon architecture which is generally used for fault tolerance.
Heterogeneous systems operate on the same data stream and must agree on the result.
Examples include the Space Shuttle flight control computer.
Von Neumann Parallel Computing
• Single Instruction, Multiple Data streams (SIMD) A computer which exploits multiple
data streams against a single instruction stream to perform operations which may be
naturally parallelized. For example, an array processor or GPU.
• Multiple Instruction, Multiple Data streams (MIMD) Multiple autonomous processors
simultaneously executing different instructions on different data. Distributed systems
are generally recognized to be MIMD architectures; either exploiting a single shared
memory space or a distributed memory space. A multi-core superscalar processor is an
example.
Graphics Processing General Purpose
GPU Computing
Supercomputers