Chapter 1
80x86 Microprocessor
Dr. Ashraf Fahmy
Dr. Ashraf Fahmy
The CPU clock rate, or clock speed, measures how many cycles a CPU can complete per
second, typically in gigahertz (GHz). A higher clock rate means the CPU can execute more
instructions in the same amount of time, leading to faster performance for tasks
Modern CPUs typically have clock rates ranging from approximately 2.5 GHz to over 6.0
GHz for high-end processors, though this varies based on the model and purpose.
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Evolution from 8080/8085 to 8086
• 16 bit data (Internal/ External)
– All registers are 16 bits wide
• 16-bit data bus
• 20 bits Address -> 1 MB memory
• Pipelined
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INSIDE THE 8088/86
BIU: Fetch the instructions
EU: Execute the instructions
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Pipelining
• 8085 could fetch or execute at any given time.
– The idea of pipelining in its simplest form is to allow the
CPU to fetch and execute at the same time.
Pipelined vs Nonpipelined Execution
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Registers
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Registers
• General-purpose registers: AX,BX,CX,DX
accessed as either 16/8bit registers
– All other registers can be accessed only as the full 16bits.
• Data types are either 8 or 16 bits
– To access 12-bit data, for example, a 16-bit register must
be used with the highest 4 bits set to 0.
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Registers
• The bits of a register are numbered in descending
order, as shown:
• The first letter of each register indicates its use.
– AX is used for the accumulator.
– BX is a base addressing register.
– CX is a counter in loop operations.
– DX points to data in I/O operations.
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ASSEMBLY PROGRAMMING
• Assembly language :low-level language
– deals directly with the internal structure of the CPU.
– Translated by assembler.
• Programming languages, such as C/C++, BASIC, C#,
etc.
– high-level languages
– Does not have to be concerned with internal CPU details.
• High-level languages :translated by a compiler.
• Many assemblers are available like MASM
• DEBUG Programming.
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ASSEMBLY PROGRAMMING
• Assembly instruction
– a mnemonic, optionally followed by one or two operands.
– Operands are the data items being manipulated.
– Mnemonics are commands to the CPU, telling it what to
do with those items.
• Two widely used instructions are move & add.
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MOV instruction
•The MOV instruction copies data from one location
to another, using this format:
• MOV DX,CX
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MOV instruction
Use 8 bits only
Or 16 bits
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MOV instruction
• You can use any register(Except the flag register.)
– There is no such instruction as "MOV FR,AX“.
• Code such as "MOV AL,DX" will cause an error.
– One cannot move the contents of a 16-bit register
into an 8-bit register.
Also MOV DX, AL will cause an error. Why?
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MOV instruction
• MOV values into non-segment registers only.
– (CS, DS, ES, or SS)
Load it to a non-segment register, then move it to the segment register
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MOV instruction
• "MOV BX,5" the result will be BX = 0005.
• BH = 00 and BL = 05.
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ADD instruction
• The ADD instruction has the following format:
• ADD tells the CPU to add the source & destination
operands and put the result in the destination.
– To add two numbers such as 25H and 34H, each can
be moved to a register, then added together:
– Executing the program above results in:
AL = 59H (25H + 34H = 59H) and BL = 34H.
• The contents of BL do not change.
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ADD instruction
• You can use value directly
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ADD instruction
• Any 16-bit nonsegment registers could have been
used
• 16 bits example
– Running the program gives DX = 9F3H.
• (34E + 6A5 = 9F3) and AX = 34E.
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PROGRAM SEGMENTS
• A typical Assembly language program consists of
at least three segments:
– A code segment (CS)
– A data segment (DS)
– A stack segment (SS)
– Sometimes Extra segment (ES)
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Logical address vs physical address in the CS, DS,ES,SS
The Logical Address is the address in the form:
XXXX:YYYY
XXXX: is the segment address
YYYY: is the offset inside the segment i.e is a location within a 64KB-byte
In the code segment CS, IP hold the logical address of the instructions to be executed
CS: IP Logical address
CS holds segment address, IP holds the offset
Data segment (DS), and Extra Segment (ES) uses only BX, DI, SI to hold the
offset address of data
Stack segment (SS), uses only SP, BP to hold the offset address of data
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Code segment
• Calculate the physical address of an instruction:
– The microprocessor will retrieve the instruction from
memory locations starting at 2E5F3.
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Code segment
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Examples
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Examples
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578C0+ 0000= 578C0, 578C0+FFFF=678BF
What value should be assigned to DS if the offset must be 10F6
Solution:
67F66-10F6= 66E70
DS=66E7
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Extra segment (ES)
• ES is a segment register used as an extra data
segment.
– In many normal programs this segment is not used.
– Use is essential for string operations.
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Wrap-around
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Overlapping
It is possible that two segments can overlap, which is desirable in some applications. (COM files)
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Logical address and physical address
• Can a single physical address belong to many
different logical addresses?
– Observe the physical address value of 15020H.
• Many possible logical addresses represent this single
physical address:
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Code segment logical/physical address
1132: 0115
Instruction "MOV AL,57" has a machine code of B057.
B0 is the opcode and 57 is the operand.
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Code segment logical/physical address
Instruction "MOV AL,57" has a machine code of B057. B0 is the
opcode and 57 is the operand.
The byte at address 1132:0100 contains B0, the opcode for moving
a value into register AL.
Address 1132:0101 contains the operand to be moved to AL.
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THE STACK
what is a stack? why is it needed?
• The stack is a section of read/write memory (RAM)
used by the CPU to store information temporarily.
– The CPU needs this storage area since there are only a
limited number of registers.
• The main disadvantage of the stack is access time.
– Since the stack is in RAM, it takes much longer to
access compared to the access time of registers.
• Some very powerful (expensive) computers do not
have a stack.
– The CPU has a large number of registers to work with.
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THE STACK
how stacks are accessed
• The stack is a section of RAM, so there must be
registers inside the CPU to point to it.
– The SS (stack segment) register.
– The SP (stack pointer) register.
• Every register can be stored in the stack, and
brought back, except segment registers and SP.
– Push: Data are moved from Register to memory
– Pop: Data are moved from Memory to register
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THE STACK
how stacks are accessed
• stack pointer register (SP) points at the top of the
stack.
– As data is pushed onto the stack, SP is decremented.
– As data is popped off the stack into the CPU, it is
incremented.
• General-purpose register, it must be the entire 16-
bit register. 1000
1001 IP
Note 1002
– One must code "PUSH AX". 1003
• "PUSH AL" or "PUSH AH“:INVALID ….
100D SP
100E
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THE STACK
pushing onto the stack
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EX. 1-7
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THE STACK
logical vs physical stack address
– Windows assigns values for the SP and SS.
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FLAG REGISTER (status register)
• Six flags, called conditional flags, indicate some
condition resulting after an instruction executes.
– These six are
– The remaining three, often called control flags, control
the operation of instructions before they are
executed.
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FLAG REGISTER
bits of the flag register
– CF (Carry Flag) - Set when there is a carry out, from d7
after an 8-bit operation, or d15 after a 16-bit operation.
• Used to detect errors in unsigned arithmetic operations.
– AF (Auxiliary Carry Flag) - If there is a carry from d3 to
d4 of an operation, this bit is set; otherwise, it is cleared.
• Used by instructions that perform BCD (binary coded decimal)
arithmetic.
– PF (Parity Flag) - After certain operations, the parity
of the result's low-order byte is checked.
• If the byte has an even number of 1s, the parity flag is set to 1;
otherwise, it is cleared.
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FLAG REGISTER
bits of the flag register
– ZF (Zero Flag) - Set to 1 if the result of an arithmetic or
logical operation is zero; otherwise, it is cleared.
– SF (Sign Flag) - Binary representation of signed
numbers
uses the most significant bit as the sign bit.
• After arithmetic or logic operations, the status of this sign bit is
copied into the SF, indicating the sign of the result.
– OF (Overflow Flag) - Set when the result of a signed
number operation is too large, causing the high-order bit
to overflow into the sign bit.
• Used only to detect errors in signed arithmetic operations.
• A negative result out of positive operands (or vice versa)
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FLAG REGISTER
bits of the flag register
– IF (Interrupt Enable Flag) - This bit is set or cleared to
enable/disable only external maskable interrupt
requests.
– DF (Direction Flag) - Used to control the direction of
string operations.
– TF (Trap Flag) - When this flag is set it allows the
program to single-step, meaning to execute one
instruction at a time.
• Single-stepping is used for debugging purposes.
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FLAG REGISTER
flag register and ADD instruction
• Flag bits affected by the ADD instruction:
– CF (carry flag); PF (parity flag); AF (auxiliary carry flag).
– ZF (zero flag); SF (sign flag); OF (overflow flag).
OF=0: since no change in the sign bit
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FLAG REGISTER
flag register and ADD instruction
OF=0
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FLAG REGISTER
flag register and ADD instruction
• 16-bit operations
– The parity bit only counts the lower 8 bits
OF=0
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FLAG REGISTER
flag register and ADD instruction
•Instructions such as data transfers (MOV) affect no
flags.
OF=0
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ADDRESSING MODES
• The x86 provides seven distinct addressing modes:
– 1 - Register – 5 - Based relative
– 2 - Immediate – 6 - Indexed relative
– 3 - Direct – 7 - Based indexed relative
– 4 - Register indirect
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Register addressing mode
Memory is not accessed, so it is relatively fast.
• Examples of register addressing mode:
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How to put 1234H in AX?
MOVAX,BX
1234H
BX AX
Register addressing mode
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Immediate addressing mode
The source operand is a constant.
•This mode can be used to load information into
any of register except the segment and flag
registers.
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How to put 1234H in AX?
1234H MOVAX, 1234H
AX
Immediate addressing mode
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Direct addressing mode
• The address of the operand is an offset address.
– Calculate the physical address by shifting left the DS
register and adding it to the offset:
• Note the bracket around the address.
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Data segment
• Assume data segment offset begins at 200H.
– The data is placed in memory locations:
– The program can be rewritten as follows:
It is called Direct addressing mode
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Register indirect addressing mode
– The registers used for this purpose are SI, DI, and BX.
•Combined with DS to generate the physical
address.
– Notice that BX is in brackets.
– The physical address is calculated by shifting DS
left one hex position and adding BX to it.
• The same rules apply when using register SI or DI.
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Little endian convention
• The low byte goes to the low memory location and
the high byte goes to the high memory address.
– Memory location DS:1500 contains F3H.
– Memory location DS:1501 contains 35H.
• (DS:1500 = F3 DS:1501 = 35)
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How to put 1234H in AX?
MOV AX,[200]
34H
DS:0200
12H
DS:0201
DS:0202
AX
Direct addressing mode
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Data segment
• To avoid address change, BX is used as a pointer:
• It called Register indirect
– "INC BX" achieves the same result as "ADD BX,1“
– If the offset address where data is located is changed,
only one instruction will need to be modified.
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Based relative addressing mode
– Alternatives are CX,[BX+10]" or "MOV
"MOV CX,10[BX]"
• In the case of the BP register: (Use SS)
– Alternatives are "MOV AL,[BP+5]" or "MOV
AL,5[BP]".
• BP+5 is called the effective address since the fifth byte from the
beginning of the offset BP is moved to register AL.
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Indexed relative addressing mode
• The indexed relative addressing mode works the
same as the based relative addressing mode.
– Except that registers DI & SI hold the offset address.
45000
2100
20
47120
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Based indexed addressing mode
– One base register and one index register are used.
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Summary
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FLAG REGISTER
use of the zero flag for looping
• As an example, to add 5 bytes of data, a counter
can be used to keep track of how many times the
loop needs to be repeated.
– Each time the addition is performed the counter
is decremented and the zero flag is checked.
• When the counter becomes zero, the zero flag is set (ZF =
1) and the loop is stopped.
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FLAG REGISTER
use of the zero flag for looping
• Register CX is used to hold the counter.
– is the offset pointer.
• (SI or DI could have been used instead)
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FLAG REGISTER
use of the zero flag for looping
• AL is initialized before the start of the loop
– In each iteration, ZF is checked by the JNZ instruction
• JNZ stands for "Jump Not Zero“, meaning that if ZF = 0,
jump to a new address.
• If ZF = 1, the jump is not performed, and the instruction
below the jump will be executed.
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FLAG REGISTER
use of the zero flag for looping
• instruction must come immediately after the
instruction that decrements
– JNZ needs to check the effect of "DEC CX" on ZF.
• If any instruction were placed between them, that instruction
might affect the zero flag.
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