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8085 Instruction Set Overview

The document provides a comprehensive overview of the 8085 instruction set, detailing data transfer, arithmetic logical, logical, forking, and subroutine instructions. Each instruction is accompanied by a brief explanation of its function and usage. This serves as a reference for understanding how to manipulate data and control flow in programs using the 8085 microprocessor.
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0% found this document useful (0 votes)
2 views3 pages

8085 Instruction Set Overview

The document provides a comprehensive overview of the 8085 instruction set, detailing data transfer, arithmetic logical, logical, forking, and subroutine instructions. Each instruction is accompanied by a brief explanation of its function and usage. This serves as a reference for understanding how to manipulate data and control flow in programs using the 8085 microprocessor.
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

8085 Instruction Set

Data transfer instructions:

Instruction Explanation
MOVE r1, r2 Load register r1(DDD) with the content of r2(RRR).
MOVE r, M Load register r(DDD) with the content of the address pointed to in the pair
HL.
MOVE M, r Load the address pointed by HL with the content of the register r(RRR).
MVI r Load the register r immediately with the 2nd Byte of the instruction.
MVI M Load the address pointed by HL with the 2nd Byte of the instruction.
LXI rp Load the register pair rp (will be BC, DE, HL) with the 2nd and 3rd Byte of the
. instruction
LDA Load the accumulator with the contents of the address pointed to in the 2nd and 3rd.
Instruction byte.
STA Load the position pointed to by the 2nd and 3rd Byte of the instruction with
contents of the accumulator.
LHLD Load the HL registers with the contents of the address pointed to by the 2nd and 3rd.
Byte (load L) and by the pointed 4th and 5th Byte (load H) of the instruction.
SHLD Store the content of HL in the position indicated by the 2nd and 3rd Byte and the
next respectively.
LDAX rp Load the accumulator with the content of the address pointed by the pair
rp records (RR) only for even BC and DE records
XCHG Swap the content of the HL pair with the content of the DE pair.

Arithmetic Logical Instructions:

Instruction explanation

ADD r Add the register r to the accumulator and the result stays in the accumulator.
ADD M Add to the accumulator the content of the position pointed to by HL and
result in accumulator.
ADI Add the 2nd byte of the instruction to the accumulator and store the result in the accumulator.
ADC r Add the register r and the carry to the accumulator, result in accumulator.
ADC M Add to the accumulator the content of the position pointed by HL and the carry,
result in accumulator.
ACI Add the 2nd byte of the instruction and the carry to the accumulator and the result in
accumulator.
SUB r Subtracts the content of register r from the accumulator and leaves it in the accumulator.
SUB M Subtract from the accumulator the content of the position pointed to by HL and the result
to the accumulator.
SUI Subtract from the accumulator the 2nd byte of the instruction.
SBB r Subtract from the accumulator the register r plus the carry.
SBB M Subtract from the accumulator the content of the position pointed to by HL.
SBI Subtract the 2nd byte + the carry from the accumulator.
INR r Increment the record r.(Z;S;P;AC) by 1
INR M Increment the content of the position pointed by HL by 1 (Z;S;P;AC)
DCR r Decrement the register r (Z;S;P;AC) by 1
DCR M Decrease by 1 the content of the position pointed to by HL (Z;S;P;AC)
INX rp Increase the par rp of records by 1. BC, DE, HL
DCX rp Decrement the pair rp of registers BC, DE, HL by 1.
DAD rp Add to HL the pair of registers rp (CY sometimes).
DAA The 8 bits of the accumulator are adjusted to BCD=decimal.(flags)
Logical instructions:

Instruction Explanation

ANA r AND between the accumulator and the register r (flags, CY=0, AC=1)
ANA M AND between the accumulator and the content of the position pointed by
HL(flags same)
ANI AND between the accumulator and the 2nd byte of the instruction (flags same)
XRA r OR Exclusive between the accumulator and register r (flags, CY and AC=0)
XRA M Or exclusive between the accumulator and the content of the position of
HL(same flags)
XRI OR Exclusive between the accumulator and the 2nd byte of the instruction (flags
same thing)
ORA r OR between the accumulator and the register r (flags alike)
ORA M OR between the accumulator and the contents of the position pointed to by
HL (same flags)
ORI OR between accumulator and 2nd byte of the instruction (same)
CMP r Compare the accumulator with register r without altering the content of the
accumulator(if A=1 Z=1, if A<r CY=1, flags)
CMP M Compare the accumulator with the content of the position pointed to by HL
(flags same)
CPI Compare the accumulator with the 2nd byte of the instruction (same)
RLC Rotation of the accumulator content one place to the left (flags, CY and ...
bit 0 = value of bit 7 of the accumulator)
RRC Rotation of the accumulator content one place to the right (flags, CY and
bit 7 = bit 0 of the accumulator
RAL Accumulator rotation one place to the left interleaving the CY (CY)
RAR same as before but to the right (CY)
CMA Bit by bit, complement the accumulator's content.
CMC Complete the content of the carry CY(CY)
STC Set CY to 1 (CY)

Forking Instructions:

Instruction Explanation

Jump to the position indicated by the 2nd and 3rd byte of the instruction, 2nd byte=part
JMP
baja,3º=alta
Jump to the position indicated in the 2nd and 3rd byte of the instruction if the flag (FF)
JZ Z
it has value 1
JC CY
JPE P
JM S
JNZ Z the same if the value of the Flag is zero
JNC CY
JPO P
JP S
PCHL Jump to the address pointed by HL.
Instructions for jumping and returning to subroutines:

Instruction Explanation

Jump to the position directed by the 2nd and 3rd byte of the instruction. Store
CALL
in the STACK the content of P.C. (Program Counter).
Jump to the position directed by the 2nd and 3rd byte of the instruction if the flag
CZ Z
indicated is one.
CC CY
CPE P Store the P.C. in the stack.
CM S
CNZ Z Same as before but if the Flag is zero. Store the P.C. in the STACK
CNC CY
CPO P
CP S
RET Return to the last address stored in the STACK.
Return to the last address stored in the STACK only if the Flag
RZ Z indicated is worth 1.
RC CY
RPE P
RM S
RNZ Z Same previous case but if the Flag is 0.
RNC CY
RPO P
RP S

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