University of Science and Technology Faculty of Engineering Electrical and electronic Engineering Department

Lecture (2) Design of Digital Systems Semester (5)

MSI and PLD Components

Programmable Logic Devices
A programmable logic device is an integrated circuit with internal logic gates that connected
through electronic fuses. Programming the device involves the blowing of fuses along the path
that must be disconnected so as to obtain a particular configuration. The word programming
refers to a hardware procedure that specifies the internal configuration of the device.
The gates in a PLD divided into an AND array and an OR array that are connected together to
provide an AND-OR sum of product implementation.
The three types of PLDs differ in placement of fuses in an AND-OR array.
Figure 1-1 shows the fuses locations of the three PLDs.

PAL
The programmable Array Logic PAL has a fused programmable AND array and fixed OR array.
The AND gates are programmed to provides the product terms for the Boolean functions that are
logically summed in each OR gates.
PLA
The Programmable Logic Array is the most flexible PLD where both AND and OR arrays can be
programmed. The product terms in AND array may be shared by any OR gate to provide the
required sum of products implementation.
PROM
The Read Only Memory is a device that includes. ROM is used to implement complex
combinational circuits or as a permanent storage for binary information. A block diagram of a
ROM is shown below fig.1-2. It consists of n input lines and m output lines. Each combination
of the input variables is called an address. Each combination that comes out of the outputs lines
called a word. The number of bits per word is equal to the number of the output lines. The

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University of Science and Technology Faculty of Engineering Electrical and electronic Engineering Department
Lecture (2) Design of Digital Systems Semester (5)

numbers of distinct addresses possible with n inputs is 2 n. A ROM is characterized by the

number of words 2n and the number of bits per words m.

Example 1
Consider a 32×8 ROM the unit consist of 32 words and 8 bits per words. The particular word to
be available on the output lines is determined from the five input lines. Because 25=32 so
addresses will be from (0) 00000 up to (31) 11111.

This means there are eight lines and that there are 32 words stored in the unit each of which may
be applied to the output lines.
Example 2
Figure 1-4 below shows the internal logic construction of a 32 ×4 ROM. The five input variables
are decoded into 32 lines. The 32 outputs of the decoder are connected through fuses to each OR
gates only four of these fuses are shown in diagram, but actually each OR gate has 32 inputs and
each input goes through a fuse that can be blown as desired.

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University of Science and Technology Faculty of Engineering Electrical and electronic Engineering Department
Lecture (2) Design of Digital Systems Semester (5)

The ROM is a two-level implementation in sum of minterms form.

Example 3
The truth table in the next Fig.1-5 specifies a combinational circuit with two inputs and two
outputs.

The Boolean function can be expressed in sum of minterms.

F1(A0,A1)=∑(1,2,3)
F2(A0,A1)=∑(0,2)

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University of Science and Technology Faculty of Engineering Electrical and electronic Engineering Department
Lecture (2) Design of Digital Systems Semester (5)

Example 4

Design a combinational circuit using ROM. The circuit accepts a 3bit binary numbers and
generates an output binary number equal to the square of the input number.
Solution:-
The first step is to derive the truth table for the combinational circuit. Three inputs and six
outputs are needed to accommodate all possible numbers. Note that the outputs B0 is always
equal to the input A0; so there are no need to generate B0 with a ROM. Moreover the output B1
is always 0,so this output is always known, we actually need to generate only four outputs with
the ROM so the size of the ROM must be 8×4 ROM.

Types of ROMs:
 1\ Mask programming: is done by the manufacturer during the last fabrication process of
the unit. The procedure for fabricating a ROM requires that the customer fill out the truth
table the ROM is satisfy. The truth table submitted on a special form provided by the
manufacturer. The manufacturer makes the corresponding mask for the path to produce the
1’s and 0’s according to the customer’s truth table. This procedure is costly because the
vender charge the customer a special fee for custom masking a ROM. For this reason, mask
programming is used only if large quantities of the same ROM configuration are to be
manufactured.
 2\ Programmable Read Only Memory: or PROM when ordered PROMs units contain all
0’s (or all 1’s) in every bit of the stored words. The fuses in the PROM are blown application
of current pulses through the output terminals. A blown fuse defines one binary state and the
un broken link represent the other state. This allows the users to program the unit. The
hardware procedure for programming ROMs or PROMs is irreversible and once
programmed, the fixed pattern is permanent and cannot be altered. Once a bit pattern has
been established, the unit must be discarded if the bit pattern is to be changed.
 3\ Erasable PROM: or EPROM When EPROM is placed under a special ultraviolet light for
a given period of time, the short wave radiation discharges the internal gates that serve as
contacts. After erasure, the ROM returns to its initial state and can be programmed.
 4\ Electrically Erasable PROM: or EEPROM certain ROMs can be erased by electrical
signal instead of ultraviolet light these are called EEPROM.

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