Lecture
TIMER
Timer / Counter
8 or 16 bit register
• The AVR has one to six timers depending on the family member. They are referred to as
Timers 0, 1, 2, 3, 4, and 5.
• 3 timers in AVR 328p
• Timer0 8-bit
• Timer2 8-bit
• Timer1 16-bit
Delay Generation
• To generate a time delay is to clear the counter at the start time and
wait until the counter reaches a certain number.
• The second method to generate a time delay is to load the counter
register and wait until the counter overflows and the flag is set.
Flag-1
Compare Register
Flag-2
Timer-0 structure in AVR Atmega16
Timer-1 structure in AVR Atmega16
Basic registers and flags of timer
• GTCCR – General Timer/Counter Control Register
• TCNTn (TCNTO, TCNT1, and TCNT2)
• It counts up with each pulse.
• OCRn (Output Compare Register)
• TCCRn (Timer/Counter Control register)
• TIMSKn (Timer Interrupt Mask Register)
• TIFRn – Timer Interrupt Flag Register
• OCFn (Output Compare Flag)
• TOVn (Timer Overflow) flag.
Timer Mode of Operation
• 4 mode of operation
• Normal Mode
• Clear Timer on Compare Match (CTC) Mode
• Fast PWM Mode
• Phase Correct PWM Mode
Normal Mode
• The simplest mode of operation is the Normal mode (WGM02:0 = 0).
• The Output Compare unit can be used to generate interrupts at some
given time.
Clear Timer on Compare Match (CTC) Mode
• In Clear Timer on Compare or CTC mode (WGM02:0 = 2), the OCR0A
Register is used to manipulate the counter resolution
• In CTC mode the counter is cleared to zero when the counter value
(TCNT0) matches the OCR0A
• An interrupt can be generated each time.
Fast PWM Mode
• The fast Pulse Width Modulation or fast PWM mode (WGM02:0 = 3
or 7) provides a high frequency PWM waveform generation option.
Phase Correct PWM Mode
• The phase correct PWM mode (WGM02:0 = 1 or 5) provides a high
resolution phase correct PWM waveform generation option.
Timer0 programming
Pin Configurations
Timer structure in AVR
Basic registers of timers
• TCNTn (TCNTO, TCNT1, and TCNT2)
• It counts up with each pulse.
• TOVn (Timer Overflow) flag.
• TCCRn (Timer/Counter Control register)
• OCRn (Output Compare Register)
• OCFn (Output Compare Flag)
TCCR0A – Timer/Counter Control Register A
• Bits 7:6 – COM0A1:0: Compare Match Output A Mode
TCCR0A
• Bits 7:6 – COM0A1:0: Compare Match Output A Mode
TCCR0A
• Bits 7:6 – COM0A1:0: Compare Match Output A Mode
TCCR0A
• Bits 5:4 – COM0B1:0: Compare Match Output B Mode
TCCR0A
• Bits 5:4 – COM0B1:0: Compare Match Output B Mode
TCCR0A
• Bits 3, 2 – Reserved
• Bits 1:0 – WGM01:0: Waveform Generation Mode
TCCR0B – Timer/Counter Control Register B
• Bit 7 – FOC0A: Force Output Compare A
• The FOC0A bit is only active when the WGM bits specify a non-PWM mode.
• Bit 6 – FOC0B: Force Output Compare B
• Bits 5:4 – Reserved
• Bit 3 – WGM02: Waveform Generation Mode
TCCR0B – Timer/Counter Control Register B
• Bits 2:0 – CS02:0: Clock Select
Interrupt Vectors in ATmega328P
TIMSK0 – Timer/Counter Interrupt Mask
Register
• Bits 7:3 – Reserved
• Bit 2 – OCIE0B: Timer/Counter Output Compare Match B Interrupt
Enable
• Bit 1 – OCIE0A: Timer/Counter0 Output Compare Match A Interrupt
Enable
• Bit 0 – TOIE0: Timer/Counter0 Overflow Interrupt Enable
Timer0 Data registers
• TCNT0 – Timer/Counter Register
• OCR0A – Output Compare Register A
• OCR0B – Output Compare Register B
TIFR0 – Timer/Counter 0 Interrupt Flag
Register
• Bits 7:3 – Reserved
• Bit 2 – OCF0B: Timer/Counter 0 Output Compare B Match Flag
• Bit 1 – OCF0A: Timer/Counter 0 Output Compare A Match Flag
• Bit 0 – TOV0: Timer/Counter0 Overflow Flag
Steps to program Timer-0 in Normal mode
• Load the TCNT0 register
• Load the value into the TCCRO register and the prescaler option.
• Keep monitoring the timer overflow flag (TOV0).
• Stop the timer by disconnecting the clock source
• Clear the TOV0 flag for the next round.
• Go back to Step 1 to load TCNTO again.
Example-1
TCCR0A
COM0A1 COM0A0 COM0B1 COM0B1 -- -- WGM01 WGM00
TCCR0B
FOC0A FOC0B -- -- WGM02 CS02 CS01 CS00
Timer-1 in Atmega-328p
• Features
• True 16-bit Design (i.e., Allows 16-bit PWM)
• Two independent Output Compare Units
• Double Buffered Output Compare Registers
• One Input Capture Unit
• Input Capture Noise Canceler
• Clear Timer on Compare Match (Auto Reload)
• Glitch-free, Phase Correct Pulse Width Modulator (PWM)
• Variable PWM Period
• Frequency Generator
• External Event Counter
• Four independent interrupt Sources (TOV1, OCF1A, OCF1B, and ICF1)
Register Description Timer-1
• TCNT1H and TCNT1L – Timer/Counter1
• OCR1AH and OCR1AL – Output Compare Register 1 A and 1 B
Register Description Timer-1
• ICR1H and ICR1L – Input Capture Register 1
• The Input Capture is updated with the counter (TCNT1) value each time an
event occurs on the ICP1 pin
Waveform Generation Mode Bit Description
Waveform Generation Mode Bit Description
16-bit access.
Example 9-40
Write a C program to toggle only the PORTB.4 bit continuously every 70
µs. Use Timer0, Normal mode, and 1:8 pre-scaler to create the delay.
Assume XTAL = 8 MHz.
Example 9-40 Solution
XTAL = 8MHz > T machine cycle = 1/8 MHz
Pre-scaler = 1:8 > Tclock = 8 x 1/8 MHz= 1µs
70 µs/1 µs = 70 clocks > 1 + 0xFF - 70 = 0x100- 0x46 = 0xBA = 186