Control unit
• The CPU control unit (CU) acts as the "traffic
manager" of the Central Processing Unit (CPU),
directing and coordinating the execution of
program instructions by generating control signals
to other CPU components and peripherals.
• It fetches instructions from memory, decodes
them into control signals using a binary decoder
or logic circuits, and then synchronizes the
operations of the arithmetic logic unit (ALU),
memory, and I/O devices to perform the
requested tasks.
Key Functions of the Control Unit
• Instruction Fetch and Decode:
• The CU fetches instructions from the main memory and converts
them into control signals that the processor can understand.
• Signal Generation:
• It generates timing and control signals that direct the flow of data
between the CPU and other components, ensuring that operations
occur in the correct sequence.
• Coordination of Components:
• The CU coordinates the activities of the Arithmetic Logic Unit
(ALU), memory, and input/output devices to execute the
instructions.
• Managing the Instruction Cycle:
• It plays a critical role in the instruction cycle, regulating the timing
and speed of operations.
• How it Works
How it Works
1. Instruction Input:
The control unit receives an instruction from the
main memory into the instruction register.
2. Decoding:
An instruction decoder interprets the
instruction's operation code (opcode).
3. Control Signal Generation:
Based on the decoded instruction, the control unit
generates specific control signals.
4. Execution:
These signals are sent to the ALU, memory, and I/O
devices, telling them what operations to perform and
when.
5. Synchronization:
A system clock provides regular pulses to synchronize
these control signals, ensuring all operations happen in
the correct order and at the right time.
Types of Control Units
• Hardwired Control Unit: Uses logic circuits to
translate instructions into control signals.
• Microprogrammed Control Unit: Uses
microprograms stored in memory to generate
the control signals, offering more flexibility.
Instruction Interpretation & Sequencing
• Instruction interpretation: Decode opcode,
Identify operation & addressing mode
• Sequencing: Determine order of
micro-operations
• Use Program Counter (PC) for next instruction
• Branching for conditional execution
Hardwired Control Unit
• Uses fixed logic circuits to generate control
signals
• Fast but inflexible (difficult to modify)
• Example: Early RISC processors
• Suitable for simple instruction sets
Micro-programmed Control Unit
• Control signals generated by microinstructions
stored in Control Memory (CM)
• More flexible, easier to modify
• Slower than hardwired
• Example: CISC processors (e.g., x86 family
Microinstruction Sequencing &
Execution
• Sequencing: Selecting next microinstruction
(sequential or branch)
• Execution: Generate control signals for ALU,
registers, memory
• Control memory contains microprograms for
each instruction
Microprograms
• Collection of microinstructions for
implementing an instruction
• Stored in Control Store (ROM / PLA)
• Advantages: Simplifies control design, Easier
to update/modify
RISC vs CISC – Introduction
• RISC (Reduced Instruction Set Computer):
Few, simple instructions, Load/store
architecture, Example: ARM, MIPS
• CISC (Complex Instruction Set Computer):
Large set of complex instructions, Single
instruction can perform multi-step operations,
Example: Intel x86, VAX
• The CPU control unit (CU) acts as the "traffic manager"
of the Central Processing Unit (CPU), directing and
coordinating the execution of program instructions by
generating control signals to other CPU components
and peripherals.
• It fetches instructions from memory, decodes them
into control signals using a binary decoder or logic
circuits, and then synchronizes the operations of the
arithmetic logic unit (ALU), memory, and I/O devices
to perform the requested tasks.
RISC Architecture Features
• Simplified Instructions: A smaller, more uniform
set of basic instructions that are easier to decode
and execute quickly.
• Single-Cycle Execution: Most RISC instructions
can be executed within a single clock cycle.
• Pipelining: A technique that allows different
stages of multiple instructions to be executed
simultaneously, improving efficiency.
• More Registers: A larger number of
general-purpose registers reduces the need to
access memory frequently, speeding up
operations.
• Simple Addressing Modes: Streamlined and simpler methods
for accessing data in memory.
• How RISC Compares to CISC
• Complexity:
• RISC favors simplicity in its instruction set, while CISC
incorporates complex, multi-operation instructions.
• Execution Speed:
• RISC's simple instructions execute faster, leading to quicker
overall processing.
• Hardware Design:
• RISC's simplified instruction set requires less complex
hardware, making chips easier to design and manufacture.
• Power Consumption:
• RISC processors typically consume less power, making them
ideal for portable devices.
CISC Architecture Features
• CISC, or Complex Instruction Set Computer, is a
processor architecture that uses a large set of
complex instructions, potentially taking multiple
clock cycles to execute.
• Unlike RISC (Reduced Instruction Set Computer)
which uses simple, single-cycle instructions, CISC
aims to complete a task with fewer instructions,
even if those instructions are more complex.
• Examples of CISC processors include Intel x86 and
AMD processors.
CISC Characteristics:
• Complex Instructions:
• CISC processors have a large set of instructions, some
of which are quite intricate and capable of performing
multiple operations within a single instruction.
• Variable Instruction Length:
• CISC instructions can vary in length, which adds to the
complexity of the processor.
• Hardware Focus:
• CISC emphasizes implementing complex instructions
directly in hardware, as hardware is generally faster
than software.
• Fewer Instructions per Program:
• By using complex instructions, CISC aims to
reduce the number of instructions needed to
complete a task.
• Examples:
• Intel x86 (used in most personal computers and
servers), AMD processors, and the IBM
System/360.
• Examples of Instructions:
• Complex instructions might include operations
that load data, perform calculations, and store
results, all within a single instruction.