Computer Architecture

DESIGN OF INSTRUCTION SET FOR A PROCESSOR

PRESENTED BY:

CABALLERO VEGA LUIS ALFREDO–CODE: 1911022660

CAMPOS MENDOZA JUAN JOSÉ–COD: 1821020327

CASTRO QUINTANA JORGE HERNÁN–COD: 1921983235

HERNÁNDEZ QUIROGA SANTIAGO–CODE: 1811025335

LANDAZURI CAICEDO MARÍA ALEY–CODE: 1821021402

PARRA BERNAL DAVID LEONARDO–CODE:100068102

ROJAS BARRERA RUBÉN DARÍO–CODE 1911020686

QUIÑONEZ PAZ PILAR ANDREA–COD: 1821020963

GUSTAVO ENRIQUE SINNING FUENTES–COD: 1711022255

WILSON EMIRO DIAZ ESCOBAR–CODE: 1911022338

POLYTECHNIC GRANCOLOMBIAN UNIVERSITY

FACULTY OF ENGINEERING, DESIGN AND INNOVATION

COMPUTER ARCHITECTURE

ALEXANDRA MARIA SILVA MONSALVE

MAY 2021
Computer Architecture

Table of Contents.

INTRODUCTION.
OBJECTIVES................................................................................................................. 5
GENERAL OBJECTIVE ................................................................................................ 5
SPECIFIC OBJECTIVESS ....................................................................................... 5
DESCRIPTION OF THE PROBLEM. ............................................................................. 6
JUSTIFICATION.......................................................................................................... 7
DEVELOPMENT– DELIVERY1 ................................................................................... 8
INSTRUCTIONS FOR SOLVING THE PROBLEM ................................... 8
DESIGN AND SIMULATIONS ....................................................................................... 9
PROPOSED ALGORITHM........................................................................................ 9
SOLUTION OBTAINED............................................................................................... 9
DEVELOPMENT - DELIVERY 2.................................................................................. 10
LISTADO DE INSTRUCCIONES (NOMBRE, MNEMÓNICO Y PARÁMETROS
RECEIVED ............................................................................................................... 10
DESCRIPTION OF A PHRASE INDICATING WHAT IT DOES IN TERMS OF THE
WHAT IT RECEIVES AS A PARAMETER. ....................................................................... 10
EXAMPLE JUMP INSTRUCTIONS ................................................................ 11
DEFINITION OF THE NUMBER OF RECORDS THAT WILL BE USED AND THE
SIZE OF EACH RECORD............................................................................... 12
BRIEF DESCRIPTION OF THE ADDRESSING MODES THAT WILL BE
POSSIBLE.................................................................................................................. 12
HIGH-LEVEL PROGRAM TRANSLATION (DELIVERY 1) TO THE LANGUAGE
ASSEMBLER THAT THEY HAVE BUILT, USING THEIR OWN SET
OF INSTRUCTIONS. .............................................................................................. 13
LIST IN HEX OF THE BINARY REPRESENTING THE PROGRAM
DONE IN POINT 4 OF THIS DELIVERY.............................................. 14
ALU IN LOGISIM, THAT CAN EXECUTE INSTRUCTIONS
REQUIRED BY THE PROGRAM....................................................................... 14
DEVELOPMENT - DELIVERY 3.................................................................................. 15
FILE .CIRC, MADE ON LOGISIM, WHICH INCLUDES: MEMORY OF
PROGRAM, ALU, REGISTERS, CONTROL UNIT, INTERCONNECTED
IN SUCH A WAY THAT THEY ARE ABLE TO EXECUTE THE PROGRAM
DESIGNED................................................................................................................. 15
FUNCTIONAL TESTS:............................................................................... 16
CONCLUSIONS
BIBLIOGRAPHIC REFERENCESS ......................................................................... 19
Computer Architecture

Table List

Tabla 1. List of Instructions (Name, Mnemonic and Received Parameterss ....... 10

Table [Link] of the Operation performed by the Parameters. .............................. 10

Table [Link] Modes .......................................................................... 12

Table [Link] of High-Level Program to Assembly Language................. 13

Table [Link] List ..................................................................................... 14

List of Figures

Illustration [Link] Solution to the Problem ........................................................ 9

Illustration [Link] with Parameters .................................................................. 9

Illustration [Link] Compliance with Parameters............................................................ 9

Illustration [Link] in Logisim Executing the Program Instructions................. 14

Computer Architecture

INTRODUCTION.

Technologies today are composed of two main components:

The conceptual, which we call software, where the languages are found

programming and allow us to carry out the tasks that our devices today

technological processes; while the hardware is a set of materials that it

they are plastic, metal, synthetic, etc.

During the course of this module, the solution that was provided will be presented.

for the problem posed, which consists of developing an algorithm that determines

whether a number is prime or not, additionally, it proposes the instructions used in

the development. These proposals will be made using the programming language

from Python and the Logisim software.

Computer Architecture

OBJECTIVES

GENERAL OBJECTIVE

Design a processor in the simulator 'Logisim', applying the information obtained in

the course of the eight scenarios taking into account the imposed conditions in

the documentation and the tutor. In order to understand the functioning of the

microarchitecture of hardware and being able to apply it.

SPECIFIC OBJECTIVES

[Link] from the basics, design and build an algorithm that determines if a number

is it prime or not.

2. Understand the ISA instruction set and define those that are required for the

processor design.

3. Understand the basic structure of a processor whose functionality is conditional

of prime numbers.

4. Investigate the different components of the processor that enable development

inside it.

5. Establish periodic meetings that allow for the proper functioning of the

parts of the working group in addition to establishing delivery points for each one

for the final product.

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DESCRIPTION OF THE PROBLEM.

Currently, processors have surpassed Moore's Law, which states that

Every two years, the number of transistors in microprocessors would double. But

With the passage of years, this law is ceasing to be law as large companies ...

they are increasingly reducing that time. Hence, today there are already processors of

56 cores and it is announced that this year there will be 100. (XATAKA, n.d.).

Although in the practice of this subject it does not reach 100 cores, the design of a

processor in Logisim, will help to understand at least the structure of a

single core processor and its operation.

Computer Architecture

JUSTIFICATION.

When building software, one must always have for obvious reasons a

hardware, whether it is physical or in the cloud. For this reason, it is important to know how

this hardware that is being worked on is composed, and the reason is simple:

performance. The performance of the machine being used will directly affect

the performance of the engineer or resource working on it.

Therefore, knowing the basics of a computer system is its

microarchitecture, will allow the performance of the resource assigned to a machine,

improves significantly. Seeing it another way is to see the difference between a person

One knows how their car is composed and the other does not.
Computer Architecture

DEVELOPMENT–DELIVERY 1

INSTRUCTIONS FOR SOLVING THE PROBLEM

1. Capture the number that you want to validate whether it is prime or not.

2. Compare if the entered number is greater (>) than 1, if this is not the case then

it will understand that the entered number is NOT prime.

3. Initialize a variable to count the number of divisors of the entered value.

4. Initialize FOR loop performing iterations with a range of several numbers,

initializing at 1 and ending at the entered value.

5. Obtain the remainder of the division between the entered number and the number of the

iteration.

6. Compare the remainder of the division, if it is equal (=) to 0 it is determined that the

the value of the iteration is a divisor of the value that was entered.

7. Evaluate the condition with the mentioned parameters and if it is met, it is increased.

the divisor counter.

8. End the FOR loop by validating if the count of divisors is equal to 0, if this

it is fulfilled it will be determined that this entered number IS prime, if it is not fulfilled it will

determines that this number is NOT prime.

9. Show message on screen with the result

Computer Architecture

DESIGN AND SIMULATIONS

PROPOSED ALGORITHM

Illustration 1. Proposed Solution to the Problem

SOLUTION OBTAINED

Illustration 2. Compliance with Parameters

Illustration 3. Non-Compliance with Parameters

Computer Architecture

DEVELOPMENT - DELIVERY 2

LISTADO DE INSTRUCCIONES (NOMBRE, MNEMÓNICO Y PARÁMETROS

RECEIVED
Name Mnemonic Parameters Received
Li R# Value (R# the number of
record that is going to be given
value

Rem R#a, R#b, R#c Three operands that are

residuo, dividendo, divisor

Beq R#e, R#f Two operands

Add R#i, R#j, R#k Three operands that are

result and its two
addends

Mul R#l, R#m, R#n Three operands that are

result and its factors

Sw R#1, 0 (R#2) First operand is the value

to save and the second
operating, it is the space for
use where it will be stored
in the RAM) R#2

Jump # Labeled indicating the

line where the will be carried out
program jump
Tabla [Link] de Instrucciones (Nombre, Mnemónico y Parámetros Recibidos
Source: Own Preparation
DESCRIPTION OF A PHRASE INDICATING WHAT IT DOES IN TERMS OF
WHAT IT RECEIVES AS A PARAMETER.

Instruction Indications
Li R2 5 The value of 5 is given to record number 2.
Rem R1, R2, R3 0 = remainder of 10/5, assuming that R2 is worth 10, R3
vale 5
Branch equal R1, R2 R1 equals R2
Sum R5, R2, R3 (R5= R5 = R2 + R3
R2+R3)
Mul R6, R2, R3 (R6 = R2 * R3) R6 = R2 * R3
Store R1, 0 (R2) R2
Jump 0111
Table 2. Indication of the Operation performed by the Parameters.
Source: Own Preparation
Computer Architecture

EXAMPLE JUMP INSTRUCTIONS

• Instruction (A) JUMP TO Address: Load the memory address into the CP

specified in the instruction

• Instruction (B) JUMP IF LESS THAN Address: Stores the address in the CP

specified in the instruction if C=1

• Instruction (C) JUMP IF GREATER THAN Address: Store in the CP the

specified address in the instruction if C=0

• Instruction (D) JUMP IF EQUAL TO Address: Stores the address in the PC

specified in the instruction if Z=1

• Instruction (E) JUMP IF NOT EQUAL TO: Stores in the PC the

specified address in the instruction if Z=0

This game of 14 instructions forms a complete set with which one can

build any structured program.

A total of 15 records will be needed, each with a size of 8 bits.

Using state and control records, the following will be utilized

instructions:

• Instruction Register (IR)

• Instruction counter (PC)

• Memory Address Register (MAR)

• Intermediate Memory Register (MBR)

Computer Architecture

DEFINITION OF THE NUMBER OF RECORDS THAT WILL BE USED AND THE SIZE

OF EACH RECORD

A total of 15 records will be needed, each with a size of 8 bits.

Using status and control records, the following will be used

instructions:

• Instruction Register (IR)

• Instruction counter (PC)

• Memory Address Register (MAR)

• Master Boot Record (MBR)

BRIEF DESCRIPTION OF THE ADDRESSING MODES THAT WILL BE

POSSIBLE

Ways to Instruction Justification

Addressing
Directly to registration Rem R1, R2, R3 (0 = remainder of Operation
10/5, assuming that R2 is worth 10,arithmetic that
R3 is worth 5) affects
Sum R5, R2, R3 (R5 = R2 + R3) directly to
Multiply R6, R2, R3 (R6 = R2 * R3) registry
Data transfer Sw R1, 0 (R2) Communication
with the RAM
Pseudodirect Jump # (labeled, indicates the line Jumps in the
where the jump will take place code
program highlighting in the
typography
Indirect to Register Store R1, 0 (R2) Interaction with
the RAM
Table 3. Addressing Modes

Source: Self-made
Computer Architecture

TRANSLATION OF THE HIGH-LEVEL PROGRAM (DELIVERY 1) TO THE LANGUAGE

ASSEMBLER THEY HAVE BUILT, USING THEIR OWN SET OF

INSTRUCTIONS.

INSTRUCCION COD OPERANDOS EJEMPLO SIGNIFICADO MEANING

MATHEMATICIAN
li 0 R, value Li R2 5 Record R2 5 Assign a value to
a record

rem 1 R1, R2, Rem R1, 0 = remainder of Make

label R2, R3 10/5 operation
arithmetic
(division)

beq 10 R1, R2 Beq R1, R1==R2 Carry out

label R2, R3 operation
arithmetic (equal
what)

sum 100 R1, R2 Sum R5, R5 = R2 + R3 Make

label R2, R3 operation
arithmetic (addition
of the
operands)

mul 101 R1, R2 Mul R6, R6 = R2 * R3 Perform

label R2, R3 operation
arithmetic
(multiplication of
the operands

sw 110 R, value Sw R1,0 0 (R2) Save a value

(R2) in space
assigned

jump 111 Label Jump Jump to the place Jump to the place
0111 indicated by
way
independent

Table 4. Translation of the High-Level Program to Assembly Language

Source: Own
Computer Architecture

HEXA LISTING OF THE BINARY REPRESENTING THE PROGRAM

CARRIED OUT IN POINT 4 OF THIS DELIVERY.

# Instruction in binary HEX

0 0 1
1 1000000001 2
2 2000000010 3
3 3000000011 4
4 4000000100 5
5 5000000101 6
6 6000000110 7
7 7000000111 8
8 10000001000 9
9 11000001001 10
10 12000001010 A
11 13000001011 B
12 14000001100 C
13 15000001101 D
14 16000001110 E
Table 5. Hexadecimal Listing

Source: Own

ALU IN LOGISIM, THAT CAN EXECUTE THE REQUIRED INSTRUCTIONS

FOR THE PROGRAM.

Illustration 4. ALU in Logisim Executing the Program Instructions

Source: Own
Computer Architecture

DEVELOPMENT - DELIVERY 3
FILE .CIRC, MADE ON LOGISIM, THAT INCLUDES: MEMORY OF
PROGRAM, ALU, REGISTERS, CONTROL UNIT, INTERCONNECTED
SCHOOL FORM THAT CAN EXECUTE THE DESIGNED PROGRAM

Illustration 5. Circuit Including ALU, REGISTERS, CONTROL UNIT

Source: Own
Computer Architecture

FUNCTIONAL TESTING:

Considering the algorithm designed for the first delivery of this project, it

construyó el archivo en Logisim correspondiente al proyecto final del procesador el cual

it depends on the CPU file and the ALU file for its correct execution, they are presented

the following scenarios according to the need to determine if the number

the entered number is a prime number or otherwise it will be indicated that it is not.

Illustration 6. Circuit Demonstrating that Number 03 IS a Prime Number

Source: Own

Illustration 7. Circuit Demonstrating that the Number 06 is NOT a Prime Number

Source: Own
Computer Architecture

CONCLUSIONS

1. During the development of the algorithm, it is intended to use the Visual text editor.

Joint studio for better assertive communication among the different

parts of the project.

2. In the course of the first weeks, the effectiveness is concluded to

Establish regular times and meetings, which has positively led to improvements.

of the project even prevent errors during programming.

3. With the exercise proposed in the activity of this scenario we can observe

that by applying algorithmic calculations, the ... can be identified in a practical and easy way.

prime numbers and non-prime numbers.

4. When executing or running the code in the Visual Studio environment, in which you

developed for this exercise, the methodical process of numerical calculation is appreciated,

complying with the parameters and requirements demanded in the practical activity

identifying in this way the prime numbers and the non-prime numbers that we want

consult or verify.

5. Thanks to this practical exercise, skills are being developed.

programming through problems that pose a quick and effective solution

when calculating large amounts of complex data.

Through this work, it can be inferred how we should analyze the way in which

We receive software requests sequentially, also understand the

the importance of understanding the relationship between software and computer hardware and how

they must be interconnected. In order to generate them correctly and

meet the proposed requirements.

Computer Architecture

[Link] are the most important part of computers, they

they are the ones who send the orders to the other control centers and commands without

It should be emphasized that these are the most expensive part of the computers.

current providers that day by day satisfy the multiple needs of millions of

users.

The architecture of the computer is the operational structure, the design.

conceptual being this fundamental in an assembler system of a model

of operations and implementations necessary to satisfy the

computer design requirements.

9. The logical processing unit is necessary to fulfill tasks.

determined, that is to say it is responsible for processing, organizing, the calculations and all

the tasks required in the program

Computer Architecture

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Before we had Moore's law, now we have Huang's law that outlines the future of Nvidia.

arm

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Gonzales, L. (2021). Logisim: software de ayuda para diseñar circuitos lógicos.

Computer Architecture

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[Link]

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