Mohammed Premier University

National School of Applied Sciences (ENSAO)

Oujda
4th Year GSIER

Industrial Computing
Course -

Pr. Kaoutar BAIBAI

Academic Year 2021/2022
 Introduction
Computer Science Industry
An area of activity Set of social activities
scientific, technical and economic turned towards the
technological concerning the serial production of goods. It sub-
automatic processing of understand
the information, via a A certain subdivision of
program, by of the work
machines: computers the use of machine
embedded systems, robots, first manual then
automates, etc. automated.

Industrial Computing
Indusaritlcompunitgrefers ot htebranchofcompunitg
regrouping all the design, analysis, and techniques of
programming of computer systems for industrial purposes.
2
 Application Areas

Domains
of applications

GPAO
Production Management
FAO
Computer-Assisted:
Assisted Fabrication
Provides a cycle follow-up
by computer
completion of production
Allows to MAO
since the purchase of materials
program and pilot Maintenance
firsts until the
the tools of Assisted by delivery of the finished product
production Computer

3
 Areas of Applications
Applications
❑ Automobile: use of industrial robots to perform
the assembly and painting of car bodies
❑ Automation of services: Scheduled door openings and
windows, centralized building management.
❑ instrumentation
❑ Mobile telephony,
❑ Medical,
❑ Payment terminals for credit card....

4
 Avantages & Inconvénients

The advantages
Accelerated production capacity;
The ability to adapt to all production environments;
The flexibility of use;
The reduction of production costs.
The creation of automation technician positions.

The disadvantages
The complexity of maintenance: it must be structured;
.
Job cuts

5
 Coding of information
Definition

❑ In a machine, all information is encoded in the form

a sequence of "0" and "1" (binary language).
❑ The general form of an integer in base b.

= n-1, … 1 0= ×
=0

❑ Binary (base 2) consists of 2 digits:

{0, 1 }
❑ Octal (base 8) consists of 8 digits:
{ 0, 1, 2, 3, 4, 5, 6, 7 }
❑ The Decimal (base 10) consists of 10 digits:
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }
❑ The Hexadecimal (base 16) consists of 16 digits:
{ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F }
6
 Coding of information

❑ Binary (base 2): { 0, 1 }

❑ Octal (base 8): [0, 1, 2, 3, 4, 5, 6, 7]
❑ The Decimal (base 10): { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }
❑ The Hexadecimal (base 16): { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F }

Examples:

é = ,… 1 0= × 10
=0
3

2016 = d3 2 1 0= × 10
=0
3= 2 2= 0 1= 1 0= 6

7
 Encoding of information

Conversion
7 B A 3
Binary-hexadecimal: 0111 1011 1010 0011 = (7BA3)16

7 5 6 4 3
Binary-Octal 0 111 101 110 100 011 =(75643)8

Decimal-Binary : 4610= (101110)2

Decimal-hexadecimal:4610(2E)16

Binary-Decimal: (1 0 0 1) 2= 9

8
 Encoding of information

Exercises

Exercises 1: Convert the following binary digits to decimal:

(111) , (1010)b , (1001 1110)b

Exercise 2: Convert the following decimal numbers to binary:

8, 12, 256, 1023

Exercise 3: Convert the following binary numbers to hexadecimal:

(111)b , (1010)b , (1001 1110)b

Exercise 4: Convert the following hexadecimal digits to binary:

8, 12, 256, 1023

9
 Data bus

Definition
Unbus allows for the transfer of information (serial/parallel connection)
encoded in binary between two points. Typically, the information is
grouped in words: Octet (8 bits), Word (16 bits) or double Word (32 bits)
bits).

Characteristics of a bus:

❑ Largeur :Nombres de lignes,

❑ Transfer frequency.

Bus width: 8 Direction:

❑ Unidirectional
8 ❑ Bidirectional

10
 Data bus
Different Types of Buses
❑ Data bus: allows data transfer between components; it
vehicle the instructions coming from or going to the processor. This is
from a bidirectional bus.
Example: Result of an operation, value of a variable, etc.
❑ Address bus: allows addresses to be transferred between components; it
transport the memory addresses that the processor wants to access for
read or write a data. This is a unidirectional bus.
Example: Address of a memory cell, etc.
❑ Control bus: allows the exchange of information between components
control.
Exemple : Périphériqueprêt/occupé, erreur/exécution réussie, etc.

Definition
An address is a binary number that indicates a location in a
memory zone.
11
 Binary arithmetic operations
Definitions
1. Addition:
Addition in binary is done with the same rules as in decimal.
Addition rule:
0+0=0
0+1=1
1+0=1
1 + 1 = 0 with a carry of 1
Subtraction
We calculate the sum between A and the two's complement of B (two's complement and
addition).
3. Multiplication
We multiply numbers in binary in the same way as we multiply them.
decimal numbers.
4. Division in binaries
The principle is the same as for a division in decimal.
5. Two's complement
Two's complement: replace the 1s with 0s (and vice versa), then add 1.
(1011) gives (0100) + (1) = (0101) 12
 Binary arithmetic operations
Examples:
Addition

Subtraction
25 -17 = 25 + (- 17) = ?
25 = 00011001
17 = 00010001
We conclude:
- 17 = 11101111(2)
So: 25 –17 = 00011001(2) + 11101111(2)

It is noted that the result is written in 9 bits, which exceeds the writing format.
of 8 bits. In this case, we ignore the leftmost bit (called overflow) and
the result is good: 00001000
13
 Microprocessor System
Definition
A microprocessor is a complex integrated circuit. It results from
the integration on a chip of combinational logic functions (logic
and/or arithmetic) and sequential (registers, counters, etc...). It is
capable of interpreting and executing the instructions of a program. Its
the scope of use is almost unlimited.
❑ A program is a set of instructions,
❑ An instruction is a sequence of micro-instructions.
An instruction can be encoded on one or more bytes. Format of a
instruction :

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 Types of MicroprocessorArchitectures

From the point of view of program and data distribution, there are 2
Main types of architectures: Harvard and von Neumann:

❑ Von Neumann: Data is stored in the same

memory that the instructions The Von Neumann architecture
oblige to go look for successively in memory
the instruction then the data.
❑ Harvard: The memories, programs, and data are
separated. So access and speed *2.

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Von Neumann Architecture Model

❑ Memory bus and shared data: limits the speed

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 Harvard Architecture Model

❑ Memory instructions and memory data do not need to be

same size (bits)
❑ The CPU can read an instruction and access memory at the same time.
❑ Different memory and data addresses
17
 Elements of the system to µProcessor
The µP consists of 3 fundamental units:
❑Central Processing Unit (CPU)
❑Memory Unit (Program & Data)
❑Exchange unit: Input-Output interfaces for the
control and exchanges.

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 Microprocessor System
The functions of a microprocessor:
❑ It allows control, command, and the
sequencing of operations
❑Perform arithmetic and logical operations.

The main characteristics of a microprocessor:

The execution speed
2. Internal Architecture
3. Address space size: for 16 bits, one can address
65536
4. The size of the information to be processed (data = Data)

19
 Architecture of the µProcessor
Internal architecture
The basic element of a computer consists of the Central Unit of
Processing (UCT, CPU: Central Processing Unit).
An arithmetic and logic unit (ALU: Arithmetic and Logic)
Unit) : it is the calculation organ of the calculator;
The registers: storage areas for the working data of the UAL
(operands, intermediate results) ;
A control unit (CU : Control Unit) : it sends the orders
(or commands) to all other elements of the calculator so that
to execute a program.

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 Architecture of the microprocessor

External architecture
The microprocessor exchanges data with its surroundings (memories, I/O,
...) by means of a bus network.

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 Architecture of the microprocessor

Clock
The sequencer is controlled by a clock that delivers a signal of
frequency data allowing to link the different stages of
the execution of an instruction.
The clock is made up of a quartz oscillator whose circuits
can be internal or external to the microprocessor.

Example: 5 MHz clock, period T = 1/f = 0.2 µs. If the instruction executes in 3
microcycles, the execution duration of the instruction is: 3 × 0.2 = 0.6 µs.
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 Architecture of the microprocessor

The speed of execution

The process operates at a certain frequency, depending on the architecture.
the intern of a computer (size of registers...). The number of cycles.
the necessary requirements to perform a basic operation are very variable.

23
 Exercises

Exercise 1:
Give the duration of a cycle for a 100MHz clock.

Exercise 2:
Let it be a µProcessor that operates at 100MHz. Knowing that an operation
Addition requires 5 cycles. Calculate the number of addition operations.
which can be performed in one second by this microprocessor.

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The memories

25
 The memories

Storage space Memory

❑ The role of a storage space is to keep

data.
❑ Storage can be long-term or temporary, we
therefore distinguishes two types of memories for storing
the binary information inside a system
computer science.

26
 The memories

Types of memories
1. The volatile memories (RAM): Random Access Memory)
volatile memories. They lose their content in case of
power supply. They are used to store
temporarily data and programs. They
can be read and written by the microprocessor;
Access to this memory is fast (a few tens of
nanoseconds) which is important not to slow down
the rate at which the processor can operate.

27
 The memories
Types of memories
2. Dead memories (ROM): Read Only Memory)
non-volatile memories. They retain their content in
cases of power failure. They can only be
read by the microprocessor (no writing capability).
They are used to store data and programs.
definitively.
-However, the access times to these memories are much
slower than for access to RAM.
Note: The term read-only memory (ROM) is
preserved for historical reasons, however most
current mass storage devices (such as the
hard drives, USB keys using FLASH technology are
accessible for reading AND writing.
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 Classification of RAM memories

RAM Memory

❑ Dynamic DRAM:
Based on the load of capacitors: charged capacitor
= 1, capacitor discharged = 0.
The disadvantage of this simple technique is that the
capacitor discharges by itself over time (currents
of escape). It is therefore necessary to refresh all the
capacitor
Low cost, reliable power consumption, high density
integration

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 Classification of RAM memories

RAM Memory
❑ Static SRAM
Static Random Access Memory.
Used as memory in PC cache.
The information is stored by a switch of
type D
SRAMs allow shorter access times than
the DRAM, but are more expensive because their
construction requires 4 times more transistors than the
DRAM.

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 Classification of RAM memories
Dead memories
❑ ROM: Read Only Memory. Memory for reading only, without writing. Sound
Content is programmed once and for all by the manufacturer.
Advantage: low cost. Disadvantage: requires production in very
large quantity.
❑ PROM: Programmable Read Only Memory. ROM programmable one
only time used by the user (ROM OTP: One Time Programming) in
blowing fuses.
❑ EPROM: Erasable PROM, also called UVPROM. ROM
electrically programmable with a programmer and erasable by
exposure to ultraviolet radiation for 30 minutes.
❑ EEPROM: Electrically Erasable PROM. ROM programmable and
electrically erasable. Normal speed reading. Writing (=
very slow erasure. Application: the EEPROMs contain a
data that can be modified from time to time, example:
computer configuration settings.
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 Functional diagram of a memory

-8 address bits allow addressing 256 bytes.

-16 address bits allow addressing 65536 bytes (= 64 KB).
RAM memory 6264 has 13 pins and each cell has 8.
bits. 13 pins 2^13=8192=8 capacity 8KB∗8bits
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 The characteristics of a memory

Memory capacity
❑ Capacity represents the amount of information that can
to be stored in memory.
It characterizes the number of elements (bits, bytes, or words):
it is often expressed in Kbits.
The number of address lines depends on the capacity of
the memory: k address lines allow addressing2
memory cases.
é= ∗ é
é= ∗
Example: In a memory, the size of the address bus
K=14 and the data bus size n=4. Calculate the capacity.
of this memory?
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 The characteristics of a memory

Memory capacity

❑ Bit: a bit is the basic element for representation of

the information.
❑ Octet: 1 Octet = 8 bits
❑ kilobyte (KB): 1 kilobyte (KB) = 1024 bytes =210octets
❑ Megabyte (MB): 1 Megabyte (MB) = 1024 KB =220octets
❑ Giga-octet (GO): Giga-octet (GO) = 1024 MB =230octets
❑ Tera-byte (To): 1 tera-byte (To) = 1024 Go =240octets

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 The characteristics of a memory
Capacity of a memory

❑ Time Cycle: Represents the minimum time interval

between two successive accesses.
❑ Access time: It is the time required to perform
a read or write operation

35
The characteristics of a memory

36
Microprocessor/memory interfacing

37
Reading/writing chronograms in memory
Chronogramme de lecture en mémoire :
The information is available
Chargerdans le Launch it
in the data bus register
register RAM the address order of
after an uncertain time
the word to read. lecture (R/W=1)
(access time).

38
Reading/Writing Chronograms in Memory

Writing chronogram in memory:

Placing in the Place the order
Chargerdans the RAM
Data bus writing to transfer the
the address of the word or where the
it isinformation to content of the RIM in the
make the writing
write. memory

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 Cache Memory
Indeed, memory components benefit from the same advances.
technological elements that microprocessors but the decoding of addresses and the
Writing/reading data are difficult steps to accelerate.

Technological progress
Memoirs Microprocessor

? Decoding addresses and reading/writing

Cycle time access time

processor memory

The memory is no longer able to deliver information as well

40
quickly than the processor is able to handle them.
 Cache Memory

Principle of cache memory

- A solution used to mask this latency is
to have a very fast memory between the
microprocessor and memory. It is called memory.
cache.
We compensate for the low relative speed of the memory.
by allowing the microprocessor to acquire the data
its proper speed.
It is made from small-sized SRAM cells.
Its memory capacity is therefore much lower than that of the
central memory.
Its function is to store the most recent information.
or most often used by the microprocessor.
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 Cache Memory

Principle of cache memory

The cache memory temporarily stores data
information, data, and programs that are
regularly used by your processor.
When this data is required, the processor will
will automatically turn to the cache at the
search for faster access to this data.
Access to the cache allows the processor to retrieve
quickly the data, which makes your overall system
more efficient.

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 Cache Memory

Cache success Cache defect

The data or the instruction the data or the instruction

required is present in the is not in the cache, and
hides and she is then the cache controller
sent directly to then send a request to
microprocessor. the main memory.
Once the information
retrieved, he sends it back to the
microprocessor all in the
stocking in the cache.

43
Pyramid of memories

44
 Design of memories
We want to achieve a memory of capacity C, but we
we only have enclosures (circuits) of size
lower?

45
 Design of memories

The memory modules have a pin labeled

CS: Chip Select
When this pin is active (low state), the circuit can be
where you write. = , the case is selected
When it is inactive (high state), the circuit is excluded from the
service: its data pins D0 to D7 are in the state of
high impedance: it all happens as if memory were
disconnected from the microprocessor's data bus.
= the box is not selected.
From where the possibility to connect multiple memory units
on the same bus: only one CS signal must be active at a time
given instant to avoid conflicts between the different
cases.

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 Memory design

Let M be a memory with capacity C, such that m is the number

of word and n the size of a word. C (m, n).
Let M' be a case of capacity C', such that m' is the number of
word and not the size of a word. C' (m', n').
It is assumed that C > C' (m >= m', n >= n').
What is the number of M' boxes needed to achieve the
memory M ?

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 Design of memories

To determine the number of boxes needed, you must

calculate the following two factors:

= =
’ ′
-P: Allows to determine the number of necessary housings
to obtain the number of words in memory M (extension
lines )
Allows to determine the number of necessary cases
to obtain the word size of memory M (extension
words or column extensions.
Give the total number of cases needed for
create the memory M.

48
 Design of memories

Example 1:
Create a memory of 1KB (the size of a word is 8 bits)
using 256-word, 8-bit size boxes?

(m, n)=(1024,8) the address bus size is 10 bits A9 0

(A9…A0), the data bus size is 8 bits (D7….D0)
-(m',n')=(256,8) the address bus size is 8 bits
(A7'...A0'), the data bus size is 8 bits
(D7'....D0')
Calculate the two factors of extension for rows and columns:
- = ’
=1024/256=4 ( line extension )
- = ′
=8/8=1 (extension columns)
The total number of cases P.Q=4.
49
 Design of memories

Example 2:
We want to create a memory of 1KB (the size of a word is
16 bits) using 1KB packages of 4 bits words)?
(m,n)=(1024,16) : the address bus size is 10 bits
(A9…A0), the data bus size is 16 bits
(D15….D0)
(m',n')=(1024,4) : the address bus size is 10 bits
(A9'...A0'), the data bus size is 4 bits
(D3'....D0')
1024
- = = 1( line extensions )
1024

- = 164(extension columns)
4
The total number of boxes P.Q=4
50
 Design of the theses

Example 3:
Create a memory of 1KB (the size of a word is 8 bits)
using boxes of size 256 words of 4 bits?

- (m,n)=(1024,8) : the address bus size is 10 bits

(A9…A0), data bus size is 8 bits (D7….D0)
-(m',n')=(256,4) : the address bus size is 8 bits
(A7…A0), the data bus size is 4 bits (D3….D0)
1024
- = = 4(extension lines)
256

- = 48= 2(extension columns)

The total number of cases P.Q=8
51
 Design of the memories

Example 4 :
Connection of three memory units with a capacity of 8 KB
each (13 address lines) on a 16-bit address bus:

52
 Design of theses

In the same housing, a memory slot is designated by the

address bits A0 to A12:

53
 Design of memories

Memory 1

Memory 2

Memory 3

54
Memory design

55
 Decoding of addresses

A13 000
A14 8 combinations à
A15 111

8 Memory boxes
The total installed memory: 8 × 8 Ko = 64 Ko

56
 Decoding of addresses

3 to 8 decoder 57
 Decoding of addresses

Truth table of the address decoder:

58
 Decoding of addresses

The memory mapping thus becomes:

59
 Chapter 3
The Microprocessor

60
 Processor
The number of instructions varies depending on the type of processors.
We distinguish 2 types of processors:

CISC:Complex Instruction Set Computer

✓ Large number of instructions.
✓ Disposed ’instructionscomplexes prenant plusieurs
clock cycles for execution.
✓ The number of instructions varies between 75 and 150.
2. RISC Reduced
: Instruction Set Computer
✓ The instructions are encoded on a reduced number.
of bits, which speeds up execution.
✓ On the other hand, their limited number forces one to
restrict to basic instructions
✓ The number of instructions is very limited, between 10 and
30 instructions. 61
 Basic architecture of a microprocessor

The microprocessor fulfills two essential functions:

1. Data processing:
✓ Data processing is done by the unit of
treatment.
✓ The treatment concerns the manipulation of data.
in the form of transfer (movement), operations
arithmetic, logical operations.
2. The control of the system:
✓ The control of the system translates into operations of
decoding and execution of orders expressed in
form of instruction, it is therefore the sequencing of
operations etc. it's the role of the control unit.

62
 Processing unit

In a processing unit, three are generally distinguished.

main logical elements:
1. An Arithmetic and Logic Unit (A.L.U.)
An Accumulator
3. Registers commonly referred to as:
The Instruction Counter (I.C.),
The Civil Registry
The Register of Instructions (R.I.)
The Address Register (A.R.)
The temporary data register.
63
Processing unit

64
 Arithmetic and Logic Unit

It is a complex circuit that ensures the functions:

✓ Logical (AND, OR, comparison…)
✓ Arithmetic (addition, division, subtraction, ...)
The registry of state The state register is formed of
several bits called flags or indicators (Flags) that
are positioned by the ALU after each operation.
retention (carry : C)
intermediate withholding (AC)
sign (S)
overflow (OV or V)
zero (Z)
parity (P)
65
 Accumulator or Work Register
The processor always uses registers, which
are very fast small internal memories
access used to temporarily store a
data, an instruction or an address.
Each register stores 8, 16, or 32 bits.
Among the registers, the most important is the register
accumulator, which is used to store the
results of arithmetic and logical operations.
It is the most important register of
microprocessor.
The most logical operations and
arithmetic on data involves the pair
UAL–accumulator 66
 Accumulator or Work Register
This same work register also serves for the
movements and transfers of data from one place to
another:

Memory Memory

Memory I/O Unit

This type of action is done in two stages:

Source Destination
Accumulator
67
 Accumulator or Work Register

Example
Z = X + Y corresponds to
LOAD X ;
ADD Y;
STORE Z Loading of
the accumulator with x
(2): Preparation of operands x and
and towards the UAL

Order launch of
the operation in the UAL copy of the accumulator in z

Result transferred to
the accumulator

68
 Command and Control Unit

It is the control unit that supervises the course of all

the operations within the processor. It consists of
mainly from:

1. Clock: It's the clock that generates the signals that

allow the scheduling and synchronization of all
the operations.

Square signal with a

Clock fixed frequency

69
 Command and Control Unit

2. The PC program counter

It is a register whose content is initialized with the address
from the first instruction of the program.
It contains the address of the memory location where is stored the
next instruction element that will need to be loaded into
the processor to be analyzed and executed.
3. The instruction register RI
It's the register where the CPU stores the current instruction
execution then is decoded by the instruction decoder.

70
 Command and Control Unit
Decoder
He is the one who will 'decode' the instruction contained in RI and
generate the corresponding logic signals and the
communicate with the sequencer.
He retrieves the instruction coded in machine language in the
registered instruction (RI)
decode it to translate it into a basic instruction
understandable by the processor (that is to say a
instruction of his game instructions).
5. The sequencer
It manages the sequencing of operations and generates the signals.
of commands that will activate all the elements that
will participate in the execution of the instruction and in particular
the ALU.
71
Functional diagram

72
Assembly programming
the microprocessor
Software aspect

73
 Execution cycle of an instruction
The processing of an instruction can be broken down into three phases.
Phase 1: Research of the instruction to be processed
1. The PC contains the address of the next instruction of the program. This value
is placed on the address bus by the control unit which issues a command of
lecture.
2. After a certain amount of time (memory access time), the content of the
Selected memory case is available on the data bus.
3. The instruction is stored in the instruction register of the processor.

74
 Execution cycle of an instruction
Phase 2: Decoding the instruction and searching for the operand
The instruction register now contains the first word of
the instruction that can be encoded over several words. This first word
contains the operating code that defines the nature of the operation to be performed
(addition, rotation, ...) and the number of words of the instruction.
The command unit transforms the instruction into a sequence of
elementary commands necessary for processing the instruction.
2. If the instruction requires data from memory,
The control unit retrieves its value from the data bus.
The operand is stored in a register.

75
 Execution cycle of an instruction
Phase 2: Decoding the instruction and searching for the operand

76
 Execution cycle of an instruction
Phase 3: Execution of the instruction
The microprogram executing the instruction is executed.
2. The flags are positioned (state register).
The control unit positions the CPU for the next instruction.

77
 Instruction coding
The instructions and their operands (parameters) are stored in memory.
main. The size of an instruction (number of bits required
to represent it in memory) depends on the instruction type and also on the
operand typed.

An instruction consists of two fields:

▪ The operation code indicates to the processor the type of processing to be performed.
achieve.
▪ The operand field indicates the nature of the data on which
The operation designated by the operation code must be carried out.
address).

Operating code Operating field

78
 Addressing mode of an instruction
An addressing mode defines how the microprocessor will
access the operand. According to the addressing mode, the size of the instruction
can vary from 1 to 4 bytes.

The different addressing modes depend on the microprocessors but we

generally find:
▪ The addressing of registers where the data contained in a
register
MOVAX,BX

79
 Addressing mode of an instruction
▪ Immediate addressing where the value is defined immediately.
data.
MOVAX,500H ;
Means that the value 500H will be stored immediately in the AX register.

80
 Addressing mode of an instruction
▪ Direct addressing: The instruction contains the address of the case.
memory where the data is located.
MOVAX
The value addresses a constant (a displacement) that must be added.
to the contents of the registerDS.

81
 The processor registers
Data records
AX, BX, CX and DX

A 16-bit register AX can be considered as the addition of

two 8-bit registers AHetAL (H for high, L for low).
AH 8 Bits AL 8 Bits

AX: All data transfer operations with the inputs

outputs as well as the processing of character strings are done in this
register, as well as arithmetic and logical operations.
-BX "base register" is called base register because of addressing
memory can be done through its intermediary;
"count register" is implicitly the loop counter register.
for repetitive instructions, to count the number of iterations;
We use the DX register for operations
multiplication and division.

82
 The processor registers
Registered addresses
SI, DI, BP and SP

Index registers:
▪ Source index
▪ Destination index
Basic records:
▪ Base pointer
▪ SP: "Stack pointer"

Segment registers
These registers are responsible for selecting the different segments of the
memory pointing to the beginning of each of them.
▪ CSCode base address for the program.
▪ DSData base address segment for data.
▪ Extra segment base address for other data.
▪ SSStack base address segment for the stack.
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 The processor registers
Segment registers
These registers are responsible for selecting the different segments of the
memory pointing to the beginning of each of them.
16 bits 0-15
SC, DS, ES and SS

▪ CSCode segment base address for the program: It points to

the segment that contains the instruction codes of the program in
course.
▪ DSData base address segment for data: The register
data segment points to the global variables segment of the
program.
▪ Extra base address segment for other data: The
additional data register ES is used by the
microprocessor when access to other registers became
difficult or impossible to modify data.
▪ SSStack base address for the stack.
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 The processor registers
The instruction pointer
16 bits 0-15
IP

Instruction Pointer or Program Counter, contains

the address of the memory location where the next one is located
instruction to execute.
He must indicate to the processor the next instruction to
execute.
The IP register is constantly modified after execution
each instruction so that it points to the instruction
next.

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 The processor registers

Registers
of data Instruction counter

Registers
address
AH 8 Bits AL 8 Bits

Civil registry

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 Instruction game

Each microprocessor recognizes a set of instructions

called instruction game set by the manufacturer.

❑ For classical microprocessors, the number

The number of recognized instructions ranges from 75 to 150 (CISC).
❑ There are also microprocessors whose number
Reduced Instruction Set Computer (RISC): between 10 and 30
instructions for improving time
of program execution.

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 Instruction game
Definition
The instruction sheet describes the set of operations
elementary operations that the microprocessor will be able to execute.

An instruction is defined by its opcode, value

binary numbers are difficult for humans to manipulate.
So we use a symbolic notation to represent the
instructions: mnemonics. A program consisting of
Mnemonics are called assembly program.

Instructions can be classified into groups:

Data transfer instructions;
Arithmetic instructions;
Logical instructions;
• Unplugging instructions.. 88
 The transfer instructions
They allow for the transfer of data from a source to a
destination :
register to memory;
register to register;
memory to register.
Syntax:
MOV destination, source to move

Examples:
1. mov ax,bx: Load the content of register BX into register AX
register addressing.
2. mov al,12H : Load the AL register with the value 12H
addressing
immediate.
3. mov bl,[1200H] :Transfers the content of the memory location
to the effective address 1200H towards the BL register (direct addressing) 89
 Arithmetic instructions
The basic arithmetic operations are addition, subtraction,
multiplication and division that include various variants. Several
addressing modes are possible
Addition :

ADD operand1, operand2 operand1 ← operand1 + operand2

Examples:
1. ADD ah,[1100H]
Add the content of memory cell 1100H to accumulator AH
(direct addressing).
2. ADD ah,[bx]
Add the content of the memory cell pointed to by BX to the accumulator AH.
(address-based)
3. ADD [DI], AL :
The content of the memory location pointed to by DI is added to AL, the
The result is placed in the memory location pointed to by DI.
90
 Arithmetic instructions
Subtraction :

SUBoperand1, operand2 operand1 ← operand1 - operand2

Examples:

Multiplication :
MUL performs an unsigned multiplication of the source operand and the accumulator

Multiplicand

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The arithmetic instructions

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 Logical instructions

These are instructions that allow you to manipulate data.

bit level. The basic logical operations are:

➢ ET ;
➢ OU ;
➢ Exclusive OR;
➢ Supplement to 1;
➢ Complement to 2
➢ Shifts and rotations.

The different addressing modes are available

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 Logical Instructions
ET logic:

AND operand1, operand2 operand1 ← operand1 AND operand2

Examples:

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 Logical instructions
OR logic :

Operator1, operator2 operand1 ← operand1 OR operand2

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 Logical instructions
Supplement to 1:
The operation performed is:

NO Operand operand é .

Example:

Complement to 2:

NEGoperand operator é + 1.

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 Logical instructions
Exclusive OU:
The operation performed is:

XOR operand1, operand2 operand1 ← operand1⊕ operand2

Example:
Resetting a register

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 Logical instructions
Operations Instruction Examples

Logical shift towards the

SHRopérande, n
right

Logical shift to the

SHLopérande
left

Arithmetic shift
SARopérande, n
to the right

Right rotation ROR operand, n

Right rotation with

passage about the RCR operating indicator
of retention
Left rotation with
passage by the RCLoperande indicator, n
of retention 98
 Logical instructions
Applications of shift instructions:
1. We want to have the value of the 4 most significant bits of
register AL?

2. We want to determine the state of bit 5 of AL:

99
 The logical instructions
Applications of shift instructions:
3. Multiplication or division by a power of 2:
a right shift is equivalent to dividing by 2
and a left shift, a multiplication by 2.
Calculate .

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 The connection instructions

The branch (or jump) instructions allow for

modify the execution order of the program instructions
depending on certain conditions. There are 3 types of jumps:
Unconditional jump;
Conditional jumps;
Subroutine call.

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 The wiring instructions
Unconditional jump instruction:
This instruction jumps to the specified label. A
label is a symbolic representation of a
instruction in memory:
JMPlabel

←previous instructions before the jump

←instructions suivant le saut (jamais exécutées)

←instruction executed after the jump

Example:

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 The wiring instructions
Conditional jump instructions:
A conditional jump is executed only if a certain
the condition is met, otherwise the execution continues
sequentially to the next instruction
Jconditionlabel

The jump condition pertains to the state of one (or more)

status indicators (flags) of the microprocessor:

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 The connection instructions
Conditional jump instructions:
There is another type of conditional jump, the jumps
arithmetic. They usually follow the instruction of
comparison:
CMP operand1, operand2

Examples:

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 Wiring instructions
Application
we want to add two signed numbers N1 and N2
respectively located at offsets 1100H and 1101H. The
The result is stored at offset 1102H if it is positive, at offset
1103 If it is negative and at the offset 1104 If it is zero:

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 The connection instructions
Organigram

106
 The wiring instructions
Program:

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