Overview of Programmable Logic Controllers
Overview of Programmable Logic Controllers
History:
The computers of the time were expensive and not suited to the constraints of the industrial world, the automated machines
were supposed to meet the expectations of the industry.
external influences:
-dust,
temperature
humidity
vibrations
-electromagnetic parasites, ...
Personnel:
easy implementation of the material (no language of
complex programming
repair possible by trained technicians
electromechanics
possibility to modify the system while it is operating
Material:
evolutionary
modular
easy implantation
The Programmable Logic Controller (PLC) is a programmable electronic device, suitable for
the industrial environment, which performs automation functions to ensure the control of
pre-actuators and actuators from logical, analog or digital information.
2 / 17
II. The role of the API in the automated production system (A.P.S.):
CONSTRAINTS
Raw material
Material of work SYSTEM +
AUTOMATE Value added
Any automated system can be broken down according to the diagram below:
TREATMENT
DES
INFORMATION
3 / 17
Operational part:
Order party:
Control post:
Composed of control and signaling desks, it allows the operator to control the
system (start, stop, cycle start ...).
It also allows you to visualize the different states of the system using indicators, terminal.
dialogue or human-machine interface (HMI).
APIs are used in all industrial sectors for machine control (conveying, ...
packaging ...) or production lines (automotive, agri-food ...) or it can also
ensure process regulation functions (metallurgy, chemistry ...).
It is increasingly used in the building sector (tertiary and industrial) for control of
heating, lighting, security or alarms.
All or nothing (A.O.N.): information can only take two states (true/false, 0 or 1 …).
This is the type of information provided by a detector, a push button...
Analog: the information is continuous and can take a value within a range
well determined. It is the type of information provided by a sensor (pressure, temperature …)
4 / 17
III. Architecture of automata:
a. Exterior aspect:
5 / 17
Main functions:
Input/output cards: In quantities of 4, 8, 16, or 32, they can also perform functions
of entries, exits or both.
These are the most used and the available voltages are standardized (24, 48, 110 or 230V direct current or
alternative ...).
The routes can be independent or have "commons".
Input cards collect information from sensors, buttons ... that are assigned to them.
connected and to materialize it with an image of the state of the sensor.
Output cards offer two types of technologies: electromagnetic relay outputs
(coil plus contact) and static outputs (based on transistors or triacs).
Quick counting cards: they allow for the acquisition of high-frequency information
incompatible with the processing time of the automaton.
Example: signal from a position encoder.
Analog input/output cards: They allow for the acquisition of an analog signal.
and its essential digital conversion (ADC) to ensure processing by the microprocessor.
The inverse function (analog output) is also implemented.
Analog quantities are standardized: 0-10V or 4-20mA.
Other cards:
The automation is generally powered by the single-phase network 230V; 50 Hz but other
power supplies are possible (110V etc ...).
The protection will be of the magneto-thermal type (see the characteristics of the automatic device and the
manufacturer's recommendations.
It is advisable to control the power supply of the automaton with a specific control circuit.
(contactor KM1).
Likewise, the outputs will be controlled by the control circuit and powered after validation of the dog.
guard (see paragraph VII).
7 / 17
PE N L1
Q1
2 x F2 T1 F3
230 / 24V
1 2 1 2
1 2
S1
KM1
S2
Towards automated outputs
- KA1
13 14
Dog of
Q2 S3 - KM1 guard
I> A1 A1
KM1 KA1
A2 A2
PE N L C0 0 C1 1 C234 2 3 4
AUTOMATE
Sensor power supply Automated entries
0V 24V 0 1 2 3 4 5 6 7
8 / 17
b. Feeding the inputs of the automat:
The automatic device is generally equipped with a power supply for sensors/detectors (pay attention to the type of
logic used: positive or negative logic.
The inputs are connected to the common OV of this power supply.
The information from sensors/detectors is processed by input interfaces.
AUTOMATE
Interface
0 1 2 3 4 5 6 7
starter
0V 24V 0 1 2 3 4 5 6 7
- b5
S8 S9 S4 F1
B2 S5
KA1
15 s
AUTOMATE
Interface
outgoing 0 1 2 3 4
C0 0 C1 1 C234 2 3 4
KA1
13 14
of order
9 / 17
V. Processing of the automation program:
INTERNAL TREATMENT
READING OF ENTRIES
WRITING OF OUTPUTS
Internal processing: The machine performs control operations and updates certain parameters.
systems (detection of transitions to RUN / STOP, updates of the timestamp values, ...).
Reading the inputs: The automaton reads the inputs (synchronously) and copies them into memory.
image of the inputs.
Execution of the program: The automaton executes the program instruction by instruction and writes the
outputs in the image memory of the outputs.
Output writing: The automaton toggles the different outputs (synchronously) to the positions
defined in the output image memory.
These four operations are carried out continuously by the automaton (cyclic operation).
We call polling the set of the four operations performed by the automated system and the polling time.
is the time taken by the automated system to process the same part of the program. This time is on the order of
tens of milliseconds for standard applications.
The total response time (TRT) is the time that elapses between the change of state of an input and the
change of state of the corresponding output:
Scanning time
I E T S I E T S
The total response time is at most twice the polling time (without special processing).
10 / 17
CHAPTER 2. THE A.P.I.s 19
a. Programming languages :
There are 4 programming languages for automata that are globally standardized by the norm.
IEC 61131-3.
Each automation is programmed via a proprietary programming console or by a computer.
equipped with specific manufacturer software.
12 / 17
b. Programming using GRAFCET (SFC: Sequential Function Chart):
Some software allows full programming in GRAFCET language and allows adaptation.
to most existing controllers (CADEPA or AUTOMGEN software).
VII. Security:
Automated systems are, by nature, a source of many hazards (used voltages, movements
mechanics, jets of matter under pressure ...
Placed at the heart of the automated system, the automaton must be a reliable element because:
the repair costs of the production tool are generally very high,
External constraints: the robot is designed to withstand the various stresses of the world
industrial and has undergone numerous standardized tests (vibration resistance, EMC ...)
Power outages: the machine is designed to withstand power outages and allows,
per program, ensure correct operation during refeeding (cold restarts or at
warm)
RUN/STOP mode: Only a technician can start or stop an automation and the reset in
the process is carried out by an initialization procedure (scheduled)
Cyclic controls:
13 / 17
Description of PL7 languages
II
Presentation
Object of this This intercalary describes the programming languages of Micro automata and
interleaf Premium.
110 TLXDRPL7xx
Contact languages
Presentation
%TM
Q
4. %
M1
7
%1
I1
.0%Q23
.%M27 %T
M0 %
M5
2%M
W
X.0 OPERATE
%MW15:=%MW18+500
IN TM Q
M O D
EY
O U
R
TB:1m
ni
TMP
99:99
MODIF:Y
%
M2 %1
I4
. S
R2
C
P N X S R OP
ER C
OHP C
OH
P F
B F(..)
H V
F2 F
3 F
4 F5 F6 F
7 F8 F9 F10 F1 F12 SF
.1 SF
.2 F
3S
. SF
.4 F
5S
. SF
.6 F
7S
. SF
.8
112 TLXDRPL7xx
Contact language
Introduction A circuit is connected between two potential bars. The direction of current flow
It is established from the left potential bar to the right potential bar.
1
2
3
4
5
6
Potential barrier
7
8
9
10
11
.
Zone action
Zone test
Generalities The label allows you to identify a network within a program entity (program)
main, sub-program, ...). It is optional.
Syntax This label has the following syntax: %Li with i ranging from 0 to 999.
She is positioned at the upper left part in front of the potential bar.
%M20 %L245
Etiquette
%L245
%Q2.3 %M155
S
Rules A label marker can only be assigned to a single network within the same
program entity.
The order of the label markers is arbitrary, (it is the order of entry of
networks that are taken into account by the system during the polling).
114 TLXDRPL7xx
Contact language
Generalities The comment facilitates the interpretation of the network it is attached to, but is not
mandatory.
Syntax The comment is integrated into the network and consists of 222 alphanumeric characters.
maximum widths, framed on either side by the characters (* and *).
Comment zone
Rules The comments are displayed in the reserved area at the top of the
network of contacts.
Generalities The graphic elements are the instructions of the language with contacts.
Contacts The graphic elements of the contacts are programmed in the test zone and occupy
a cell (1 row high and 1 column wide).
Designation Graphics Functions
Contact at Contact passes when the bit object that controls it is in state 1.
closure
Contact at Contact passes when the bit object that controls it is in the state 0.
opening
Contact at Front rising: detection of the transition from 0 to 1 of the bit object
detection of who is the pilot.
P
front amount
Contact à Front descendant: detection of the transition from 1 to 0 of the object
detection of N a bit of the pilot.
front
descendant
Elements of The linking graphic elements allow connecting the graphic elements of
liaison test and action.
Designation Graphic design Functions
Connection Allows to connect the graphical test elements in series
horizontal and action between the two potential bars.
116 TLXDRPL7xx
Contact language
Coils The graphic elements of the reels are programmed in the action zone and occupy
a cell (1 row high and 1 column wide).
Designation Graphic design Functions
Direct coil The associated bit object takes the value of the result of the area
test.
Coil The associated bit object takes the inverse value of the result of the
inverse zone test.
Bobbin The associated bit object is set to 1 when the result of the area
of trigger S test is at 1.
ent
Reel of The associated bit object is set to 0 when the result of the area
trigger R test is at 1.
t
Jump Allows connection to a labeled network, upstream or
conditional to aval.
->>%Li
another Jumps are only effective within the same entity of
network programming (main program, sub-
(SAUTER) program,...). The execution of a jump causes:
the suspension of the ongoing network scrutiny,
the execution of the requested labeled network,
the non-scrutiny of the part of the program located
between the jump action and the designated network.
Function blocks The graphical elements of standard function blocks are programmed in the test area.
standard and occupy a dimension of a height of 16 lines maximum and a width of 3
columns.
Designation Graphic design Functions
Timer Blocks, Each of the standard function blocks uses a
Counter, inputs, outputs, input/outputs allowing
Monostable, of those related to other graphic elements.
Register,
Programmer
cyclic
Function blocks The graphical elements of the function blocks DFB are programmed in the test area and
DFB occupy a dimension of a maximum height of 16 lines and a width of 3
columns.
Designation Graphic design Functions
Blocks Each DFB function block uses
programmables inputs, outputs, input/outputs allowing
of the ones related to other graphic elements for
objects of type bits or that can be assigned to
digital objects or paintings
Operation blocks The graphical elements of the operation blocks are programmed in the test area and
occupy the dimensions mentioned below.
Designation Graphic design Functions
Comparison block Allows the comparison of 2 operands, according to the
vertical As a result, the corresponding output becomes 1.
Dimension: 2 columns/4 rows
118 TLXDRPL7xx
Contact language
Rules of The simple graphic elements for testing and action each occupy a cell.
programming being of a network.
Each contact line starts on the left potential line and must be
end on the straight potential line.
Generalities Standard function blocks are positioned in the test area of networks.
contacts.
120 TLXDRPL7xx
Contact language
Generalities The comparison blocks are positioned in the test area and the operation blocks are
position themselves in the action zone.
Connected network A connected network contains graphic elements all linked to each other by
linking elements (excluding potential bar), but independent of the others
graphic elements of the network (no vertical connections upwards or to the
based on the limit of connected network.
Network
connection 3
Rule The first assessed connected network is the one whose left corner is located the highest.
execution of top left.
networks
connected A connected network is assessed in the sense of the equation: network assessment of
top to bottom, line by line, and in each line from left to right.
122 TLXDRPL7xx
Contact language
Execution of The following table describes the execution order of the elements in a network.
elements in related..
a network
Phase Description
connected
1 The system evaluates the logical state of each contact based on:
the current value of the application's internal objects,
the status of the input of the input/output modules acquired at the beginning of the cycle
Example 1: The following drawing visualizes the order of execution of the graphical elements.
illustration
Example 1: The following table describes the execution of graphical elements in the illustrated network.
operation above.
Phase Description
1 Network evaluation until the first vertical link is encountered
convergence: contacts A, B, C.
2 Evaluation of the first subnet: contact D,
3 Continuation of the network assessment until the meeting of the second link
convergence vertical: contact E,
4 Evaluation of the 2nd subnet: contacts F and G,
5 Evaluation of the H coil.
Example 2: The following drawing visualizes the order of execution of graphical elements.
illustration
Example 2: The following table describes the execution of graphic elements in the illustrated network
functioning above.
Phase Description
1 coil 1: INIT, %M5, %M7, %Q2.1,
2 coil 2 : %M4, %MW2:X1,AUTO, UP_1,
3 Operation block.
124 TLXDRPL7xx
Language instruction list
Presentation
Generalities This chapter describes the programming rules in instruction list language.
Illustration of a The following illustration presents a list of instructions program PL7 and the details.
program of an instruction..
!%L0:
LD %I1.0
ANDN %M12
OR( %TM4.Q
LD %I1.0
AND %M17
)
AND %I3.7
ST %Q2.5 Code Operand
!%L2: instruction
LD %I3.5
126 TLXDRPL7xx
Language instruction list
Generalities The label allows you to locate a phrase within a program entity.
(main program, subprogram, ...). It is optional.
Syntax This label has the following syntax: %Li with i ranging from 0 to 999. It is
positions at the beginning of a sentence.
%L0 :
LD %M40
JMPC %L10
(*Drying waiting*)
%L2 :
LD %I1.0
AND %M10
ST %Q2.5
...
%L10 : Etiquette
LD %I3.5
ANDN %Q4.3
OR %M20
ST %Q2.5
Rules The same label can only be assigned to a single sentence within a
same program entity.
The order of the label markers is arbitrary, it follows the order of entry of
phrases that are taken into account by the system during the scanning.
128 TLXDRPL7xx
Language instruction list
Syntax The comment can be integrated at the beginning of a sentence and can occupy 3 lines.
maximum (up to 222 alphanumeric characters), framed on both sides by
les caractères (* et *).
Illustration The following illustration identifies the position of the comment in a sentence.
(Waiting for drying) Comment
%L2 :
LD %I1.0
AND %M10
ST %Q2.5
Rules Comments only appear from the first line of the sentence.
The comments are stored in the automaton and are accessible to everyone.
Moment by the user. As such, they consume program memory.
Instructions from The following table describes the test instructions of the instruction list language.
test
Designation Graphics Functions
equivalent
LD The boolean result is equal to the state of the operand.
LDN The boolean result is equal to the inverse state of the operand.
AND The boolean result is equal to the logical And between the result
boolean of the previous instruction and the state of the operand.
ANDN The boolean result is equal to the logical AND between the result
boolean of the previous instruction and the inverse state of
the operand.
ANDR The boolean result is equal to the logical AND between the result
P boolean of the previous instruction, and the detection of a
front amount of the operation (1=front amount).
ANDF Le résultat booléen est égal au Et logique entre le résultat
N booléen de l’instruction précédente, et la détection d’un
front descendant of the operand (1=front descendant).
OR The boolean result is equal to the logical Or between the result
Boolean from the previous instruction and the state of the operand.
ORN The boolean result is equal to the logical Or between the result
boolean of the previous instruction and the inverse state of
the operand.
130 TLXDRPL7xx
Language instruction list
ORF The boolean result is equal to the logical And between the result
boolean of the previous instruction and the state of the operand.
N and the detection of a descending edge of the operand
(1=front descendant).
AND( And logic (8 levels of parentheses)
N - Negation
Instructions The following table describes the test instructions for the instruction list language.
action
Designation Graphic design Functions
ST The associated operand takes the value of the result of the area
test.
STN The associated operand takes the inverse value of the result of
the test zone.
Instruction on The following table describes the test instructions of the instruction list language.
function block
Designation Graphic design Functions
Timer Blocks, For each of the standard functional blocks, there exists
Counter, instructions to control the block.
Monostable, A structured form allows for direct cabling
Register, the inputs/outputs of the blocks.
Programmer
cyclic
Instructions The following table describes the test instructions of the instruction list language.
digital
Designation Instructions Functions
Test element LD[.....] Allows the comparison of 2 operands, the output
AND[.....] switch to 1 when the result is verified.
OR[.....] Example: LD[%MW10<1000]
Result is 1 when %MW10<1000.
Element of action [.....] Perform arithmetic, logical operations...
Use the syntax of the structured literal language.
Example: [%MW10:=%MW0+100]
The result of the operation %MW0+100 is placed
in the internal word %MW10.
132 TLXDRPL7xx
Language instruction list
LD %I1.0
AND(%I1.1
OR %I1.2
)
ST %Q2.0
LD %I1.1
AND(%I1.2
AND %I1.3
OR(N%I1.5
AND %I1.6
)
AND %I1.4
OR(N%I1.7
AND %I1.8
)
)
ST %Q2.0
134 TLXDRPL7xx
Language instruction list
Generalities The 3 types of instructions allow for the processing of switches to the coils.
These instructions use an intermediate memory called a stack that can store
up to 3 boolean information...
MRD (Memory ReaD) This instruction reads the top of the stack.
MPP (Memory PoP) This instruction serves to read and unload the top of
the pile and shift the other values towards the top of the
pile.
Example 1 This example illustrates the use of the MPS, MRD, and MPP instructions.
LD %I1.0
AND %M0
MPS
AND %I1.1
ST %Q2.0
MRD
AND %I1.2
ST %Q2.1
MRD
AND %I1.3
ST %Q2.2
MPP
AND %I1.4
ST %Q2.3
Example 2 This example illustrates the functioning of the MPS, MRD, and MPP instructions.
LD %I1.0
MPS
AND %I1.1
MPS
AND( %I1.3
OR %M0
)
ST %Q2.0
MPP
AND %M1
ST %Q2.1
MRD
AND %I1.4
ST %Q2.2
MPP
AND %M10
ST %Q2.3
136 TLXDRPL7xx
Language instruction list
Principle of The instructions control the inputs of the blocks (e.g., CU). The outputs are accessible.
programming in the form of bits (e.g.: %C8.D).
direct
Example:
This example illustrates the direct programming of a function block counter.
Treatment
some entries
Treatment
outings
Example:
This example illustrates the structured programming of a function block counter.
BLK 8
LD %I1.1 Treatment
R entrances
LDN %I1.2
ANDN %M0
See you
OUT_BLK Treatment
LDD outings
ST %Q2.0
END_BLK
138 TLXDRPL7xx
Language instruction list
Example 2 The parentheses allow for modifying the order of consideration of the results.
booleans :
LD %I1.1 résultat = état du bit %I1.1
AND %M0 result = AND the previous boolean result and the state of bit %M0
OR( %M10 result = state of the bit %M10
AND %I1.2 result = AND of the previous boolean result and the state of bit %M10
)
ST %Q2.0 %Q2.0 takes the state of the previous boolean result
140 TLXDRPL7xx
Structured literal language
Presentation
Subject of this This chapter describes the programming rules in structured literal language.
chapter
Limit This language is usable with the PL7 Micro, PL7 Junior, and PL7 Pro software on the
of use automates Premium and Micro.
In the PL7 Pro version, this language allows the creation of user-defined function blocks.
DFB on the Premium automata.
Illustration of a The following illustration presents a program in the structured language PL7.
program
! (* Search for the first non-zero element in a
table of 32 words, determination of its value
(%MW10), of its rank (%MW11). This research
is done if %M0 is at 1, %M1 is set to 1 if
a non-null element exists, otherwise it is set to 0*)
IF %M0 THEN
FOR %MW99:=0 TO 31 DO
IF %MW100[%MW99]<>0 THEN
%MW10:=%MW100[%MW99];
%MW11:=%MW99;
%M1:=TRUE;
EXIT; (*Sortie de la boucle*)
ELSE
%M1:=FALSE;
END_IF;
END_FOR;
ELSE
%M1:=FALSE;
END_IF;
142 TLXDRPL7xx
Structured literal language
Role The label allows you to locate a sentence within a program entity.
(main program, subprogram, ...). It is optional.
Syntax This label has the following syntax: %Li: with i ranging from 0 to 999. It is
position at the beginning of a sentence.
! %L20 : Etiquette
(Drying wait)
SET %M0;
%MW4:=%MW2 + %MW9;
(*pressure calculation*)
%MF12:=SQRT (%MF14);
144 TLXDRPL7xx
Structured literal language
Syntax The comment can be integrated anywhere in the sentence and the number of
comments per sentence are not limited.
Illustration The illustration below identifies the position of the comment in a sentence.
! Drying waiting
SET %M0;
Comments
%MW4:=%MW2 + %MW9;
(*pressure calculation*)
%MF12:=SQRT (%MF14);
146 TLXDRPL7xx
Structured literal language
Arithmetic The following instructions apply to word and double word objects.
whole on words
Designation Function
and doubles words
+, -, *, / Addition, Soustraction, Multiplication, Division entière
REM Remainder of the integer division
Instructions The following instructions apply to word and double word objects.
logics on
Designation Function
words and doubles
words AND ET logic
OR OU logic
XOR Exclusive OR logic
NOT Logical complement
SHL Logical left shift
SHR Logical right shift
ROL Logical circular shift to the left
ROR Logical circular shift to the right
Comparisons The following instructions apply to word objects, double words and
digital on floating.
words, doubles
Designation Function
words and floats
< Strictly less than
> Strictly greater than
<= Less than or equal to
>= Greater than or equal to
= Equal to
<> Different from
148 TLXDRPL7xx
Structured literal language
Instructions on The following instructions apply to word and double word tables.
word boards
Designation Function
and double words
Tableau := Tableau Allocation between two tables
Table: Word Initialization of an array
+, -, *, /, REM Arithmetic operations between arrays
+, -, *, /, REM Arithmetic operations between expressions and arrays
SUM Summation of the elements of an array
EQUAL Comparison of two tables
NOT Logical complement of a table
AND, OR, XOR Logical operations between two arrays
AND, OR, XOR Logical operations between expressions and arrays
FIND_EQW, FIND_EQD Search for the first element equal to a value
FIND_GTW, FIND_GTD Search for the first element greater than a value
FIND_LTW, FIND_LTD Search for the first element less than a value
MAX_ARW, MAX_ARD Searching for the maximum value in an array
MIN_ARW, MIN_ARD Search for the minimum value in an array
OCCUR_ARW, OCCUR_ARD Number of occurrences of a value in an array
SORT_ARW, SORT_ARD Sort in ascending or descending order of an array
ROL_ARW, ROL_ARD Left circular shift of an array
ROR_ARW, ROR_ARD Right circular shift of an array
FIND_EQWP, FIND_EQDP Search for the first element equal to a value from
a rank
LENGTH_ARW, LENGTH_ARD Calcul de longueur d'un tableau
150 TLXDRPL7xx
Structured literal language
Instructions from The instructions perform conversions of bits, words, double words, and floats.
conversions
Designation Function
digital
BCD_TO_INT BCD to Binary conversion
INT_TO_BCD Binary to BCD Conversion
GRAY_TO_INT Conversion Gray to Binary
INT_TO_REAL Conversion of a simple integer format to floating point
152 TLXDRPL7xx
Structured literal language
Instructions from The following instructions perform operations on dates, times, and on
time management durations..
Designation Function
SCHEDULE Hordator function
RRTC Reading date system
WRTC Update of the system date
PTC Date of ruling and stop code
ADD_TOD Adding a duration to a time of day
ADD_DT Adding a duration to a date and time
DELTA_TOD Measure of deviation between hours of the day
Instructions The following instructions are specific instructions of the Orpheus language.
Orpheus
Designation Function
WSHL_RBIT, DSHL_RBIT Left shift on word with bit recovery
shifted
WSHR_RBIT, DSHR_RBIT Right shift on word with sign extension and
recovery of shifted bits
WSHRZ_C, DSHRZ_C Right shift on word with filling by 0 and
recovery of shifted bits
SCOUNT Counting/decoupling with signaling of
exceeding
ROLW, ROLD Left circular shift
RORW, RORD Circular right shift
Instructions for These instructions are timing functions intended to be used for
timing the programming of the DFB code..
Designation Function
FTON Triggering delay
FTOF Timing on triggering
FTP Pulse timing
FPULSOR Square wave generator
154 TLXDRPL7xx
Structured literal language
Role This control structure performs one or more actions if a condition is true.
In its general form, the conditions can be multiple.
Simple form In its simple form, the control structure has the syntax and the functioning
next.
Syntax Operation
Beginning ofIF
IF condition THEN
unverified
Condition
actions;
verified
END_IF; Action
End ofIF
Example:
General form In its general form, the control structure has the syntax and operation
next.
Syntax Operation
Beginning ofIF
IF condition 1 THEN
actions1 verified
Condition 1
actions3;
End ofIF
END_IF;
Example:
156 TLXDRPL7xx
Structured literal language
Role This control structure performs a repetitive action as long as a condition is met.
verified.
Description The control structure has the following syntax and operation.
Syntax Operation
Start ofWHILE
WHILE condition DO
action ; unverified
Condition
END_WHILE; verified
Action
End ofWHILE
Example:
Note: The EXIT instruction (See Role, p. 160) allows stopping the execution
from the loop and to continue with the instruction following the END_WHILE.
Role This control structure performs a repetitive action until a condition is met.
is verified.
Description The control structure has the following syntax and functioning.
Syntax Operation
Start ofREPEAT
REPEAT
action; Action
UNTILconditionEND_REPEAT; Condition
unverified
verified
End ofREPEAT
Example:
Note: The EXIT instruction (See Role, p. 160) allows to stop the execution.
from the loop and continue with the instruction following END_REPEAT.
158 TLXDRPL7xx
Structured literal language
Description The control structure has the following syntax and functioning.
Syntax Operation
Start ofFOR
FOR index := initial value TO
final value DO Valeur initiale --> Indice
action;
Index > verified
END_FOR; Final value
unverified
Action
End ofFOR
Index +1 --> Index
Example:
Rule of When the index is strictly greater than the final value, the execution stops.
programming continues with the instruction following END_FOR.
The increment of the index is done automatically and is therefore not to be
your charge.
The action represents a list of instructions.
The initial value and the final value are necessarily numerical expressions.
of type word.
The index must be an object of type word that is writable.
Several FOR control structures can be nested.
Note: The EXIT instruction (See Role, p. 160) allows stopping the execution.
from the loop and continue on the instruction following the END_FOR.
Role This instruction allows to stop the execution of the loop and to continue on
the instruction following the loop end instruction.
Rule of This instruction can only be used in the actions of one of the 3 WHILE loops.
programming REPEAT you FOR.
This instruction is linked to the nearest encompassing loop, that is to say
that it does not stop the execution of all the loops that encompass it.
Example In this example, the EXIT instruction allows to stop the REPEAT loop but in
no case for the WHILE loop.
160 TLXDRPL7xx
Structured literal language
Priority rule The table below gives the priority for evaluating an expression from the most
of operators priority or less priority.
Operator Symbol Priorité
Parentheses expression Stronger
Logical complement NOT
Inversion NOT
on operand -
+ on operand +
Multiplication *
Division /
Module REM
Addition +
Subtraction -
Comparisons <,>,<=,>=
Equality comparison =
Comparison inequality <>
ET logic AND
AND boolean AND
Exclusive logical OU XOR
Exclusive OR boolean XOR
OR logic OR Less strong
OR boolean OR
Note: When there is a conflict between two operators of the same level of priority, it is
the first operator that prevails (the evaluation is done from left to right).
Example 1 In the following example, the NO Test applied on %MW3 then the result is
multiplied by 25. The sum of %MW10 and %MW12 is then calculated, and then the AND
logic between the result of multiplication and addition.
NOT %MW3 * 25 AND %MW10 + %MW12
Exemple 2 In this example, the multiplication of %MW34 by 2 is first performed, then the
result is used to perform the modulo.
%MW34 * 2 REM 6
Use of The parentheses are used to modify the order of evaluation of operators.
parentheses to allow, for example, to prioritize an addition over a multiplication.
You can nest parentheses and the level of nesting is not limited.
(%MW10+%MW11)*%MW12
Example 2 This example shows that parentheses can be used to avoid any
misinterpretation of the program.
162 TLXDRPL7xx
Structured Literal Language
For an instruction of the form: <operand 1> <operator> <operand 2>, the cases
possible conversions are:
Operand 1 Operand 2 Conversion Conversion Operation
of type of type Operand 1 Operand 2 in the type
Word Word No No Word
Word Double word Double motive No Double motive
Double word Word No Double word Double word
Double word Double word No No Double word
20
CHAPTER 3. THE GRAFCET 21
Manuel : interview
Operation:
action on g and d?
descent punch
up to b?
punch ascent
until h?
repos
Initial conditions
1
punch h = 1
g and d to 1
if g is equal to 1
descent
Steps 2 Actions
b to 1
if g is equal to 1
ascent
3
h to 1
Directed liaison
Attention! This grafcet is not complete, it is missing the emergency stop and the
manual command. It should be noted that:
depending on the sensors, the transition conditions change (open or
closed at rest;
Depending on the actuators, the actions are different;
the operator security is carried out by an action, if the condition g and d
.uert si1
´
Initial step
It represents the system at rest initial state. It is
activated at the beginning of the cycle.
´
Step
Each step is associated with one or more actions, it is
to give an order to the operational part or to others
grafcets.
Actions continues
weather
A: action (exit at 1)
Conditional actions
A conditional action is only executed if the associated step is active.
and if the associated condition is true. They can be broken down into 3 cases.
individuals:
weather
Condition X
i
i C Order A Condition.
A = Cond . X
i
CHAPTER 3. THE GRAFCET 26
weather
5s 5s
X
i
i The Order A D
A = t/X /D . X
i i
D is the duration of the delay, that is to say the time taken to switch to 1.
after XIlet it be passed to 1.
weather
2s 2s
X
i
i L Order A L
A = t/X /L . X
i i
Memorable actions
X
n
X
m
m R Stop Order A
A
CHAPTER 3. THE GRAFCET 27
One can thus give the equation of order A as a function of the states of
m
[Link],nsitocndieblipso,pests
Sensor C1
C1
C1
weather
En Sn
t1 t2
En
Weather
Sn
t1 t2
´
Rule N°3 – Evolution of active stages
Crossing a transition necessarily leads to this order
the deactivation of all these upstream steps and the activation of its downstream steps.
2 20
a b a b g
3 21
h i
c hi
4 22
Leapfrog Takeover
sequence
Structured literal language
Role This instruction allows to stop the execution of the loop and to continue on
the instruction following the loop end instruction.
Rule of This instruction can only be used in the actions of one of the 3 WHILE loops.
programming
This instruction is linked to the nearest encompassing loop, that is to say
that it does not stop the execution of all the loops that encompass it.
Example In this example, the EXIT instruction allows to stop the REPEAT loop but in
no case for the WHILE loop.
160 TLXDRPL7xx
CHAPTER 3. THE GRAFCET 31
4 S 30 30
X 32 X4
5 31
X4
GRAFCET GRAFCET
Master Slave
At the start, the initial steps of the two Grafcets are activated. In the
Master, the activation of step 4, X4= 1, will activate the execution of the grafcet
slave by validating the first transition, and trigger the
receptivity X32In the slave, the activation of step 32, X32= 1, provoke
the emergence of receptivity X in the master32who authorizes the unfolding
from the main program, by devalidating X4 This step 32 'hands over to
master
There is another method to return control to the master grafcet, which
by the way is the most used. It is illustrated below and uses a tem-
activation to keep variable X32 at 1 for 1 second in order to make the
hand to master.
CHAPTER 3. THE GRAFCET 33
4 S 30 30
X 32 X4
5 31
GRAFCET
Slave
Switching
Synchronization step
without action
by
a 1
– the security procedures, that is to say the stopping of the automation if a condition
An abnormal detection is made, for example, the detection of an incorrect object.
right or poorly positioned;
– the initial conditions, that is to say the different resting positions (at
departure from the cycle), the state of the food supply and all the tests of-
You need to verify the initial conditions.
dcy·CI
End of cycle
Here is the GRAFCET type for a single cycle, with the condition of
validation : dcy·CI
- dcy being the starting order given by the operator;
CI represents the variable for the initial conditions.
1 Seeing if CI
CHAPTER 3. THE GRAFCET 37
1 1
dcy↑CI dcy·CI
n+1
X1
dcy
20 1
21 2
acy
End
CHAPTER 3. THE GRAFCET 38
Solution No. 1
20 1
21 2
acy
End
m→ manual
1 a→ car
m
m⋅a a a
i i
e ⋅ (E E+ S) or a waiting step
e⋅ E E e⋅ E E
3.6.4 Stops
– Temporary stop
X11
10 n
market X11
stop
master grafcet
slave grafcet:
temporary stop
Emergency stop
X31
30 n
AU X31
master grafcet
slave grafcet :
emergency stop
CHAPTER 3. THE GRAFCET 41
41 Valid actions
AU Σd
42 Wait 45 In default
44 ? 47 Condition
end end
X40
5. Implementation of the GRAFCET
1. FORMULATION OF GRAFCET
1.1. objective
Let the part of the grafcet represented by the figure on the right. To describe n-1
for the activity of step n, we will use the following notation:
tn-1
Xn= 1 if the step n is active:
Xn= 0 if the step n is inactive, n
The evolution rules of GRAFCET (see chapter rules) are the starting point of
logical equations.
• 2thrule:
CAXn= [Link]-1
• If the CA and CD of step n are false, step n remains in its state. This is what we
call the memory effect (see sequential logic chapter). That is to say that the state of Xn at
the instant t+δit depends on the previous state of Xn at time t
According to these three previous points, we can therefore write: Xn= f ( CAXn, Xn , CDXn)
CAXnCDXn
00 01 11 10
Xn
0 0 0 1 1
1 1 0 1 1
Equation of Xn :
X n = CAXn+ CDXn .Xn
or Xn= [Link]−1
+ X−1n .X n +1
6 30 47
a b c
7 31 48
d e
x z
10 20 6
y w f
11 21 7
Divergence in OU Convergence in OU
6 30 47
a b c
7 31 48
x
d
10 20 6
y w f
11 21 7
Start of ET End of ET
Upon initializing the GRAFCET, all steps other than the initial steps are
deactivated. Only the initial steps are activated.
Let the variables Emergency Stop (AUdur and AUdoux) be such that:
Generalization:
i-1
ti-1
i CAXi CDXi Equation of Xi
ti X i−1 .tI−1+ Init X i+1 .Init (
XI= CAX+ CDX.X
i i+ Init.
i AUdur )
i+1
i+1
• Equation of actions
3 A A = [Link]
Xn-1
&
≥1 Xn
tn-1
Xn + 1
1
&
1
Towards deactivation
State of the step
from step Xn-1
Xn+1
Each step of the GRAFCET will be wired as described in the phase module.
Previously. An electric sequencer is then made using logic gates.
A B
0
m
Step Step Step
1 A
0 1 2
a
2 B
b b m a
In order to take into account the operating and stopping modes of the GRAFCET, the module of a
The step must include the initialization and emergency stop hard as indicated by the
logical equations of the steps of the previous GRAFCET:
Step equations:
( )
X 0 = X2.b + X 1 .X 0 + Init .AUdur
X1 = (X .m + X .X ).[Link]
0 2 1
X2 = (X .a + X .X ).[Link]
1 0 2
R S Qt+1 R Q
0 0 Qt
0 1 1
1 0 0 S
1 1 -
RemarkFor the state S=R=1, the output value of the flip-flop is indeterminate. It
depends only on the manufacturing components. If the RS flip-flop is manufactured
technologically with NOR gates, there will be priority-disable memory and in
the case of implementing RS flip-flops with gates NANDthere will be memory activation
priority (solution chosen to adapt RS toggles to GRAFCET).
CDXn R Q Step Xn
CAXn S
The following wiring does not take emergency stops (Audur & Audoux) into account.
Qi-1 ti-1
Action associated with
Step Xi
&
≥1 Si Qi Validation of the transition
Init
(vers Si+1)
& Ri Ri-1 condition of
deactivation of the step
previous Xi-1
Init Qi+1
0
m
1 A
a
2 B
b
Xn CAXn CDXn
0 X 2.b + Init X 1 . Init
1 X [Link] X2+ Init
2 X 1 .a . Init X 0 + Init
Wiring of GRAFCET:
A B
b m a
&
≥1 S0 Q0 & S1 Q1 & S2 Q2
R0 ≥1 R1 ≥1 R2
&
init
1 init
• Initial step:
CAXnAudur Xn
S
Init
CDXnInit Xn
R
Audur
• StepNOinitial
CAXnInit AUdur Xn
S
CDXn
Xn
Init R
Durable
Xn AUdoux Action
2 B 5 A
b a
3 C 6 D
c
d1 d2
7 E 9 F
e f
4 8
=1
Xi CAXi CDXi
1 +
X4 . X 8Init X2. X [Link]
2 m.
X [Link] X 3 + Init
3 .b.
X2Init X4 + Init
4 X 3 .[Link] X 1+ Init
5 X 1 .[Link] X 6 + Init
6 X [Link] X 7 + X 9 + Init
7 X [Link] X 8 + init
8 ( X 7.e + X 9. f).Init X 1+ Init
9 X 6.d [Link] +
X 8init
Audur
X1 m Init Audur X2
S
X3 X2 X6 d1 Init Audur X7
R S
Init X8 X7
R
Audur Init
Audur
X2 b Init Audur X3
S
X4 X3 X7 e Init Audur X8
R S
Init X9 f
Audur X1 X8
R
Init
X3 c Init Audur X4
S Audur
X1 X4
R
Init X6 d2 Init Audur X9
S
Audur X8 X9
R
Init
X1 m Init Audur X5
S Audur
X6 X5
R
Init X5 Audoux A
Odor X2 Audoux B
X3 Audoux C
X6 Audoux D
X7 Audoux E
X9 Audoux F
cf. TP
cf. TP
see 5emeyear
There are finally so-called safety automata (APIdS) that integrate monitoring functions and
increased redundancy and ensure the safety of the equipment.
With the development of automated systems and electronics (ASIC circuits), the search for
reduction of costs and the current necessity to manage production as best as possible, that is to say:
new wiring and communication technologies have emerged between the various components
automatism.
To reduce the wiring costs of input/output for controllers (extended systems), are
appeared the field buses. The use of remote input/output blocks allowed initially to
respond to this requirement.
A
C E E E E
Before: L U
O / / / /
I C
M S S S S
The sensors / pre-actuators M
distant involved large
cable lengths.
Machine 2
Machine 1 Machine 2
Machine 1
14 / 17
9. Industrial networks 9.4 Network technologies
bNetwork topology
An industrial network is made up of PLCs, human-machine interfaces,
computers and I/O devices linked together by communication links such
as electric cables, optical fibers, radio links, and interface elements such as
network cards and gateways. The physical layout of a network is the
hardware topology or network architecture.
For the circulation of information, the term used is software topology.
Topologies are usually divided as follows:
bus
star
tree
ring
Fig. 4 Network topology hub.
Bus topology
This is one of the simplest layouts; all the elements are wired together
along the same transmission line. The word bus refers to the physical line.
This topology is easily implemented and the failure of a node or element
does not prevent the other devices from working.
Machine and sensor level networks, otherwise known as field buses,
use this system.
The bus topology is implemented by linking devices together in a chain.
or to the main cable via a connection box (TAP)(CFig.4).
Star topology
This is the Ethernet topology, the most common in management and the shop.
floor levels(CFig.5)It has the advantage of being very flexible to run and
repair. The end stations are linked together via an intermediate device
(repeater, switch). Failure of a node does not prevent the network as a
whole from working, though the intermediate device linking the nodes
AFig. 5 Star network topology
together is a point of weakness.
Other topologies(CFig.6)
The ring topology uses the same hardware layout as the star.
topology but ensures greater network availability.
The hub topology is not very widespread in industry and has 9
the disadvantage of a large number of links.
Ring Hub
The ring topology uses the same hard- The hub topology is not very widespread
The layout is like the star topology but in industry and has the disadvantage of
ensures greater network availability. a large number of links.
203
A
C B E E
L U
era
1 évolution : O U / /
I C
M S S S
M
Input interfaces/
outputs are shifted at most
near the sensors. Machine 2
I/O
Machine 1
With the advent of ASICs, sensors, detectors ... have become 'smart' and have allowed for...
connect directly to the bus (medium).
A
C B
L U
O U
I C Interface
M S
M
Today:
Machine 1 Machine 2
Machine 1
Example:
The ASi (Actuators Sensors interface) bus is a Master/Slave type sensor/actuator bus that
allows the connection of 31 slaves (sensors or pre-actuators) on a specific cable (two wires)
transporting data and power.
This bus is totally standardized and allows the use of technologies from several manufacturers.
(interoperability). The device is therefore equipped with an ASi coupler.
15 / 17
Advantages of field buses:
The emergence of these new technologies has led to the definition of several categories of
industrial local networks (CIM pyramid):
The need for communication between cells (communication between automata) has allowed us to see
numerous communication standards (Profibus, Fip ...) appear.
The necessary determinism for certain applications leads to the use of Master/Slave networks.
At the company level, time is no longer critical and the Ethernet standard has been able to develop quickly.
thus allowing the visualization and control of processes via the Internet.
The current trend is towards the introduction of Ethernet networks as close as possible to the automation systems (for example:
Profinet standards.
16 / 17
IX. Criteria for choosing an automatic device:
The choice of a programmable logic controller is primarily the choice of a company or a group and
Business contacts and lived experiences are already a starting point.
The large companies will favor two manufacturers to create competition and be able to '...
"return" in case of "loss of speed" of one of them.
However, maintenance personnel must be trained on this equipment and too great a diversity of
equipment can have serious repercussions. An automated system using programming languages of
GRAFCET type is also preferable for ensuring adjustments and troubleshooting in the
best conditions.
The possession of programming software is also a source of savings (purchase of the software and
staff training). Tools allowing for program simulation are also
desirable.
Number of inputs/outputs: the number of cards can impact the number of racks from
that the number of required inputs/outputs becomes high.
Processor type: memory size, processing speed and the special functions offered by
the processor will allow for choice in the often very extensive range.
Special functions or modules: certain cards (axis control, weighing ...) will allow for
relieve the processor and will need to provide the desired features (resolution, ...).
Communication functions: the automated system must be able to communicate with other systems.
command (API, supervision ...) and provide communication capabilities with standards
standardized (Profibus ...).
17 / 17