Unit-III Computer Organization and Architecture

Computer architecture defines how a computer’s components communicate

through electronic signals to perform input, processing, and output operations.
 It covers the design and organization of the CPU, memory, storage, and
input/output devices.
 Describes how these components interact through buses, control signals,
and data pathways.
 It directly influences the overall speed, functionality, and reliability of a
computer system.

Computer instruction

A computer instruction is a binary code that determines the micro-operations in a

sequence for a computer. They are saved in the memory along with the
information. Each computer has its specific group of instructions.

They can be categorized into two elements as Operation codes (Opcodes) and
Address. Opcodes specify the operation for specific instructions. An address
determines the registers or the areas that can be used for that operation.
Operands are definite elements of computer instruction that show what
information is to be operated on.
 Instruction code structure
 Opcode: A group of bits that defines the operation to be performed, such as addition,
subtraction, or a logical shift. The number of bits in the opcode determines the total
number of different operations the processor can perform.

 Address: A group of bits that specifies the location of the data, or operand, on which
the operation is to be performed. This data can be numbers, characters, or even the
address of another location in memory.

 Addressing mode: A field that determines how the address is interpreted, specifying
whether the address is direct, indirect, or immediate, among other methods.

How they work together

1. An instruction code is retrieved from memory, stored as a sequence of bits.

2. The processor interprets the code, separating the opcode from the address part.
3. The opcode tells the processor what to do, and the address tells it where the data is
located.
4. The processor then executes the required sequence of micro-operations using the
specified data.

Computer registers

Computer registers are small, high-speed storage locations built directly into the CPU used for
temporarily holding data, instructions, and memory addresses during processing. They are the
fastest type of memory in a computer, allowing the CPU to access critical information almost
instantly to execute instructions efficiently. Common types include the program counter, which
stores the address of the next instruction, the instruction register, which holds the current
instruction, and the memory address register, which holds a memory address for the CPU.

Key functions of computer registers

 Hold data: They temporarily store the data that the CPU is actively working with.

 Store instructions: Registers hold instructions that are being executed or are about to be
executed.
 Keep track of memory: They store memory addresses to allow the CPU to fetch or store data.

Examples of common computer registers

 Program Counter (PC): Holds the memory address of the next instruction to be executed.

 Instruction Register (IR): Holds the current instruction being executed by the CPU.

 Memory Address Register (MAR): Holds the memory address of the data or instruction the CPU
wants to access.

 Memory Buffer Register (MBR) / Memory Data Register (MDR): Holds the data being
transferred to or from memory.

 Accumulator: Holds the results of arithmetic and logic operations.

 General Purpose Registers: Used for temporary storage during computation.

 Stack Pointer: Keeps track of the current position in the stack, a region of memory used for
function calls and local variables.
 Instruction Cycle
The instruction cycle is the fundamental process for a CPU to execute a single instruction, which
is also known as the fetch–decode–execute cycle.

 Fetch:

The CPU retrieves the next instruction from the memory address indicated by the program counter
(PC). The instruction is then loaded into the instruction register, and the PC is incremented to
point to the next instruction.

 Decode:

The CPU's control unit decodes the instruction to understand what operation is required and which
operands (data) are needed.

 Execute:

The CPU performs the action specified by the instruction, such as an arithmetic calculation or a
data transfer. This step may also involve fetching operands from memory, which is sometimes
called the "read effective address" phase.

 Store (or Write Back):

The result of the execution is written back to a register or memory if the instruction requires it. This
step is sometimes included in the execute phase or treated as a separate stage in more complex
pipelines.

 Repeat:
After the instruction is fully executed and any results are stored, the cycle begins again with the
next instruction pointed to by the program counter.

Basic Computer Instructions

Basic computer instructions are commands given to a computer to perform

specific tasks. These instructions are typically divided into three categories:
1. Data Transfer Instructions: Move data between memory and registers
(e.g., Load, Store).
1. Arithmetic and Logic Instructions: Perform math or logic operations
(e.g., Add, Subtract, AND, OR).
1. Control Instructions: Guide the flow of the program (e.g., Jump, Branch,
Call).
Data Transfer Instructions

These instructions deal with moving data from one location to another within
the computer. Think of it as copying or transferring information between
various components like memory, registers, or storage.
Common Data Transfer Instructions:
 Load: Copies data from memory to a register (temporary storage inside the
CPU).
 Store: Transfers data from a register to memory.
 Move: Transfers data from one register to another.

Arithmetic and Logic Instructions

These instructions are used to perform mathematical and logical operations.

They enable computers to handle calculations and make decisions based on
certain conditions.

Arithmetic Instructions:
 Add: Adds two numbers.
 Subtract: Subtracts one number from another.
 Multiply: Multiplies two numbers.
 Divide: Divides one number by another.

Logic Instructions:
 AND: Compares two bits and returns 1 if both are 1; otherwise, returns 0.
 OR: Compares two bits and returns 1 if at least one is 1.
 NOT: Inverts a bit (1 becomes 0, and 0 becomes 1).
 XOR (Exclusive OR): Returns 1 if the bits are different, 0 if they are the
same.

Control Instructions

Control instructions determine the flow of execution in a program. They guide

the computer on which instruction to execute next, allowing flexibility in
decision-making and repeated actions.

Common Control Instructions:

 Jump (JMP): Directs the program to execute a specific instruction
elsewhere in the code.
 Conditional Branch: Jumps to another instruction only if a specific
condition is true. Example: Branch if zero (BZ) or branch if not zero (BNZ).
 Call: Transfers control to a subroutine (a set of instructions performing a
specific task) and returns afterward.
 Return: Brings back control to the main program after a subroutine is
executed.

Memory Reference Instructions

These instructions refer to memory address as an operand. The other operand
is always accumulator. Specifies 12-bit address, 3-bit opcode (other than 111)
and 1-bit addressing mode for direct and indirect addressing.

Register Reference Instructions

These instructions perform operations on registers rather than memory
addresses. The IR(14 - 12) is 111 (differentiates it from memory reference)
and IR(15) is 0 (differentiates it from input/output instructions). The rest 12 bits
specify register operation.

Input/Output Instructions
These instructions are for communication between computer and outside
environment. The IR(14 - 12) is 111 (differentiates it from memory reference)
and IR(15) is 1 (differentiates it from register reference instructions). The rest
12 bits specify I/O operation.
Input-Output Interrupt

An interrupt I/O is a process of data transfer in which an external device or a

peripheral informs the CPU that it is ready for communication and requests the
attention of the CPU.

I/O Configuration
The terminals send and receive serial information. Each portion of serial data has
eight bits of alphanumeric code, where the leftmost bit is continually 0. The serial
data from the input register is transferred into the input register INPR. The output
register OUTR can save the serial data for the printer. These two registers interact
with the Accumulator (AC) in parallel and with a communication interface in a
serial structure.

The Input/Output configuration is displayed in the figure. The transmitter

interface gets serial data from the keyboard and sends it to INPR. The receiver
interface gets data from OUTR and transfers it to the printer serially.
 The input/output registers include eight bits. The FGI is a 1-bit input flag, which
is a control flip-flop. The flag bit is set to 1 when new data is accessible in the
input device and is cleared to 0 when the data is approved through the device.
When a key is clicked on the keyboard, the alphanumeric code equivalent to the
key is shifted to INPR and the input flag FGI is set to 0. The data in INPR cannot
be modified considering the flag is set. The device tests the flag bit; if it is 1, the
data from INPR is sent in parallel into AC, and FGI is cleared to 0.

The output register OUTR works equivalent to the input register INPR.

The flow of data by the OUTR is the opposite of INPR. Therefore, the output flag
FGO is set to 1 originally. The device tests the flag bit; if it is 1, the data from AC
is sent in parallel to OUTR, and FGO is cleared to 0. The new data cannot be
loaded into OUTR when the FGO is 0 because this condition denotes that the
output device is in the procedure of printing a character.

Central Processing Unit (CPU)

A Central Processing Unit (CPU) is the primary component of a computer, often called
the "brain," that executes instructions and performs calculations, logic, and data
management. It handles the majority of a computer's processing tasks, from running the
operating system and applications to making simple operations like typing a character
appear on the screen possible. The CPU receives instructions from memory, processes
them, and sends the results to other parts of the system, significantly impacting the overall
speed and efficiency of the device.

Key functions of the CPU

 Executes instructions:

The CPU reads and processes instructions from computer programs, which are lists of
commands.

 Performs calculations:

It handles the basic arithmetic and logical operations required for all computing tasks.

 Manages data flow:

It controls the flow of data between different components of the computer system.
 Controls other parts:
It sends signals to coordinate the actions of other hardware components, similar to how
a brain controls a body.

General Register Organization uses multiple general-purpose registers for fast data access,
allowing flexibility in source/destination selection, while Stack Organization uses a LIFO (Last-
In, First-Out) structure with push and pop operations, managed by a Stack Pointer , ideal for
expression evaluation and function calls but limited by fixed size. Both are CPU design types, with
general registers offering speed and flexibility, and stacks providing efficient data management
for specific tasks.

General Register Organization

 Concept: Employs several general-purpose registers (e.g., R1, R2, R3) that can be used as
sources or destinations for operations, instead of a single accumulator.

 How it Works: Instructions specify which registers to use (e.g., ADD R1, R2, R3 for R1 ← R2
+ R3 ), enabling complex operations with fewer memory accesses.

 Control: A control unit uses selection lines (like SELA , SELB , SELD ) to route data from
registers to the ALU and store results back into a destination register.

 Advantages: Faster execution due to data locality, efficient for complex instructions, fewer
memory references.

 Disadvantages: Higher hardware cost due to more registers.

Stack Organization
 Concept: A hardware stack (memory locations + Stack Pointer register) follows the LIFO
principle, like a stack of plates.

 Operations:

o Push: Adds an item to the top of the stack, incrementing the Stack Pointer (SP).

o Pop: Removes the top item, decrementing the SP.

 Instruction Format: Often uses zero-address instructions (operands implicitly on the stack),
reducing instruction size.
 Advantages: Simplifies complex expressions (e.g., function calls, expression evaluation),
compact instructions.

 Disadvantages: Fixed size leading to stack overflow; no random access to elements.

Instruction formats are the bit patterns of instructions, defining the layout of an
operation code and its operands. The primary types are classified by the number of
addresses they contain: zero, one, two, and three-address instructions, with each format
specifying how data is accessed and manipulated.

Types of instruction formats

 Zero-Address Instruction Format:

These instructions do not have an address field, as the operands are implicitly stored,
often in a stack.
 Example: A PUSH A instruction pushes the value of A onto the stack.
 One-Address Instruction Format:

Uses a single address field and implicitly uses a special register, the accumulator, to
perform operations.
 Example: LOAD C might load the value from memory location C into the accumulator,
and ADD B would then add the value of B to the accumulator.
 Two-Address Instruction Format:

Uses two address fields. The destination is often the first operand, and the second
operand is the source.
 Example: MOV R1, A moves the content of memory location A into register R1. A
subsequent ADD R1, B would add the content of B to R1, storing the result in R1.
 Three-Address Instruction Format:
Specifies two source operands and a destination for the result.

 Example: ADD R1, A, B adds the values from memory locations A and B, storing the
result in register R1.
Addressing Modes
Addressing modes are techniques used by the CPU to identify the location of
the operand(s) needed for executing an instruction. They provide rules for
interpreting the address field in an instruction, helping the CPU fetch
operands correctly.
 Opcode – Tells the CPU what operation to perform (e.g., ADD, MOV).
 Operands – The data or addresses on which the operation is performed.

Addressing Modes Types

Implicit (Implied) Addressing

The instruction does not mention the operand directly. The CPU knows what
to use from the instruction itself, usually a special register like the
accumulator or the stack.

It is used for special instructions or control commands like CLA, PUSH, and
RET, where the operand is automatically known from the instruction itself

Immediate Addressing
The operand is the part of the instruction itself. It is used when the value is
known while writing the program.
Example: MOV R1, #5 moves the value 5 into register R1, where #5 is the
immediate value.

Direct Addressing
The instruction contains the memory address of the operand. The CPU
accesses the data directly from that address.

Example: LOAD R1, 1000 loads data from memory address 1000 into register
R1.

Indirect Addressing
The instruction contains the address of a register or memory location that
holds the actual address of the operand. The CPU first fetches this address,
then accesses the operand.
Example: LOAD R1, (R2) loads data from the memory location whose
address is in register R2.

Register Addressing
The operand is located in a CPU register specified by the instruction.

Step:
 The instruction specifies a register (R).
 The CPU takes operand directly from register R.

Example: MOV A, B operates between registers A and B.

Register Indirect Addressing
The register specified in the instruction contains the memory address of the
operand.

Step:
 The instruction specifies a register.
 This register holds the address (A).
 The CPU fetches the operand from memory location A.

Example: MOV A, [R1] uses content of R1 as memory address.

Displacement Addressing (Indexed, Base-Register, Relative)

The operand’s effective address is calculated by adding a constant value

(displacement) to the contents of one or more registers.
Step:
 The instruction provides a base register (R) and an address part (A).
 CPU adds the value of R and A to get the effective operand address.
 Operand is fetched from the calculated address in memory.

Example: Used for arrays, accessing an element at a position relative to a

base.

Data transfer instructions

Data transfer instructions move data between different locations within a computer, such as
memory and registers, without changing its content. Common instructions
include MOV (copy), LOAD (memory to register), STORE (register to
memory), XCHG (exchange), and PUSH/POP (stack operations). Instructions also exist for
input/output devices (IN/OUT) and can be found in assembly language for microprocessors and
in high-level languages.
 Move ( MOV ): Copies data from a source to a destination. For example, MOV destination,
source .

 Load ( LD or LOAD ): Transfers data from memory to a processor register.

 Store ( ST or STORE ): Transfers data from a processor register to a memory location.

 Exchange ( XCHG or XCH ): Swaps the contents of two locations, such as two registers or a
register and memory.

 Push ( PUSH ): Places data onto the top of a stack, typically used for temporary storage or function
calls.

 Pop ( POP ): Retrieves data from the top of a stack and moves it to a register.

 Input ( IN ): Transfers data from an input/output port to an accumulator (a register).

 Output ( OUT ): Transfers data from the accumulator to an output port.

Data manipulation instructions

Data manipulation instructions perform operations on data, typically categorized into

three types: arithmetic, logical and bit manipulation, and shift instructions. Arithmetic
instructions perform calculations like addition and subtraction, logical instructions
manipulate individual bits (e.g., AND, OR, XOR), and shift instructions move bits left or
right within a register.

1. Arithmetic instructions
 Perform mathematical operations on data.

 Examples include ADD, SUB (subtract), MUL (multiply), DIV (divide), INC (increment),
and DEC (decrement).

2. Logical and bit manipulation instructions

 Perform logical operations on strings of bits.

 Examples include:
o AND, OR, XOR (exclusive-or)

o CLR (clear), which sets all bits to zero

o COM (complement), which inverts all bits (1's complement)

3. Shift instructions
 Move bits within a register to the left or right.

 Types include:
o Logical shift: Shifts bits and inserts zeros in the vacated positions. For
example, SHL (Shift Left) and SHR (Shift Right).

o Arithmetic shift: Shifts bits but preserves the sign bit during a right shift for signed
numbers.

o Rotate: Shifts bits while "rotating" the bits that are shifted out of one end back into the
other end, sometimes including the carry bit ( ROL, ROR, RORC, ROLC).

Reduced Instruction Set Computer (RISC)

A Reduced Instruction Set Computer (RISC) is a processor architecture that uses a small, highly-
optimized set of simple instructions, which can execute in a single clock cycle. This approach
simplifies the instruction decoding process, allows for easy pipelining, and uses more general-
purpose registers compared to the complex, multi-cycle instructions found in CISC (Complex
Instruction Set Computer) architectures. RISC designs are common in smartphones, tablets, and
other devices, with ARM being a widely used RISC architecture.

Key characteristics of RISC architecture:

 Simple instructions: Each instruction performs a single, simple task, making them faster to
execute and easier to pipeline.

 Single-cycle execution: Most instructions can be completed in one clock cycle, leading to faster
processing.

 Large number of registers: RISC processors have a greater number of general-purpose

registers, which are used to hold data for operations and reduce the need for frequent memory
access.

 Fixed-length instructions: Instructions are typically of a fixed length, which simplifies the
instruction pipeline and allows for parallel execution.
 Load/store architecture: Only specific "load" and "store" instructions access memory. Other
instructions operate on data that is already in registers, which speeds up execution.

 Software-centric design: Compilers are responsible for breaking down complex tasks into many
simple instructions, which is a key part of the RISC design philosophy.

Advantages of RISC:
 Simpler design: The simplified instruction set makes processor design easier and more efficient.

 Faster execution: Simple instructions and single-cycle execution lead to faster overall
performance.

 Efficient pipelining: The fixed length and simplicity of instructions make it easier to implement
the instruction pipeline technique, where multiple instructions are in different stages of execution
simultaneously.

Disadvantages of RISC:
 More instructions: A single complex task may require a larger number of instructions compared
to CISC, potentially increasing program length.

 Compiler dependency: The efficiency of the system heavily relies on the compiler's ability to
effectively translate high-level code into the RISC instruction set.
RISC Vs CISC

RISC (Reduced Instruction Set Computer) and CISC (Complex Instruction Set Computer) are two
processor design philosophies that differ in their instruction sets. RISC uses a small set of simple,
fixed-length instructions that execute in a single clock cycle, while CISC uses a large set of
complex, variable-length instructions that can take multiple clock cycles to execute. The primary
trade-off is between a simpler design (RISC) that requires more instructions per task and a more
complex design (CISC) that requires fewer instructions but is slower per instruction.

RISC and CISC are two different ways of designing computer processors.
 RISC uses a small set of simple, fixed-size instructions designed to
execute in a single clock cycle.
 CISC includes a larger set of instructions, many of which are complex and
can perform multiple operations (e.g., memory access and computation)
in a single instruction.
 CISC instructions often require multiple clock cycles.

Feature RISC (Reduced Instruction Set CISC (Complex Instruction Set

Computer) Computer)

Instruction Set Small, simple, and limited number of Large, complex instructions that can
instructions. perform multiple operations.

Instruction Format Fixed-length. Variable-length.

Cycles Per Executes in a single clock cycle. Takes multiple clock cycles.
Instruction (CPI)

Hardware Focuses on software (compilers) for Focuses on hardware complexity for

vs. Software optimization. optimization.

Registers More general-purpose registers. Fewer general-purpose registers.

Memory Memory is only accessed Instructions can directly operate on

via LOAD and STORE instructions. memory.

Pipelining Easier due to simple instructions. More difficult due to complex

instructions.

Power Lower power consumption. Higher power consumption.

Consumption