Structure of the 68000

TSII Course - [Link]

1) Introduction:
This chapter aims to uncover the main mechanisms of machine language. We will discover there
the characteristics of the 68000, its operating principles, its addressing modes...
Everyone should, after this chapter, know how to analyze and understand a 68000 instruction in general.
The first real exercises can be addressed during the study of the chapter...

Internal organization of the 68000

The figure above shows the internal organization of a microprocessor (MPU Micro-Processing Unit).
and distinguishes:
an ALU (Arithmetic and Logic Unit)
internal records
a CU (control Unit)
Our MPU has 3 buses (a coherent set of signals):
a data bus (16/32 bits)
a bus of addresses (23/32 bits)
a command bus

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The bidirectional data bus is used for the exchange of information between the MicroProcessor and its
environment (memory or peripherals for example).
The address bus is used to select the location where information that needs to be transferred on the bus is located.
data
The command bus transports the various command and synchronization signals required by the system.

3) Organization of Memory:
While a microprocessor is a formidable calculating machine, it still has regrettable issues.
flaws... The greatest of them being its inability to remember numerous pieces of information.
Indeed, only registers allow a microprocessor to keep track of previous results, and
these are of course insufficient for significant processing... These records are however
memories at very high speed, included in the processor, and their use will be essential...
We will use external RAM to compensate for the shortcomings of the microprocessor, a catch-all in
which we will accommodate:
Our programs
Our data (Initialized or Not)
Our Battery
And many other sources of trouble and collisions...

This division is purely formal, and these areas are so identical that the programmer can
very well modify a program like a data area, execute a data area like a
program ...
On a microcomputer, one can even achieve the concurrent management of several applications, with
each a program area, a data area, a clean stack... Windows or Unix provide some
perfect examples of what has just been said...

Sequencing of an Instruction:
Let's try to describe how the 68000 operates when accessing the memory designated by the
PC register (Program Counter) of hexadecimal words:

$ 21F9 00FC 0024 2400

The execution cycle of this instruction can be broken down into:
a) Reading the operational code $21F9:
This code is analyzed by the 68000 decoder to determine what type of action it will have to execute, the
The following words can only constitute parameters of the action. The manual discovery of the
The meaning of $21F9 can only be determined by researching in a reference manual for the 68000.
In binary:
$21F9 = % 00 10 000 111 111 001
This code has been deliberately broken down into understandable blocks to make it easier to read:

00 = MOVE
10 = .L
000 111 = The Destination operand is a 16-bit memory address...
111 001 = The Source operand is a 32-bit memory address...

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The instruction to be executed is therefore fully described; it is about:

MOVE.L $FC0024,$2400
The sequencer of the 68000 now knows what it has to do.
b) Reading the following word:
The value $00FC is stored in a buffer register of the data bus... No other action is
company by the CPU... This is typically the kind of action that slows down a 68000 compared to its big brother the
68020 for example (32-bit management on the data bus) or against its competitor the 80286 (16-bit management)
bits of addresses in real mode)...
c) Reading of the following word:
These 16 bits will constitute the 16 least significant bits of the source operand address. The set formed
The previously read 16 bits are immediately transmitted on the address bus.
d) Reading the operand Source:
Or at least the first part of this operand since its size is 32 bits... The value
the blue is stored in a buffer register of the data bus... The value present on the Address bus
is automatically incremented by 2 units.
Reading of the source operand
At the end of this reading, the 32-bit value of the source operand is now fully present in a
bus data log...
Reading the destination
The sequencer puts the PC back on the address bus and triggers the reading of the address of the
destination. This value is immediately extended to 32 bits and placed on the address bus. Note that
PC is immediately incremented and now points to the next instruction to be executed.
Writing about the destination
The buffer register is now unloaded onto the data bus, and the 16 high-order bits are written.
in memory. The address bus is incremented by 2 immediately...
Writing about the destination
The 16 most significant bits are transmitted to the address marked by the address bus. The current instruction
is therefore completely finished.

This instruction was carried out in 8 cycles, 6 read cycles and 2 write cycles. In the case of this
instruction, no other work is done by the 68000 (unlike, for example, an addition or at
a multiplication)...
Knowing the execution time of a read or write cycle, which is 4 clock cycles, one can
predict the exact execution time of the instruction, which is here 32 clock cycles.

Motorola recommends using the notation to describe these times: 32(6/2)

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5) Structuring of Registers:
Registers are prime locations for data storage and are an integral part of
microprocessor. Their access is therefore very simple and very fast.
The transfer of a 32-bit data from one register to another can be written:

MOVE.L D0, D1 and its execution time is 4(1/0)

The only reading cycle is that of the operational code itself ($2001), the execution itself is
almost instantaneous...
The 68000 has a large number of registers and therefore allows for a very high speed, since most of the
Algorithms can be processed using registers only. However, all the registers of
68000 do not have an exactly identical operation, and it is necessary to know the details well.
to avoid gross logical errors...
D0.D1.D2.D3.D4.D5.D6.D7 - The Data Registers:

Data registers are the most flexible that the 68000 has. They can
32 bits always be used as an operand in an instruction.
The user can choose the format of each of these registers separately at any time.
among 8, 16 or 32 bits. The size of the register determines the execution format of
the instruction. A correct addition on 16 bits can cause an overflow
16 bits 8-bit capacity.

8 bits The usage format is specified, not in the registry itself but in the code.
operational of the instruction to be executed. If an instruction requires two operands, it is
it is obvious that the microprocessor assigns them the same size...

Examples: MOVE.W D0,D1 D0 & D1 are 16 bits

NOT.L D6 D6 is 32 bits
ADD.B D0,D1 D0 & D1 are 8 bits

A0.A1.A2.A3.A4.A5.A6 - The Address Registers:

The address registers A0 to A6 should normally be used as a pointer to the

32 bits memory (this explains the direct connection in the diagram on page 1 of these
Extension registers with the address bus). They do not apparently contain data but rather
32-bit the addresses where the data are located.

16 bits However, nothing prohibits using them to store data or perform

calculations, provided that the specifics of the address registers are taken into account.

Indeed, the address registers only support 16 and 32-bit formats. In 16-bit format
bits, a 32-bit sign extension is systematically performed by the 68000.

Examples: MOVEA.L #$8000,A0 places $00008000 in A0

MOVEA.W #$8000,A0 place $FFFF8000 in A0

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Note the use of the MOVEA instruction which means Move To Address Register. However, most
Some assemblers accept the standard MOVE instruction, replacing it with a MOVEA during the
compilation.
In any case, it would be better to use the LEA (Load Effective Address) instruction here:

MOVEA.L #$8000,A0 LEA.L $8000,A0

A7 or USP / SSP - Stack Pointer Register:

The A7 register is an address register, and it has all the characteristics described above. It can
to be used exactly like registers A0 to A6 ...
However, this register has the particularity of being directly used by the 68000, as a pointer for
pile. Because our good 68000 needs to store dynamically (Oh, how important this word is here)
information related to its operation, local variables (let's talk at the moment about zone
temporary storage), return address of subroutine, parameter passing, interrupt (you
you can very briefly overlook this last point.

This can be summarized by the following diagram:

.....
Parameter N
Parameter N-1
......
Parameter 2
Parameter 1
Return Address
Variable Locale 1
Variable Locale 2
.....

The last point (interruptions), the premonition of the advent of multitasking, an experience
previous (the 6809) even prompted Motorola to integrate 2 stacks in the 68000, USP and SSP which keep
both at a given moment the name of A7... It is USP that will be implicitly used in our
applications...
The 68000 system stack is of the FIFO (First In, First Out) type as opposed to LIFO type stacks.
(Last In, First Out), and the information is stored in a descending manner (to avoid as much as possible
the collisions between DATAs and stack)...
Register A7 can and should be used by the programmer to provide arguments to functions.
booking spaces for personal needs... Maintaining the stack in good condition is of course the responsibility of the
programmer. You are asked to leave these places in the state... etc...

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SR or CCR - Status Register or Code Condition Register
SR is the Status Register of the 68000 that describes the complete state of the processor. This 16-bit register is not
accessible in a normal way only through its 8 low-weight bits, named CCR...
CCR includes the following indicators:

b0 C Carry flag
b1 V overflow flag
b2 Z Zero flag
b3 N Negative flag
b4 X eXtend flag
These indicators will be the subject of numerous conditional instructions, alone or in groups...

PC - Program Counter :

PC is the program counter. It is a pointer and therefore its size is 32 bits. It is the one that manages the
smooth execution of a program, since at each instruction, the PC is placed on the address bus, and
always points to the following instruction (thus an order such as unconditional relative branching
BRA.S -2 ou $30 FE causes the processor to enter an infinite loop)...
No instruction explicitly mentions the word PC, but many instructions have an impact.
implicitly PC... The instruction JMP $3135 is actually a MOVE.L #$3135,PC ...

6) Addressing Modes
To manipulate data and registers, the 68000 has a relatively limited number
instructions, 56 on the 68000. But each of these instructions, with a few exceptions, can operate in
the three formats BYTE, WORD and LONG... and manipulate each of these operands in 14 ways
different (addressing modes) bringing the real number of possible instructions to well over 1000...
To program well in machine language, knowledge of the 14 addressing modes proves to be even more essential.
important that the 56 basic mnemonics...

A few clarifications and examples won't hurt ...

On a basic calculator, you directly type values on the keyboard, and you perform
operations. It concerns the manipulation of constants...
If this same calculator is equipped with memory, you can store or retrieve values on it.
It is indeed about variables... Registers can also be considered as variables of a type
privileged.
Another example, when in mathematics, you write an expression of the type X=8, you assign a
constant value to a variable. And if you describe the multiplication of 2 matrices by a formula
as:
a=b'c
i,j å k=0,n
i,k k,j

you will need to point matrix elements by generic elements represented by the beginning of
matrices in memory...

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The addressing modes of the 68000 contribute to the simplest possible transcription of these different
problems...

The Constants :
Constants can of course only be used as source operands. They are reported when
the writing of an instruction by the symbol: #. This mode is called immediate mode.
Examples:
MOVE.L $56789,D0
MOVE.W #256*6,D1
MOVE.B #-1,D2
This form of addressing requires CPU time corresponding to reading the argument either 4 (1/0)
BYTE or WORD, and8(2/0) in LONG...
There is a somewhat special variant of immediate mode. Motorola has indeed found that the values
the weakest were also by far the most employed. It then seemed to them that it was profitable to anticipate
something special to respond to an instruction like:
MOVE.L #1,D0 which uses 6 bytes and requires 12 (3/0) cycles...
Three specific instructions have then been developed; they are MOVEQ(0 to 255), ADDQ(1 to 8),
SUBQ(1 to 8) forming the particular instruction group using the rapid immediate mode in which the
the operand value is included in the operation code, giving the addressing mode a record time of
0(0/0), the previous instruction becoming:
MOVEQ #1,D0 which uses 2 bytes and requires 4 (1/0) cycles...

The Register Variables:

Already implicitly used in our previous examples, direct addressing of registers is

infinitely fast, 0(0/0) and must therefore be used to the maximum... They are of two types corresponding
to the two types of registers: Dn, data and An, Addresses ...
Examples :
ADD.W #15,D0
MOVE A.LD0, A3
SUB.LD1,D2

Note the MOVEA form which indicates that the destination is an address register. Most of
assemblers accept that we forget the A ...

Memory Variables:

As we have already pointed out, the registers are insufficient in number to store the data that
In general, a program is needed, and then we turn to RAM to store the data. During
In assembly, two addressing modes will be used: the short absolute mode, if the address we want to use...
access is based on 16 bits, and the long absolute mode in the opposite case... The times for this mode
The addressing is summarized in the table below:
.W .L
absolute short 8(2/0) 12(3/0)
absolute long 12(3/0) Division by zero is undefined.
The absolute short mode is most often used exclusively by system ROMs...
It is evident that this mode is starting to raise major issues: how to know the address
of a variable before having written an application and vice versa... The only solution is to leave

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the assembler sets the addresses of our variables, using only symbolic names ourselves, which
will also have the advantage of being more representative of our variables.
Indeed, a variable named Echelle is in my opinion more expressive than $120C4... But everyone remains
free, of course...

Indexed Variables:

In indexed modes, which constitutes the last group of addressing modes, we are going to discuss the
real use of address registers A0-A6, since these registers will indeed serve as an index,
pointer to a variable in memory...
Thus, for example:
MOVE.W D0,MyVariable
is equivalent to
MOVE.L #MyVariable,A0 or better LEA MyVariable, A0
MOVE.W D0,(A0)

This manipulation, which loses all interest here, will gain all its interest if I assume that MyVariable,
constitutes not just a simple variable of type WORD, but a sequence of 10000 integers of type WORD that
are initialized with register D0 ...
You would then write:
MOVE.W D0,MyVariable
MOVE.W D0,MyVariable+2;So happy that the assemblers accept.
........... that is 10000 lines to type
MOVE.W D0,MyVariable+19998

whereas indexed modes would allow you to write:

LEA MyVariable,A0
Loop: MOVE.W D0,(A0)
ADDA.W #2, A0
CMP.L A0,MyVariable+20000
BLE Loop

or by making a few more strides in programming

LEA MyVariable,A0
MOVE.W #9999,D1
Loop: MOVE.W D0,(A0)+
DBF D1,Loop

The improvement of this last example shows us that indexed modes even have interesting
variants. Let's talk before addressing these variants of the performance of this mode, for which the description
the address of the operand is provided in the operation code, making it imperative only to read (or
the writing) of the operand itself, either 8(2/0) in LONG and 4(1/0) in WORD, meaning a gain of
33% or 50% in relation to Long Absolute addressing ...

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As seen on the previous page, there are many variants of this mode, which are:
This is the basic type. Strangely, it is not by far the most used.
(A) Recall its execution times: 4(1/0) in WORD and 8(2/0) in LONG.

Post-Incremented Mode. The address register used as a pointer is, after

(An)+ execution of the current instruction, incremented by 1, 2, or 4 units depending on the
length of the data manipulated by the instruction. This type of addressing is
particularly useful when copying a block of data from one place to another, with an instruction
commeMOVE.L (A0)+,(A1)+ . Note the position of the + outside the parentheses for
well show that it is the pointer that is incremented and not its content (in C, we would have *(p++) and not
The execution times are identical to those of the simple indexed mode...
Similar to the previous mode except that An is decremented before execution of
- the instruction. This makes this addressing mode exactly symmetrical to the previous one.
Note that this instruction takes 2 more clock cycle times than the mode.
post-incremented, either 6(1/0) and 10(2/0) in WORD and LONG...
Indexed Mode with Constant Displacement... The address of the operand is obtained by
$xxxx(An) addition of the displacement on 16 bits and the address register used as a pointer.
This formulation requires times of 8(2/0) in WORD and 12(3/0) in LONG.
This form is particularly well suited for retrieving information in a field.
specific to a structure. (Those who do not ask for any explanation about this last sentence are either
either too intelligent or too lazy.)
The Ultimate in terms of addressing mode, this mode is called Indexed with
$xx(An,Rn) Displacement Register and Offset requires execution times of 10(2/0) in WORD
de14(3/0)enLONG. The element noted Rn is any register, that is to say
Address Register or Data Register. In this latter case, (and this is an exception to the 68000) it
It will be necessary to specify in the operand whether the data register should be taken in WORD or LONG.
This mode is never allowed to describe a destination operand...
Example:
MOVE.B 6(A1,D4.W),D0
MOVE.B #12,0(A0,D0.L)

Relative addressing mode to the program counter. Very rarely used on micro-
$xxxx(PC) advanced computers, it presents, on development boards, the interest of being
independent of where a program will be loaded. However, beginners have
it is important to be wary of this mode and its counterpart below. Execution times are identical to those of
absolute mode short: 8(2/0) and 12(3/0).
The last addressing mode of the 68000, this mode is symmetrical to the mode $xx(An,Rn)
$xx(PC,Rn) with the Program Counter. Its use is very cumbersome.

There are other very specific addressing modes for certain instructions related, for example, to
SR or CCR or even USP.
Similarly, certain instructions remove a level of indirection from the addressing modes. These are the
instructions like LEA, BRA, JMP, BSR, JSR, Bcc, DBcc...

What is or is not allowed as a form of addressing is a complex issue, with few rules, and
a lot of know-how, made even more complex by the variations of the same instruction. Thus
ADD has the forms: ADD, ADDA, ADDI, ADDQ, ADDX... Simple. Right???

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