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Digital System Design Lab Report

This lab report focuses on digital system design through practical experiments, including the investigation of Finite State Machines, a 4-bit Ripple Carry Adder, and a 4-bit multiplier. It emphasizes the construction, simulation, and synthesis of these systems, providing insights into resource usage and RTL diagrams. The hands-on approach enhances skills in modeling and Verilog-based synthesis.

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11 views3 pages

Digital System Design Lab Report

This lab report focuses on digital system design through practical experiments, including the investigation of Finite State Machines, a 4-bit Ripple Carry Adder, and a 4-bit multiplier. It emphasizes the construction, simulation, and synthesis of these systems, providing insights into resource usage and RTL diagrams. The hands-on approach enhances skills in modeling and Verilog-based synthesis.

Uploaded by

siwachashish25
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd

Digital System Design Lab Report(210P)

• Gyan Prakash Verma (B24246)


• Kalga Pradeep (B24248)
• Jadhao Lubha (B24247)
I. INTRODUCTION

This report reviews core aspects of digital system


design through practical experiments. We begin by
investigating a Finite State Machine (FSM), visualizing it
with an ASM chart, and discussing its simulated and
synthesized behavior. These steps clarify how system Fig. 2: Slice Logic
states are managed and translated into hardware.
Additionally, we examine the construction and
synthesis of a 4-bit Ripple Carry Adder and a 4-bit
multiplier. By assessing resource usage and RTL
diagrams, we provide direct insights into how basic
circuits are implemented. Overall, this hands-on
approach strengthens skills in modeling, simulation,
and Verilog-based synthesis.

Fig. 3: Summary of Registers by Type


II. ALGORITHMIC STATE MACHINE (ASM)
III. RIPPLE CARRY ADDER 4 BIT (4 BIT RCA)
A. RTL Schema-c A Ripple Carry Adder enables addition of two 4-bit
numbers by connecting single-bit full adders in
sequence. Each adder passes its carry output to the
next stage, making the design simple yet prone to
increasing delays as more bits are used. This adder is
a great example for learning basic digital addition,
though more advanced designs may be needed for
higher speed

Fig. 1: RTL schema2c for the given ASM


B. Report

Fig. 4: RTL schema2c for 4-bit RCA


A. Report B. Report

Fig. 5: Slice Logic


Fig. 8: Slice Logic

Fig. 6: Summary of Registers by Type Fig. 9: Summary of Registers by Type

4 BIT MULTIPLIER

A 4-bit mul2plier is a digital circuit that mul2plies two 4bit


numbers by genera2ng par2al products and adding them
together. It uses AND gates to form each par2al product and
adders to combine them into the final result. The circuit is
straighOorward but grows larger and more complex as the
number of bits increases.

A. RTL Schema-c

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