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VGA Data Flow: Barrel Shifter & Bit Mask

This chapter discusses the expanded model of data flow in the VGA's Graphics Controller, focusing on the barrel shifter and bit mask functionalities. The barrel shifter allows for the rotation of CPU data without additional processing time, although its utility is limited since the CPU can perform rotations itself. The bit mask circuitry enables selective updating of bits in display memory, controlled by the Bit Mask register, allowing for more versatile graphics operations.

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0% found this document useful (0 votes)
8 views18 pages

VGA Data Flow: Barrel Shifter & Bit Mask

This chapter discusses the expanded model of data flow in the VGA's Graphics Controller, focusing on the barrel shifter and bit mask functionalities. The barrel shifter allows for the rotation of CPU data without additional processing time, although its utility is limited since the CPU can perform rotations itself. The bit mask circuitry enables selective updating of bits in display memory, controlled by the Bit Mask register, allowing for more versatile graphics operations.

Uploaded by

Nuno Gomes
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

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chapter 25

vga data machinery


Ch

*&4‘#
hiker, Bit Mask, and
Set/Reset
In the last chapter, amined a simplified model of data flow within the GC por-
tion of the VGA, .latches and ALUs. Now we’re ready to expand that
modelto
include ifter, bit mask, and
the
set/reset capabilities, leaving
only the write mo lored over thenext few chapters.

tation
expanded model of GC data flow, featuring the barrel shifter
and bit mask circui Let’s look at the barrel shifter first. A barrel shifter is circuitry
capable of shifting-ok rotating, in the VGAs case-data an arbitrary number of bits
in a single operation, as opposed to being able to shift only one bit position at a time.
The barrel shifter in theVGA can rotate incoming CPU data up to seven bits to the
right (toward the least significant bit), with bit 0 wrapping back to bit 7, after which
the VGA continues processing the rotatedbytejust as it normally processes unrotated
CPU data. Thanks to the nature of barrel shifters, this rotation requires no extra
processing time over unrotated VGA operations. The number of bits by which CPU
data is shifted is controlled by bits 2-0 of GC register 3, the Data Rotate register,
which also contains the ALU function select bits (data unmodified, AND, OR, and
XOR) that we looked at in thelast chapter.

463
Data
Data flow
flow through
through the
the Graphics
Graphics Controller:
Figure 25.1
Figure 25.1

The barrelshifter is powerful, but (as sometimes happens in this business) it sounds
more useful than it really is. This is because the GC can only rotate CPU data, atask
that the CPU itself is perfectly capable of performing. Two OUTs are needed to
select a given rotation: one to set the GC Index register, and one to set the Data
Rotate register. However, with careful programmingit’s sometimes possible to leave
the GC Index always pointing to the Data Rotate register, so only one OUT is needed.
Even so, it’s often easier and/or faster to simply have the CPU rotate the data of
interest CL times than to set the Data Rotate register. (Bear in mind that a single
OUT takes from 11 to 31 cycles on a 486-and longer if the VGA is sluggish at re-
sponding to OUTS, as many VGAs are.) If only the VGA could rotate latched data,
then therewould be all sorts of useful applications for rotation, but, sadly, only CPU
data canbe rotated.
The drawing ofbit-mapped textis one use for thebarrel shifter, and I’ll demonstrate that
application below. In general, though, don’tknock yourself out trylng to figure out
how to workdata rotation into your programs-itjust isn’t allthat useful in most cases.

The Bit Mask


The VGA has bit mask circuitry for each of the fourmemory [Link] fourbit masks
operate in parallel and are all driven by the same mask data for each operation,so

464 Chapter 25
Bit mask operation.
Figure 25.2

they’re generally referred to in the singular, as“the bit mask.” Figure 25.2 illustrates
the operation of one bit of the bit mask for one plane. This circuitry occurs eight in times
the bit maskfor a given plane, once for each bit of the byte written to display memory.
Briefly, the bit mask determines on a bit-by-bit basiswhether thesource for each byte
written to display memory isthe ALU for that plane or the latch for that plane.
The bit mask iscontrolled by GC register 8, the Bit Maskregister. If a given bit of the
Bit Maskregister is 1, then the correspondingbit of data from theALUs iswritten to
display memory for all four planes, while if that bit is 0, then the correspondingbit
of data from thelatches for the fourplanes is written to display memory unchanged.
(In write mode 3, the actual bit mask that’sapplied to data written to display memory
is the logical AND of the contentsof the Bit Maskregister and the data written by the
CPU, as we’ll seein Chapter 26.)
The most common use of the bit mask is to allow updating of selected bits within a
display memory byte. This works as follows: The display memory byte of interest is
latched; thebit mask is set to preserve all but thebit or bits to be changed; theCPU
writes to display memory, with the bit mask preserving the indicated latchedbits and
allowing ALU data through to change the other bits. Remember, though, that it is
not possible to alterselected bits in a display memory bytedirectly; the byte must first
be latched by a CPU read, and then the bit mask can keep selected bits ofthe latched
byte unchanged.
Listing 25.1 showsa program that uses the bit mask data rotation capabilities of the
GC to draw bitmapped text at any screen location. The BIOS only draws characters

VGA Data Machinery 465


on character boundaries; in 640x480 graphics mode the default font is drawn on
byte boundaries horizontally and every 16 scan lines vertically. However, withdirect
bitmapped text drawing of the sort used in Listing 25.1, it's possible to draw anyfont
of any size anywhereon the screen (and alot faster than via DOS or the BIOS, as well).

LISTING 25.1 125- [Link]


: Program t o i l l u s t r a t e o p e r a t i o n o f d a t a r o t a t e a n d b i t mask
: f e a t u r e so G
f r a p h i c sC o n t r o l l e r D
. r a w s8 x 8c h a r a c t e ar t
: s p e c i f i e dl o c a t i o n u, s i n g VGA's 8 x 8 ROM f o n tD. e s i g n e d
: f o ru s ew i t h modes OOh, OEh. OFh. 10h. and1Zh.
: By M i c h a e Al b r a s h .

s t a cske g m e npta rsat a c k 'STACK'


d u p5(1?2) d b
set na dc ks

VGACVIOEOCSEGMENT equ OaOOOh :VGA d i s p l a y memorysegment


044ah equ
SCREEN-WIDTH-INCBYTES : o f f s e t o f BIOS v a r i a b l e
FONT-CHARACTER-SIZE equ 8 :# b y t e s i n e a c h f o n t c h a r

: VGA r e g i s t e re q u a t e s .

GC-INDEX 3cehequ ;GC r iengdi es xt e r


GC-ROTATE 3 equ :GCr odt a t ae / l of ug ni ccat il o n
: r e g i s t e ri n d e x
GC-BIT-MASK equ 8 ;GC b i t mask r e g iisntdeer x

d s seegg m epnat r a common 'DATA'


TEST-TEXT-ROW equ 69 :row t o d i s p l a y t e s t t e x t a t
TEST-TEXT-COL equ 17 ;column t o d i s p l a y t e s t t e x t a t
TEST-TEXT-WIDTH 8 equ : w i d t ho fac h a r a c t e ri np i x e l s

Teststring lbaybteel
db 'Helw l oo, r l d ! ':.tOesst rt pi tnroign t .
d dF o n t P o i n t e r ? offset :font
ends
dseg

: Macro t o s e t i n d e x e d r e g i s t e r INDEX o f GC c h i p t o SETTING.

SETGC macro I N D E X . SETTING


mov [Link]-INDEX
mov ax,(SETTING SHL 8 ) OR INDEX
[Link] out
endm

c s es ge g m epnat pr au b l i c 'CODE'
assume cs:cseg, ds:dseg
npsertaoarcr t
mov ax,dseg
mov ds,ax

: S e l e c t6 4 0 x 4 8 0g r a p h i c s mode.

mov ax.012h
int 10h

: S e td r i v e r t o u s et h e8 x 8f o n t .

466 Chapter 25
mov [Link] :VGA B I O S c h a r a c t e rg e n e r a t o rf u n c t i o n ,
mov a1 .30h : r e t u r ni n f os u b f u n c t i o n
p o i nf ot mov
enrt 8 x 8 : g e bt h , 3
int 10h
cSea ecl llt F o n t

: P r i n tt h et e s ts t r i n g .

mov . so if f sTeet s t S t r i n g
mov bx.TEST_TEXT_ROW
mov cx.TEST_TEXT_COL
StringOutLoop:
1 odsb
and a1 .a1
jz StringOutDone
call DrawChar
add cx.TEST_TEXT_WIDTH
S t r i n g jOmupt L o o p
StringOutDone:

: R e s e tt h ed a t ar o t a t ea n db i t mask r e g i s t e r s .

SETGC
GC-ROTATE. 0
SETGC GC_EJT_MASK, O f f h

: W a i tf o r a keystroke.

mov ah.1
int 21h

: R e t u r nt ot e x t mode

mov ax,03h
int 10h

: E x i t t o DOS.

mov ah.4ch
int 21h
Setnadr tp

: S u b r o u t i n et od r a w a t e x tc h a r a c t e ri n a l i n e a rg r a p h i c s mode
: (ODh, OEh. OFh. 0 1 0 h0.1 2 h ) .
: F o n tu s e ds h o u l db ep o i n t e dt ob yF o n t P o i n t e r .

: Input:
: AL
: EX
-
c h a r a c t e rt od r a w
-
r o w t o d r a wt e x tc h a r a c t e ra t
: C X - column t od r a wt e x tc h a r a c t e ra t

: F o r c e s ALU f u n c t i o n t o "move".

DrawChar n e pa r o c
push ax
push bx
push cx
push dx
push si
push di
push bP
push ds

VGA Data Machinery 467


: Set DS:SI t o p o i n t t o f o n t and ES t o p o i n t t o d i s p l a y memory.

. [ F so inI dt Ps of ion; nptt eto ri ]n t


mov [Link]-VIDEO-SEGMENT
d i s p l a ymov t o : p o i ne ts . d x memory

: C a l c u l a t es c r e e na d d r e s so fb y t ec h a r a c t e rs t a r t si n .

push ds : p tooi n t B I O S sdeagtm


a ent
sub dx, dx
mov ds .dx
xchg [Link]
mov [Link]:[SCREEN-WIDTH-IN-BYTES] : r e t r i e v e BIOS
: s c r e e nw i d t h
POP ds
mu1 di c a l c u l a t eo f f s e to fs t a r to fr o w
push di s e ta s i d es c r e e nw i d t h
mov di .cx s e ta s i d et h ec o l u m n
and cl .Olllb k e e po n l yt h ec o l u m ni n - b y t ea d d r e s s
shr d i .1
shr d i .1
shr d i .1 d i v i d ec o l u m nb y 8 t o make a b y t ea d d r e s s
add di ,ax and p o i n t t o b y t e

: C a l c u l a t ef o n ta d d r e s so fc h a r a c t e r .

[Link] sub
bx.1 shl ;assumes8 b y t e sp e rc h a r a c t e r :u s e
bx.1 shl : a m u l t i p l yo t h e r w i s e
bx.1 shl : o f f s e ti nf o n to fc h a r a c t e r
add .: bos xif f soisnenetg mceohnfat r a c t e r

: S e tu pt h e GC r o t a t i o n .

mov dx, GC-INDEX


mov a1 ,GC-ROTATE
mov [Link]
[Link] out

: Setup BH as b i t mask f o r l e f t h a l f ,
: EL as r o t a t i o n f o r r i g h t h a l f .

mov bx.0ffffh
[Link] shr
cl neg
c1.8 add
, c bl sl h l

: Draw t h e c h a r a c t e r , l e f t h a l f f i r s t , t h e n r i g h t h a l f i n t h e
; s u c c e e d i n gb y t e ,u s i n gt h ed a t ar o t a t i o nt op o s i t i o nt h ec h a r a c t e r
: a c r o s st h eb y t eb o u n d a r ya n dt h e nu s i n gt h eb i t mask t o g e t t h e
: p r o p e rp o r t i o no ft h ec h a r a c t e ri n t oe a c hb y t e .
; Does n o tc h e c kf o rc a s ew h e r ec h a r a c t e ri sb y t e - a l i g n e da n d
: n or o t a t i o na n do n l yo n ew r i t ei sr e q u i r e d .

mov [Link]-CHARACTER-SIZE
mov d x , GC-INDEX
POP
swcbirdaet;cehgkne t c x
cx dec
cx
dec ; - 2 because do tbwyeo
ft aoec crhs ha r

468 Chapter 25
CharacterLoop:

: S e tt h eb i t mask f o r t h e l e f t h a l f o f t h e c h a r a c t e r .

mov a1 .GC..BIT-MASK
mov [Link]
dx,ax out

: G e tt h en e x tc h a r a c t e rb y t e & write it todisplay memory.


; ( L e f th a l fo fc h a r a c t e r . )

mov a1 , [ s i ] ; g e tc h a r a c t e rb y t e
mov [Link]:[dil ; l o a dl a t c h e s
stosb ; w r i t ec h a r a c t e rb y t e

; S e tt h eb i t mask f o r t h e r i g h t h a l f o f t h e c h a r a c t e r .

mov a1 .GC~LBIT_MASK
mov [Link]
[Link] out

: G e tt h ec h a r a c t e rb y t ea g a i n & w r i t e i t t o d i s p l a y memory.
: ( R i g h th a l fo fc h a r a c t e r . )

1 odsb ; g e tc h a r a c t e rb y t e
mov [Link]:[dil : l o a dl a t c h e s
stosb : w r i t ec h a r a c t e rb y t e

; P o i n tt on e x tl i n eo fc h a r a c t e r i n d i s p l a y memory.

add . c xd i

bp dec
C h a r a cj nt ez r L o o p

POP ds
POP bp
pop di
pop si
POP dx
POP cx
POP bx
POP ax
ret
endp DrawChar

: S e tt h ep o i n t e rt ot h ef o n tt od r a wf r o mt o ES:BP.

enceptS
arForeocln t
mov [ Fw
po tnor tr P
d o i n t e r: ps] .aobvipnet e r
mov w[ poFtrordn t P o i n t e r + Z ] . e s
ret
eSnedlpe c t F o n t

ends
cseg
startend

The bit mask can be used for much more than bit-aligned fonts. For example, the bit
mask is useful for fast pixel drawing, such as that performedwhen drawing lines, as

VGA Data Machinery 469


we’ll see in Chapter 35. It’s also useful for drawing the edges of primitives, such as
filled polygons, that potentially involve modifylng some but notall ofthe pixels con-
trolled by a single byte of display memory.
Basically, the bit mask is handy whenever only some of the eight pixels in a byte of
display memory need tobe changed, because it allows full use of the VGA’s four-way
parallel processing capabilities for the pixels that are to be drawn, without interfer-
ing with the pixels that are to be left unchanged. The alternative would be
plane-by-plane processing, which from a performance perspective would be undesir-
able indeed.
It’s worth pointing out again that the bitmask operates on the datain the latches,
not on thedata in display [Link] makes the bit mask a flexible resource that
with a little imagination can be used for some interesting purposes. For example,
you could fill the latches with a solid background color (by writing the color some-
where in display memory, then reading that location to load the latches), and then
use the Bit Mask register (or write mode 3, as we’ll see later) as a mask through
which to draw a foregroundcolor stencilled into the background color without read-
ing display memory first. This only works for writing whole bytes at a time (clipped
bytes require theuse ofthe bit mask; unfortunately, we’re already using it forstencil-
ling in this case), but it completely eliminates reading display memory and does
foreground-plus-background drawing in one blurry-fast pass.

This last-described example is a goodillustration of how I b! suggest you approach


p the VGA: As a rich collection of hardware resources that can profitably be com-
bined in some non-obvious ways. Don ’t let yourself be limited by the obvious
applications for the latches, bit mask, write modes, read modes, map mask, ALUs,
and setheset circuitry Instead, try to imagine how they could work together to
perform whatever task you happen to need done at any given time. I ite made my
code as much as fourtimes faster by doing this, as the discussion of Mode X in
Chapters 47-49 demonstrates.

The example code in Listing 25.1 is designed to illustrate the use of the Data Rotate
and Bit Mask registers, and is not as fast or as complete as it might be. The case
where text is byte-aligned could be detected and performed much faster, without the
use of the Bit Maskor Data Rotate registers and with onlyone display memory access
per fontbyte (to write the font byte), rather than fourread (to display memory and
write the font byte to each of the two bytes the character spans). Likewise, non-
aligned text drawing could be streamlined to one display memory access per byte by
having the CPU rotate and combine the fontdata directly, rather than setting up the
VGA‘s hardware to do it. (Listing 25.1 was designed to illustrate VGA data rotation
and bit masking rather than thefastest way to draw text. We’ll see faster text-drawing
code soon.) Oneexcellent rule of thumb is to minimize display memory accesses of
all types, especiallyreads, which tend to be considerably slower than writes. Also, in

470 Chapter 25
Listing 25.1 it would be faster to use a table lookup to calculate the bit masks for the
two halves of each character rather than theshifts used in the example.
For another (and morecomplex) example of drawing bit-mapped text on theVGA,
seeJohn Cockerham’s article, “Pixel AlignmentEGA of Fonts,”PC TechJournaZ,January,
198’7. Parenthetically, I’d like to pass along John’s comment about the VGA “When
programming theVGA, everything is complex.”
He’s got a point there.

The VGA’s Set/Reset Circuitry


At last we come tothe final aspectof data flow through the GC on write mode 0 writes:
the set/reset circuitry. Figure 25.3 shows data flow on a write mode 0 write. The only
difference between this figure and Figure 25.1is that on its way to each plane poten-
tially the rotated CPU data passes through the set/resetcircuitry, whichmay or may
not replace the CPU data with set/reset data. Briefly put, the set/reset circuitry en-
ables the programmerto elect to independently replace the CPU data for each plane
with either 00 or OFFH.
What is the use of such a feature? Well, the standardway to control color is to set the
Map Mask register to enable writes to only those planes that need to be set toproduce

Data flow during a write mode 0 write operation.


Figure 25.3

Dataflow during a write mode 0 write operation.


VGA Data Machinery 471
Figure 25.3
the desiredcolor. For example, theMap Maskregister would be set to 09H to draw in
high-intensity blue; here, bits 0 and 3 are set to 1, so only the blue plane (plane 0)
and the intensity plane (plane 3) are written to.
Remember, though, that planes that are disabled by the Map Mask register are not
written to or modified in any way. This means that the above approach works onlyif
the memory being written to is zeroed; if, however, the memory already contains
non-zero data, that data will remain in the planes disabled by the Map Mask,and the
end result will be that some planes contain the data just written and other planes
contain old data. In short, color control using the Map Maskdoes not force all planes
to contain the desiredcolor. In particular, itis not possible to force some planes to
zero and otherplanes to one in a single write with the Map Mask register.
The program in Listing 25.2 illustrates this problem. A green pattern (plane1 set to
1, planes 0, 2, and 3 set to 0) is first writtento display memory. Display memoryis then
filled with blue (only plane 0 set to 1),with a Map Mask setting of 01H. Where the blue
crosses the green, cyan is produced, rather than blue, because the Map Mask register
setting of 01H that produces blue leaves the green plane (plane 1 ) unchanged. In
order to generate blue unconditionally, would it be necessary to set the Map Mask
register to OFH, clear memory, and then set the Map Mask register to 01H and fill
with blue.

LISTING 25.2 [Link]


; Program t o i l l u s t r a t e o p e r a t i o n o f Map Mask r e g i s t e r when d r a w i n g
; t o memory t h a ta l r e a d yc o n t a i n sd a t a .
; By M i c h a e A
l brash.

s t a cske g m e npta rsat a c k 'STACK'


db 512 d u p ( ? )
set na dc ks

EGA-VIDEO-SEGMENT equ OaOOOh ;EGA d i s p l a y memory


segment

; EGA r e g i s t e re q u a t e s .

SC-INDEX 3c4hequ ; S C riengdies xt e r


SC-MAP-MASK equ 2 ;SC map mask r e g i s t e r

; Macro t o s e t i n d e x e d r e g i s t e r I N D E X o f SC c h i p t o SETTING.

SETSC macro I N D E X , SETTING


mov [Link]-INDEX
mov a1 , I N D E X
dx,al out
dx inc
mov ,SETTING
a1
[Link] out
dx dec
endm

c s es eg g m epnatpr au b l i c 'CODE'
assume cs:cseg

472 Chapter 25
n pesratoar cr t

: S e l e c t6 4 0 x 4 8 0g r a p h i c s mode.

mov ax.012h
int 10h

mov [Link]-VIDEO-SEGMENT
video mov
t o ; p o i nets . a x memory

: D r a w2 41 0 - s c a n - l i n eh i g hh o r i z o n t a lb a r si ng r e e n ,1 0s c a nl i n e sa p a r t .

SETSC
SC-MAP_MASK.OLh :map mask s e t et innagbolnelsy
: p l a n e 1. t h eg r e e np l a n e
b: [Link] inbodi fen og memory
mov a1 . O f f h
mov bp.24 d r a:#
wt ob a r s
HorzBarLoop:
mov cx.80*10 ; I bh p
yotereirzs obnat ar l
bar ; d r a ws t o s b r e p
add d i .80*10 : p osit tnonaoterbf xt at r
bp dec
H o r z B janrzL o o p

: F i l ls c r e e nw i t hb l u e ,u s i n g Map Mask r e g i s t e r t o e n a b l e w r i t e s
: t ob l u ep l a n eo n l y .

[Link]
SETSC :map mask s e tet ni nagb l e s on1 y
: p l a n e 0. t h eb l u ep l a n e
, d idsiu b
mov 8 0 * 4c8x0, s c:#
r epeebnry t e s
mov a1 . O f f h
r e ps t o s b ; p e r f o r m fill ( a f f e c t so n l y
: p l a n e 0. t h eb l u ep l a n e )

: W a i tf o r a keystroke.

mov ah.1
in t 21h

: R e s t o r et e x t mode.

mov ax.03h
in t 10h

: E x i t t o 00s.

mov ah.4ch
in t 21h
start endp
cseg ends
end start

Planes to a Single Color


The set/reset circuitry can be used to force some planes to 0-bitsand others to 1-bits
during asingle write, while letting CPU data go to stillother planes, and so provides an
efficientway to set all planes to a desired color. The set/resetcircuitry works as follows:

VGA Data Machinery 473


For each of the bits 0-3 in the Enable Set/Reset register (Graphics Controller regis-
ter 1) that is 1, the corresponding bit in the Set/Reset register (GC register 0) is
extended to a byte (0 or OFFH) and replaces the CPU data for the corresponding
plane. For each of the bits in theEnable Set/Reset register that is 0, the CPU data is
used unchanged for that plane (normal operation). For example, if the Enable Set/
Reset register is set to 01H and the Set/Reset register is set to 05H, then the CPU
data is replaced for plane0 only (the blue plane), and the value it is replaced with is
OFFH (bit 0 of the Set/Reset register extended to a byte).Note that in this case, bits
1-3 of the Set/Reset register have no effect.
It is important to understand that the set/resetcircuitry directly replaces CPU data
in Graphics Controller dataflow. Refer back to Figure 25.3 to see that the outputof
the set/reset circuitry passesthrough (and may be transformedby) the ALU and thebit
mask before being written to memory, and even then the Map Mask register must
enable the write. When using set/reset, it is generally desirable to set theMap Mask
register to enable all planes the set/reset circuitry is controlling, since those memory
planes which are disabled by the Map Mask register cannot be modified, and the
purpose of enabling set/reset for a planeis to force that plane to be set by the set/
reset circuitry.
Listing 25.3 illustrates the use of set/reset to force aspecific color to be written. This
program is the same as that of Listing25.2, except that set/reset rather than the Map
Mask register is used to control color. The preexisting pattern is completely ovenvrit-
ten this time, because the set/reset circuitry writes 0-bytesto planes thatmust be off
as well as OFFH-bytes to planes that must be on.

[Link]
; P r o g r a mt oi l l u s t r a t eo p e r a t i o n o f s e t / r e s e tc i r c u i t r yt of o r c e
; s e t t i n g o f memory t h a ta l r e a d yc o n t a i n sd a t a .
; By M i c h a e A
l brash.

s t a cske g m e npta rsat a c k 'STACK'


d u p5(1?2) d b
setnadc sk

EGA-VIDEORSEGMENT equ OaOOOh ;EGA d i s p l a y memory


segment

; EGA r e g i s t e re q u a t e s .

SC-INDEX equ 3c4h ;SC i nrdeegxi s t e r


SC-MAPLMASK equ 2 ;SC map mask r e g i s t e r
GC-INDEX 3ceh
equ ;GC i nrdeegxi s t e r
GC-SET-RESET equ 0 ;GC s e t / r e s e tr e g i s t e r
GC-ENABLELSET-RESET equ 1 ;GC e n a b l es e t / r e s e tr e g i s t e r

; Macro t o s e t i n d e x e d r e g i s t e r I N D E X o f SC c h i p t o SETTING.

SETSC macro I N D E X , SETTING


mov [Link]-INDEX
mov a1 , I N D E X
[Link] out

474 Chapter 25
dx inc
mov ,SETTING
a1
[Link] out
dx dec
endm

; Macro t o s e t i n d e x e d r e g i s t e r I N D E X o f GC c h i p t o SETTING.

SETGC macro I N D E X . SETTING


mov dx,GC_.INOEX
mov a1 , I N D E X
[Link] out
dx inc
mov .SETTING
a1
[Link] out
dx dec
endm

c s es ge g m epnat pr au b l i c 'CODE'
assume cs:cseg
n pesratoar cr t

; S e l e c t6 4 0 x 4 8 0g r a p h i c s mode.

mov ax.012h
int 10h

mov [Link]-VIDEO-SEGMENT
v i d e o mov
t o ; p o i ne ts . a x memory

; D r a w2 41 0 - s c a n - l i n eh i g hh o r i z o n t a lb a r si ng r e e n , 10 s c a nl i n e sa p a r t .

SETSC
SC-MAP-MASK.02h ;map mask s e t tei n ag bolnelsy
; p l a n e 1. t h eg r e e np l a n e
b; [Link] efn og memory
mov a1 . O f f h
mov bp.24 draw
; tI o b a r s
HorzBarLoop:
mov cx.80*10 ; # bh p
yotereirzs obnat ar l
bar ;drawstosb rep
add d i .80*10 ; p ostitnnoaoetbrfxtatr
bp dec
H o r z B aj nr Lz o o p

; Fill s c r e e nw i t hb l u e ,u s i n gs e t / r e s e tt of o r c ep l a n e 0 to1's and a l l


: o t h e rp l a n et o 0's.

SETSC SC_MAPKMASK.Ofh ; m us es t map mask et on a bal el l


; p l a n e s , s o s e t / r e s e tv a l u e sc a n
; b ew r i t t e nt o memory
SETGC GC-ENABLE-SET-RESET,Ofh ;CPU d a t at oa l lp l a n e s will be
; r e p l a c e db ys e t / r e s e tv a l u e
SETGC [Link] ; s e t / r e sveat lOui sfeffpohlra n e 0
; ( t h eb l u ep l a n e )a n d 0 f o ro t h e r
; planes
sub di .di
mov 80*480
cx, s ;c#
r epbe ynr t e s
mov a1 .; O
ssifenf anthc/laerlif ebso slreedt
; p l a n e s ,t h e CPU d a t ai si g n o r e d -
; o n l yt h ea c to fw r i t i n gi s
; important

VGA Data Machinery 475


r e ps t o s b ; p e r f o r m fill ( a f f e c t sa l lp l a n e s )

; T u r no f fs e t / r e s e t .

SETGC GC-ENABLELSET-RESET.0

; W a i tf o r a keystroke.

mov ah,l
int 21h

; R e s t o r et e x t mode.

mov ax,03h
int 10h

; Exitto 00s.

mov ah.4ch
int 21h
start endp
cseg ends
end start

Manipulating Planes Individually


Listing 25.4 illustrates the use of set/reset to control only some, rather than all,
planes. Here, the set/reset circuitry forcesplane 2 to 1 and planes 0 and 3 to 0. Because
bit 1 of the Enable Set/Reset register is 0, however, set/reset does not affect plane 1;
the CPU data goes unchanged to the plane 1ALU. Consequently, the CPU data can
be used to control the value written to plane 1. Given the settings of the other three
planes, this means that each bit of CPU data that is 1 generates a brown pixel, and
each bit that is 0 generates a redpixel. Writing alternating bytes of 07H and OEOH,
then, creates a vertically striped pattern of brown and red.
In Listing 25.4,note that thevertical bars are 10 and 6 bytes wide,and do not start on
byte boundaries. Although set/reset replaces an entirebyte of CPUdata for a plane,
the combination of set/reset for some planes and CPU data for other planes, as in
the example above, can be used to control individual pixels.

[Link]
; Program t oi l l u s t r a t eo p e r a t i o no fs e t / r e s e tc i r c u i t r yi nc o n j u n c t i o n
; w i t h CPU d a t a t o m o d i f y s e t t i n g o f memory t h a ta l r e a d yc o n t a i n sd a t a
; By M i c h a eA
l brash.

s t a cske g m e npta rsat a c k 'STACK'


d u p5(1?2) d b
set na dc ks

EGA-VIDEOCSEGMENT equ OaOOOh ;EGA d i s p l a y memory


segment

; EGA r e g i s t e re q u a t e s .

SC-INDEX 3c4h
equ ;SC i nrdeegxi s t e r
SC-MAP-MASK equ 2 ; S C map mask r e g i s t e r

476 Chapter 25
GC-INDEX equ 3ceh :GC i n d e x r e g i s t e r
GC-SET-RESET equ 0 :GC s e t / r e s e tr e g i s t e r
GC-ENABLELSET-RESET equ 1 ;GC e n a b l e s e t / r e s e t r e g i s t e r

: Macro t o s e t i n d e x e d r e g i s t e r I N D E X o f SC c h i p t o SETTING.

SETSC macro I N D E X , SETTING


mov d x , SC-INDEX
mov a1 , I N D E X
dx,al out
inc dx
mov a1 .SETTING
[Link] out
dx dec
endm

; Macro t o s e t i n d e x e d r e g i s t e r I N D E X o f GC c h i p t o SETTING.

SETGC macro I N D E X , SETTING


mov [Link]-INDEX
mov a1 , I N D E X
[Link] out
dx inc
mov .SETTING
a1
[Link] out
dx dec
endm

c s es eg g m epnatpr au b l i c 'CODE'
assume cs:cseg
n pesratoracr t

: S e l e c t6 4 0 x 3 5 0g r a p h i c s mode.

mov ax.010h
int 10h

mov ax,EGA-VIDEO-SEGMENT
mov e s .; ap xvoti odn et o memory

: Draw 1 81 0 - s c a n - l i n eh i g hh o r i z o n t a l b a r si ng r e e n ,1 0s c a nl i n e sa p a r t .

SC-MAP_MASK,OEh
SETSC :mapmask s e t t i n ge n a b l e so n l y
: p l a n e 1. t h eg r e e n
plane
. d dis iu b : s t a r ta tb e g i n n i n go fv i d e o memory
mov a1 . O f f h
mov bp.18 ; # b a r st od r a w
HorzBarLoop:
mov 80*10
cx, :# b y t e sp e rh o r i z o n t a lb a r
r e ps t o s b : d r a wb a r
. 8 0d*ai1d0d : p o i n tt os t a r t o f n e x tb a r
bp dec
H o r z B aj nr Lz o o p

: F i l ls c r e e nw i t ha l t e r n a t i n gb a r so f r e da n db r o w n ,u s i n g CPU d a t a
: t os e tp l a n e 1 a n ds e t / r e s e tt os e tp l a n e s 0 . 2 & 3.

VGA Data Machinery 477


SETSC
[Link] : m sues t map mask et no a bal lel
; p l a n e s , s o s e t / r e s e tv a l u e sc a n
; b ew r i t t e nt op l a n e s 0. 2 & 3
; and CPU d a t ac a nb ew r i t t e n to
: p l a n e 1 ( t h eg r e e np l a n e )
SETGC [Link] ;CPU d a t tapo l a n e s 0 . 2 & 3 will be
; r e p l a c e db ys e t / r e s e tv a l u e
SETGC GC-SET-RESET.04h : s e t / r e sveat lOui sfeffpohlra n e 2
; ( t h er e dp l a n e )a n d 0 f o ro t h e r
; planes
. d dis iu b
mov cx.80*350/2 s c r e; epCnewr o r d s
mov a x , 07eOh :CPU cdoapnotltanr onl yles 1;
: s e t / r e s e tc o n t r o l so t h e rp l a n e s
; p e rsftoorsmw r e p fill
p l a n e(asal)fl f e c t s

; T u r no f fs e t / r e s e t .

SETGC GC-ENABLE-SET-RESET.0

: W a i tf o r a keystroke.

mov ah.1
int 21h

: R e s t o r et e x t mode.

mov ax.03h
int 10h

: E x i t t o DOS.

mov ah.4ch
int 21h
start endp
cseg ends
start end

There is no clearly defined role for the set/resetcircuitry, asthere is for, say, the bit
mask. In many cases,set/reset is largelyinterchangeable with CPU data, particularly
with CPU data written in write mode 2 (write mode 2 operates similarly to the set/
reset circuitry, as we’llsee in Chapter27). The most powerful use of set/reset, in my
experience, is in applications such as the exampleof Listing 25.4,where it is used to
force the value written to certain planes while the CPU data is written to other planes.
In general, though, thinkof set/reset as one moretool you have at your disposal in
getting the VGA to do what you need done,in this case a tool that lets you force all
bits in each plane to either zero or one, orpass CPU data through unchanged, on
each write to display memory. As tools go, set/reset is a handy one, andit’ll pop up
often in this book.

Notes on Set/Reset
The set/reset circuitry is not active in write modes 1 or 2. The Enable Set/Reset
register is inactive in write mode 3, but the Set/Reset register provides the primary
drawing color in write mode 3, as discussed in the next chapter.
478 Chapter 25
Previous Home Next
Be aware that because setheset directly replaces CPU data, it does not necessarily
have to force an entire display memory byte to 0 or OFFH, even when setlreset is
replacing CPU datafor allplanes. For example, ifthe Bit Mask registeris set to 80H,
the setheset circuitry can only modlfi bit 7 of the destination byte in each plane,
since the other seven bits will comefrom the latchesfor each plane. Similarly, the
setheset valuefor each plane can be modifiedby that plane b ALU Once again, this
illustrates that setheset merely replaces the CPU datafor selectedplanes; theset/
reset value is then processed in exactly the same way that CPU data normally is.

A Brief Note on Word OUTs


In theearly days of the EGA and VGA,there was considerable debate about whether
it was safe to do word OUTs (OUT D m ) to set Index/Data register pairs in a
single instruction. Long ago, there were a few computers with buses that weren’t
quite PC- compatible, in that thetwo bytes in each word OUT went to theVGA in the
wrong order: Data register first, then Indexregister, with predictably disastrous re-
sults. Consequently, I generally wrote my code in those days to use two 8-bit OUTs to
set indexed registers. Later on, I made it a habit to use macros that could do either
one 16-bit OUT or two 8-bit OUTs, depending onhow I chose to assemble the code,
and in fact you’ll find bothways of dealing with OUTs sprinkled through the code in
this part of the book. Using macros for word OUTs is still not a bad idea in that it
does no harm, butin my opinion it’s no longer necessary. Word OUTs are standard
now, and it’s been a longtime since I’ve heard of them causing any problems.

VGA Data Machinery 479

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