Applied Electronics
Chapter Three
Differential Amplifiers
1
Introduction of the BJT Differential pair
• In the conventional amplifiers, the signal (generally signal input)
applied at the input terminals and amplified output is obtained at
the output terminals. However, we can design an amplifier
circuit that accepts two input signals and amplifies the difference
between these two signals. Such amplifier is called a differential
amplifier.
• A differential amplifier is an amplifier that amplifies the
difference between two voltages and rejects the average or
common mode value of the two voltages.
2
Cont’d..
• Ideally, output is proportional only to difference between
the two input signals:
Figure : Difference amplifier building block
A : will be voltage gain of the amplifiers
3
Cont’d..
• Figure shows the basic BJT differential-pair configuration.
It consists of two matched transistors, Q1 and Q2, whose
emitters are joined together and biased by a constant-
current source I.
• Although each collector is shown connected to the positive
supply voltage VCC through a resistance RC, this
connection is not essential to the operation of the
differential pair.
4
Cont’d..
• The differential pair or differential-amplifier configuration
is the most widely used building block in analog integrated-
circuit design. For instance, the input stage of every op-amp
is a differential-amplifier. Also, the BJT differential-
amplifier is the basis of very-high speed logic circuit family
( i.e. emitter-coupled logic, ECL).
• Hence we are getting to concentrate on or study
differential-amplifier implemented with BJT’s and the
biasing techniques and circuit building blocks in the design
of bipolar IC’s.
5
Cont’d..
• There are two reasons why differential amplifiers are so well suited for
IC fabrication: First, the performance of the differential pair depends
critically on the matching between the two sides of the circuit.
Integrated circuit fabrication is capable of providing matched devices
whose parameters track ever wide ranges of changes in environmental
conditions.
• Second, by their very nature, differential-amplifiers utilize more
components than single-ended circuits.
• Then, the significant advantage of integrated-circuit technology is the
availability of large numbers of transistors at relatively low cost.
6
Cont’d..
• Figure 3.1 shows the basic BJT differential Pair configuration. It
consists of two matched transistors, and , whose emitters are joined
together and biased by a constant current source.
• Although each collector is connected to the positive supply voltage,
through a resistance , this connection is not essential for the operation
of the differential pair.
• But it is essential that the collector circuit be such that and never enter
saturation.
• What is the condition for a collector circuit to drive the transistor in the
saturation region?
7
Cont’d..
Figure 3.1 the basic BJT differential pair configuration
8
Cont’d..
• To see how the BJT differential pair works, consider first the case
of the two bases joined together and connected to a common–
mode voltage, VCM.
• It is essential, though, that the collector circuits be such that Q1
and Q2 never enter saturation.
9
Cont’d..
Figure 3.2 a) The differential pair with a common–mode input signal.
Figure 3.2 b) The differential pair with a ‘’large’’ differential input signal.
10
Cont’d..
11
Cont’d..
12
Cont’d..
• Now let us vary the value of the common-mode input voltage VCM.
Obviously, as long as Q1 and Q2 remain in the active region, and the
current source I has sufficient voltage across it to operate properly, the
current I will still divide equally between Q1 and Q2, and the voltages
at the collectors will not change. Thus the differential pair does not
respond to (i.e., it rejects) changes in the common-mode input voltage.
• As another experiment, let the voltage VB2 be set to a constant value,
say, zero (by grounding B2), and let VB1 = +1 V.
• Here, Q1 is on and conducting all of the current I and Q2 will be off.
13
Cont’d..
• For Q1 to be on (with VBE1 = 0.7 V), VE = +0.3 V
• Let us now change VB1 to -1 V
Q1 is off
Q2 is on
VE = -0.7 V
14
Figure 3.2 (c)The differential pair with a large differential input signal of polarity
opposite to that in (b). (d) The differential pair with a small differential input signal
vi. Note that we have assumed the bias current source I to be ideal (i.e., it has an
infinite output resistance) and thus I remains constant with the change in vCM.
15
Cont’d..
• Now let us vary the value of the common-mode input voltage VCM.
Obviously, as long as Q1 and Q2 remain in the active region, and the
current source I has sufficient voltage across it to operate properly, the
current I will still divide equally between Q1 and Q2, and the voltages
at the collectors will not change. Thus the differential pair does not
respond to (i.e., it rejects) changes in the common-mode input voltage.
• As another experiment, let the voltage VB2 be set to a constant value,
say, zero (by grounding B2), and let VB1 = +1 V.
• Here, Q1 is on and conducting all of the current I and Q2 will be off.
16
Example
17
Cont’d..
In fact, with relatively small difference voltages we are able to steer
the entire bias current from one side of the pair to the other
See figure 3.2 d)
18
Input Common Mode range
• The allowable range of Vcm is determined at
the upper end by Q1 and Q2 leaving the active
mode and entering saturation.
• The lower end of the Vcm range is determined
by the need to provide a certain minimum
voltage Vcs across the current source I to
ensure its proper operation
19
Large-Signal Operation
• If we denote the voltage at the common emitter by VE and
neglecting the Early effect, the exponential relationship applied
to each of the two transistors may be written
where
• Therefore, the emitter currents can be written in terms of the
base voltages as:
20
Cont’d..
21
Cont’d..
• Of course, we know that , thus:
• And rearranging we find:
• Now, we can insert equation (B) into equation (A) and find:
• as well as:
22
Cont’d..
• Now, let’s define a differential voltage:
• We can now (finally) write the emitter currents in terms of this
differential voltage VD
23
Figure 3.3 Transfer characteristics of the BJT differential pair fig 3.2 assuming a . 1.
24
Small-Signal Operation
The Collector Currents When vid Is Applied For the circuit of
Fig. 8.19, we may use Eqs. (8.73) and (8.74) to write
25
Figure 3.4 The currents and voltages in the differential amplifier when a
small differential input signal vid is applied.
26
Cont’d..
Multiplying the numerator and the denominator
27
Cont’d..
• when Vid = 0, the bias current I divides equally between the two
transistors of the pair. Thus each transistor is biased at an emitter
current of I/2 .
• When a “small-signal” Vid is applied differentially (i.e., between the
two bases), the collector current of Q1 increases by an increment ic
and that of Q2 decreases by an equal amount. This ensures that the
sum of the total currents in Q1 and Q2 remains constant, as
constrained by the current source bias. The incremental (or signal)
current component ic is given by
28
Cont’d..
• From the symmetry of the circuit (Fig. 3.4) that the differential
signal vid should divide equally between the base–emitter
junctions of the two transistors. Thus the total base–emitter
voltages will be
29
An Alternative Point
• Assume the current source I to be ideal. Its incremental resistance
then will be infinite. Thus the voltage Vid appears across a total
resistance of 2re, where
• Correspondingly there will be a signal current ie, as illustrated in
Fig. 3.5, given by
• Thus the collector of Ql will exhibit a current increment ic and the
collector of Q2 will exhibit a current decrement ic:
• This method of analysis is useful, when emitter resistances are
included as shown in the figure
30
Figure 3.5 A simple technique for determining the signal currents in a
differential amplifier excited by a differential voltage signal vid; dc
quantities are not shown. 31
Input Differential Resistance
• The bipolar differential pair exhibits a finite input resistance, a
result of the finite of the BJT.
• The input differential resistance is the resistance seen between the two
bases; that is, it is the resistance seen by the differential input signal
Vid.
• it can be seen that the base current of Q1 shows an increment ib and
the base current of Q2 shows an equal decrement, ib.
32
Figure 3.6 A differential amplifier with emitter resistances. Only
signal quantities are shown
33
cont’d..
Thus, the differential input resistance Rid is
• The resistance seen between the two bases is equal to the total
resistance in the emitter circuit multiplied by
34
Differential Voltage Gain
• A very small voltage, i.e Vid smaller than 20 mv, the collector
currents are given by
but
• the total voltages at the collectors will be
35
Cont’d..
• The output voltage signal of a bipolar differential amplifier can be taken
either differentially (i.e., between the two collectors) or single-endedly (i.e.,
between one collector and ground).
• If the output is taken differentially, then the differential gain will be
• If we take the output single-endedly (say, between the collector of Q1 and
ground), then the differential gain will be given by
• For the differential amplifier with resistances in the emitter leads (Fig. 3.6)
the differential gain with the output is taken differentially is given by
36
Common-Mode gain (ACM) and CMRR
• Differential amplifier fed by a common-mode voltage signal VCM.
• For analysis, let us divide the BJT differential pair in to two half
circuits.
• REE is the incremental output resistance of the bias current source.
• From symmetry it can be seen that the circuit is equivalent to that
shown in Fig. 3.7(b)
• each of the two transistors Q1 and Q2 is biased at an emitter current I/2
and has a resistance 2R in its emitter lead.
• Thus the common-mode output voltage VC1 will be
37
Figure 3.7 (a)The differential amplifier fed by a common-mode voltage signal VCM
(b) Equivalent "half-circuits" for common-mode calculations.
38
Cont’d..
• Differential out put is zero,
• On the other hand, if the output is taken single-endedly, the
common mode gain ACM will be finite and given by :
39
Cont’d..
40
Input Common-Mode Resistance
Figure 3.8 (a) Definition of the input common-mode resistance Ricm.
(b) The equivalent common-mode
41 half-circuit.
Cont’d..
42
Example-2
• The differential amplifier in the Figure uses transistors with
/3 = Evaluate the following:
a) The input differential resistance Rid
b) The overall differential voltage gain Vo/Vsig
c) The worst-case common-mode gain if the two collector
resistances are accurate to within
d) The CMRR, in dB
e) The input common mode resistance (assuming the Early
effect voltage )
43
44
Biasing in BJT Integrated Circuits
• The conventional BJT biasing technique are not suitable for the design
of IC amplifiers.
• Because there is a need for a large number of resistors (one to three
per an amplifier) and large coupling and bypass capacitors are needed.
• Biasing in integrated circuit design is based on the use of the constant
current sources.
• On an IC chip with a number of amplifier stages, a constant dc current
(called a reference current) is generated at one location and is then
reproduced at various locations for biasing other amplifier stages
through a process known as a current steering.
The diode connected transistor
• Shorting base and collector results 2-D device
• The device operates in active mode (VCB = 0)
• And I divides b/n base and collector according to
value of the BJT
• This circuit is used in d/f constant current source
circuits.
The diode connected transistor
Current Mirror
• Most building block in the design of IC current sources and current steering
circuits
• Consists two Q1and Q2 matched transistors, their bases and emitters are
connected together
• Q1 is connected as a diode
• The current mirror is shown IREF, and the o/p is taken from collector of Q2
• We should ensure active mode operation for Q2 at all the times (VC2>VB2)
• Assume high , iB is negligible small
• Since Q1-Q2, identical and VBE1 = VBE2
Figure: The basic BJT current mirror
Cont’d..
A simple current source
Figure : A simple BJT current mirror used as a current source
Cont’d..
Current steering Circuits
• Dc ref current generated in one location and then reproduced at
other locations for baising the various amplifier stage in the IC
• Iref generated at the branch consists of the diode connected Q1
and Q2 and resistor R.
The diode connected transistor Q1 forms a current mirror with Q3
• Q3 will supply a constant current I1-IREF
Cont’d..
• To generate a dc current twice the value of IREF, two
transistors, Q5 and Q6, each of which is matched to Q1, are
connected in parallel, and the combination forms in a minor
with Q1 ,
• Thus
Figure : A specific current steering circuit having a number of constant
current generation
Example
For the given of four stage bipolar op-amp in the figure
below.
a) Analyze the dc bias of the bipolar op-amp.
Assume: and neglecting
b) Calculate the power dissipated in the circuit in the
quiescent state ( input signal )
c) Determine the input resistances, the overall voltage
gain, and the output resistance.
58
FIGURE A four-stage bipolar op amp. 59