BGA Assembly & Soldering Defects Guide
BGA Assembly & Soldering Defects Guide
Contents
Page
SMTA Europe Introduction 3
Author’s Profile 31
Balled devices have been with us in production since the middle of the 1980’s where they were
used in High End computers from IBM and others. These were Land Grid Arrays, the next step in
component evolution following the Pin Grid Array. In 1995, Intel first used a package with the
imaginative name of BGA1 for their Pentium 2 and early Celeron mobile processors. So why are
we putting out this guide now?
Well things have moved on! We have had the Lead-Free revolution which challenged many
production parameters and the components have also changed dramatically. We now have many
variations, from huge components with thousands of balls, through Package on Package (PoP)
technology to Very Thin Profile Fine Pitch Ball Grid Arrays (WFBGA)
Mobile devices demand the minimum in component Z height, so balls get smaller and smaller, dies
are ground to reduce their thickness and then we heat the devices to 250 degrees centigrade, or
more, and often do this twice. This is why SMTA Europe thought the time was right to produce this
guide, as one thing has not changed during all this time, X-Ray is the only reliable non-destructive
inspection method for checking the optically hidden joints of these components, regardless of their
size or complexity.
So welcome to a Guide which we hope will help anyone involved in BGA Inspection.
Keith Bryant
Chairman SMTA Europe
SMTA Headquarters
6600 City West Parkway, Suite 300
Eden Prairie, MN 55344 USA
Phone: +1-952-920-7682
Email: smta@[Link]
Web: [Link]
PBGAs consist of a glass epoxy substrate on which a silicon die is mounted and the interconnections are wire
bonded from the die to gold-plated pads on the device substrate. A moulding compound is then formed over the die
and the bond wires to provide protection and a surface compatible with automatic assembly. Some manufacturers
completely over mould the epoxy base with the plastic sealing the edges of the fibre glass substrate. This can
provide a better surface for automatic handling and provide better outer package tolerance control which can aid
computer recognition. Today most packages follow this basic method of manufacture, varying only the substrate
and moulding methods. The reference material listed in the back of this guide outlines other types of package and
other advanced versions of this style of device.
Terminations on BGA devices are solder balls and these can be tin/lead but the majority are now a lead-free alloy
due to European legislation. Some packages have tin/lead or lead-free high lead balls. High temperature lead/tin
are normally only on ceramic packages. These solder ball spheres can measure 0.3-0.75 µm in diameter and are
reflowed on the package substrate during device manufacture in a nitrogen oven. This maintains more consistent
ball formation and reduces oxide formation on the terminations. Alternative techniques for ball formation are solder
paste print or preforms which are reflowed to form non-fine pitch devices. It is also possible to have plastic spheres
which are plated with copper and nickel which are then reflowed to the substrate. The plastic maintains the standoff
height of the package during reflow, providing more flexibility of the joints during thermal and mechanical cycling.
One of the most commonly available packages in the early years was the Over Moulded Plastic Pad Array Carrier
(OMPAC) which was a Motorola device. OMPAC was used in Motorola's portable electronic products in the late
80’s. IBM has also provided similar packages for use in the commercial market, as opposed to their traditional
ceramic parts. In IBM's case their package was mounted onto polyimide tape like traditional TAB packages. The
packages were then manufactured in a similar way to other BGA parts. There are many different packages available
now in the industry, however the most common types are covered in this guide.
In some cases, higher temperature solder alloys are used for the solder balls (90% lead 10% tin) but this is normally
confined to ceramic packages. Ceramic packages use the high temperature balls as this provides a higher standoff
from the substrate surface and increases the reliability characteristics when the package is subjected to extended
thermal cycling. During reflow the balls do not behave like on a PBGA and instead coalesce with the solder paste
to form joints. In CBGA the solder wets the ball surface and the pad to form reliable joints. Inspection of these
devices will show the solder ball has not collapsed but remains round as it has not reflowed.
The device substrate can be a simple two-layer board or a multi-layer ceramic hybrid construction. The newer
generation of arrays are on a 1mm pitch and have been used on the high-end computer applications. As more and
more functionality is incorporated into these types of package, the packages are increasing in size while the pitch
drops still further leading to devices with over 1000 terminations.
CCGA is an alternative to the ball grid array. The basic device is produced as a ceramic hybrid. The terminations
are normally 90% lead 10% tin like the CBGA, but in this case they are wire columns that are soldered or cast to
the base of the component. During reflow to the printed circuit board, the same reliable joints as in a CBGA are
formed between the package substrate termination and circuit board pads by the solder paste. The column does
not reflow, the solder paste wets to the termination and PCB pad surface to form a reliable joint.
Due to the size and the alloy used for CCGA terminations, it means that they are very fragile and easily displaced
during handling so great care is required during packaging. Alternatives to termination columns exist in the market,
such as metal tape which is been wound and cast into the terminations and, more recently, springs have also been
used.
CSP is also referred to as BGA the most familiar was the device originally produced by Tessera. These devices
were featured on many demonstration production lines at exhibitions. The CSP is basically the same size as the
die it supports. The interconnections on the die are fanned out by using a 25µm polyimide film circuit with double
sided copper. On the surface of the circuit are pads which have solder balls for direct mounting to the printed board
using standard reflow techniques. In terms of assembly the µBGA does not produce too many problems provided
the solder paste can be printed effectively. Just like with all technologies the solder ball pitch is decreasing and
number of terminations increasing with many new package designs in existence. There is also an increase in the
number of land grid array, or bottom termination components (BTC), which are basically the BGA with no solder
balls underneath. With the significant increase in the use of CSPs, reference should be made to the newer books
on the is subject that are listed at the back of this guide.
Flip Chip
Flip chip could be considered as the original area array package. However, initially the terminations were confined
to the edge of the die and not all over as is the case today. Flip chips were first developed and used by IBM and
are now in wide use for a range of applications. These devices could not be confirmed as tested/functional at device
level only after the solder connections had been formed. The process of flip chip assembly or soldering is often
referred to as collapse bump as the termination reflows and a dip flux allows wetting to the substrate. Often, flip
chip technology also requires the use of underfill, or epoxy material, added under the package to improve its
reliability during thermal cycling. This may well be necessary owing to the difference in thermal expansion rate
between silicon and the substrate.
Ball Grid Array (PBGAs) are a widely used packaging technology for a vast range of products in many applications
including consumer, telecommunications, military/aerospace and office-based systems. An area array device
provides high packing density with a relatively easy design and process introduction cycle often after just a few
years of experience. To increase the functionality and I/O capabilities of BGAs, where there is only so much space
for terminations underneath the package, over the last ten years engineers have started to experiment with stacking
packages, where BGA devices are soldered one on top of another, often called a Package on Package (PoP).
In simple terms PoP represents the stacking of components either during the original component manufacture or
during printed board assembly. POP packaging may include traditional reflow soldering, wire bonding, flip chip or
conductive adhesives for device to device or die to die interconnection. There are a considerable number of
variations in package construction but in the case of POP packages during Printed Circuit Board (PCB) assembly
it is simple in concept.
The main industry problems associated with this technology are open joints, warping of the substrate leading to
challenges in inspection and, of course, the need for and how to rework. X-ray inspection is really the only viable
way of checking all terminations or for fault finding in the PoP. During assembly the bottom array package is placed
on the surface of a pre-printed board along with other parts. The solder paste printing process follows standard
practice for the range of components and pitch used on the design.
The following images show area array package types used in the industry
Solder paste alloys used in the industry are generally either lead-free or tin/lead reflowing between 220oC – 245oC.
In the case of lead-free, the most common solder alloy is tin/silver/copper, the actual ratio of the elements within
the solder alloy used may depend on the specific reliability requirements of the finished product. There is also an
increasing interest in using low temperature alloys so as to reduce the operational temperatures used compared to
those of the lead-free processes. These materials can still be lead-free but also allow a lower temperature to be
used during rework so as to prevent damage to adjacent components. There has also been a move in some
production operations to use low temperature alloys so as to permit the use of lower temperature rated components
therefore potentially leading to reduced product cost.
The images below show examples of printed solder paste deposits for an area array package prior to its placement
into the paste and which should result in satisfactory solder joints. Normally speaking, solder paste will always be
used during the original assembly process. It is important that the paste volume is consistent when printed and not
displaced during placement. In the case of rework dip paste and for ultra small pitch components like flip chip a gel
or dip flux may be used which does not add to the solder joint volume. The process engineer should determine the
paste thickness and the area of pad coverage required for the application.
The images below show the packages placed into the paste and correctly positioned. When correctly reflowed, they
will all result in satisfactory solder joints. The minor misplacement of the ball in the second image will reflow back
in place as its fully in contact with the paste deposit
X-ray inspection is a valuable tool to use prior to reflow during New Product Introduction (NPI) build. It allows
engineering to see the location of the solder paste deposits after package placement and show if there is any
displacement of the solder paste. If paste is displaced, especially for ultra fine pitch devices then it can result in
shorts and random solder balls post reflow. This approach can be useful not only for area array devices but also for
pin in paste and QFN/LGA which are also commonly used for area array designs.
The X-ray images below show solder paste deposits after component placement and prior to reflow.
Images show paste under top and bottom layers of a PoP package
The following images all represent satisfactory joints for different area array packages fitted with different
terminations. We have included both optical and X-ray images for reference. Depending on the product you are
building, or specifications you are working to, you should refer to the relevant international standards listed in this
guide
Flip Chip
Warping
Warping of area array packages may occur during reflow soldering of side one or two of the board and this appears
to occur more in lead-free than in tin/lead reflow due to higher process temperatures. Warping may be related to
the issues with the component substrate or the moulding compound and may be device specific due to its design.
After reflow, warping of the device may be seen with X-ray by observing any compression or stretching of the solder
joints and measurements may be taken of the solder joint size. Comparing the size variation and distribution is
helpful to understand if it’s a consistent problem. Warping may lead to open joints and help to create Head in Pillow
(HiP) or Head on Pillow (HoP) defects. This issue was particularly of concern for PoP assembly, for both first or
second generation devices.
Missing Balls
Missing solder terminations on devices is uncommon today due to the existence and level of device optical
inspection using AOI during manufacture. There is also a high level of inspection of the device terminations during
automatic placement. Missing balls are more likely to have occurred during poor handling, or where packages have
been reworked or unsuccessfully reballed. Reballing occurs after rework on expensive devices or where a customer
wants to change a package’s original termination from tin/lead to lead-free or vice versa.
Damage to terminations is very possible during handling and column terminations are most vulnerable, but solder
balls can also be damaged during misplacement, reuse of spit outs or dropping/misaligning waffle trays. Some older
packages may look damaged but depending on their method of manufacture the surface of the balls may have
rough surfaces and stretch lines due to the original attachment process. Lead-free solder balls often have
solidification marks on their surface. Their wetting and acceptability for assembly can be easily tested for
solderability in production. A simple reflow process simulation with the paste deposit on glass after part placement
of the device will allow assessment of complete wetting.
Ball Coplanarity
Variations in the height of terminations between the device substrate and the pad can lead to open joints if the
solder paste volume is not accurately maintained and monitored. If devices are being placed on to flux or have been
dipped in flux gel rather than printing solder paste onto the board, it is easy to measure a package for coplanarity
issues on parts; fortunately, most pick and place systems will pick up errors on parts during the placement process.
The following are common process defects experienced with area array devices. We have tried to provide
representative examples to illustrate the type of defect but there may be many different reasons for why the fault
occurs. As well as different root causes for faults, the way the defect may actually appear during inspection can be
different to the image shown in this guide. We will continue to add more defects to future Engineers should collect
and keep their own defect example images during inspection and failure analysis as an aid to future staff training.
Open Connections
Open joints may be caused by the printed board substrate rather than by the package or assembly process. A
single open joint in a package after reflow is often associated with poor printing and blocked apertures in the solder
paste stencil. There will usually be more than one board with the same defect in the same place depending on the
frequency of stencil cleaning cycles. The lack of solder paste or paste volume variation should be picked up during
automated Solder Paste Inspection (SPI).
Both X-ray images below show a PCB pad with no solder. As there is no characteristic wetting shape compared to
the other joints, it suggests no paste was present. If there had been then a minimum quantity of flux from any
amount of paste should have allowed some wetting to occur between the solder ball and the pad.
Solder Shorts
Even with fine pitch area array assembly, solder shorts between two terminations is usually uncommon. If shorts
occur, it is more likely to be multiple shorts and often due to warping and compression or stretching of the solder
during reflow. These effects may be seen on the edge of the package or the centre. It is possible that during rework
too much solder paste has been applied, and this may cause this process failure.
Solder shorts can be created randomly under the package from loose solder balls that may escape from their
position. Shorts may also appear if popcorning of the device has occurred during rework or reflow. Popcorning
happens when, the component is soldered but it contains a high level of moisture in the package. As the moisture
escapes the package expands and distorts allowing the solder to be displaced.
It is possible that intermittent shorts or low resistance paths can form due to corrosion or dendrite formation under
BGAs. Copper dendrites can easily form between adjacent pads due to moisture and contamination. Cases of
sulphur corrosion between pads have been experienced and visible to optical and X-ray inspection.
The X-ray example below shows solder shorts on the corner of a package. The optical image shows corrosion
between the pads on two BGA terminations caused by exposure to sulphur.
Voids
Voids in solder joints and their possible impact on reliability has been a topic of discussion for many years. Most
engineers agree that reducing void formation is a good thing as it demonstrates better process control and a more
stable process. Basically, voids are low density areas within the joint and remain in the bulk of the solder after reflow
because gas generated in the process cannot escape from the joint before final solidification of the solder. The
presence and quantity of void formation is a result of the reaction between the reflow process, solder paste and the
surfaces being soldered. During inspection, staff should work to IPC standards, or customer-defined specifications,
on the maximum total amount of voiding that is acceptable to be present within a joint. It is well understood that the
level of voiding seen can be exaggerated by the board surface finish used and also by poor design, such as having
open via holes in component mounting pads.
Voids shown in the first X-ray image below are not untypical of what you may see in manufacture and would
measure as voiding of about 15-20% of the ball area. The second image is extreme voiding and is caused by the
via in pad design. Open vias, or vias that outgas during soldering, must be avoided to prevent this level of excessive
voiding. This image also shows small solder balls around some of the terminations which may relate to the
outgassing from the vias.
Head on Pillow
Head In Pillow or Head On Pillow (HiP or HoP) are both open, high-resistance joints which are caused by a failure
of the solder ball and pad solder paste to coalesce together correctly during reflow. The paste on the pad will have
reflowed, but the ball surface is unlikely to have been in contact with it during the critical time (HoP).
The likely cause of Head In Pillow is that the reflowed paste and the solder ball, probably in a liquid state, are
oxidising as they pass through reflow. One surface displaces the other when they make contact, but the lack of flux
activity does not allow the two surfaces to reflow together to form a true bond (HiP).
The three example images below, two X-ray and one optical show HoP typical shares and result in open circuits
between the reflowed paste and ball
Solder Wicking
When solder reflows, it will wet to any metallic surface that is solderable. Solder wicking is where solder is drawn
away from the intended solder joint. In the case of area arrays it is most common for solder to wick along circuit
board tracks and down via holes under the package. All tracks leading away from pads or via connections should
be coated with solder mask to prevent solder wicking. Solder wicking may be created intentionally when using
wetting indicators. This is where deliberate wetting of solder along a small portion of the track post reflow creates
an X-ray characteristically visible shape that is different from a standard good joint and which provides an indication
that reflow and wetting have taken place.
It is possible for solder wicking to occur on boards that have been reworked and solder mask damaged during the
original removal of the package. Then during component replacement, solder is allowed to wick away from the
intended pads. The X-ray image below shows a reduced volume of solder at the joint but solder in the via hole
adjacent to the pad suggests the solder has come from this joint.
Solder Beads
Solder beads are solder that has reflowed in a confined space then squeezes out to form a near round ball. Often
the solder is in the shape of a pear, but this depends on whether nitrogen is used or there is some flux still present
to reduce oxide formation. Solder beading is more commonly associated with solder adjacent to the side of chip
components where it reflows under the package then squeezes out the side. We have also experienced this defect
on QFN and LGA packages due to their close proximity to the substrate during reflow.
Solder can exit from under a package that has been underfilled if the device is exposed to reflow temperatures for
the second time, as when reworked. Alternatively, if solder is reflowed and compressed and cannot wet to a pad it
can be randomly ejected. An example of this is in device popcorning where the molten solder is compressed by the
package. The two optical images below show solder which has been ejected. The first has a processor soldered
direct to the carrier substrate and underfilled. This is then soldered to a PCB. The second image is an area array
package with underfill that has seen secondary reflow and the solder can be seen next to the device.
The need for soldering lead-free area array balls in a tin/lead process is less common today and it certainly does
not happen by mistake any more. In the early days, many package suppliers changed to lead-free spheres without
fully informing end users. The mixed alloy joints created look different as the balls were not able to reflow correctly
at the normal tin/lead process temperatures. There was a lot of research and reliability studies on this issue but
there were no common conclusions. In most cases, engineers decided the practical approach was to avoid mixed
alloys altogether and re-ball packages. Alternatively, engineers would make sure the process temperature of tin/lead
reflow was high enough above 240oC with liquidus times to achieve 100% mixing of the materials. The examples
below show what may be seen on joints where mixed alloy is suspected. The microsection shows a joint reflowed
where the tin/lead and lead-free termination are easily visible.
Solder paste not reflowing under a package is a profiling issue and great care needs to be taken during reflow
profiling to balance the temperature on the surface of the board and under the device. The solder paste suppliers’
guidelines should be considered with the component peak temperatures not exceeded. If the solder paste has not
reflowed it means that this area of the board did not reach reflow temperature and maintain it for the required time.
During temperature profiling a thermocouple must be used under the package to check peak temperature and dwell
time in convection or vapour phase processes. Multiple thermocouples should be used per side to guarantee
minimum and maximum temperatures have been determined for successful reflow and quality control.
It is good practice for Contract Electronics Manufacturer (CEM) customers to factor in spare boards and components
to aid the Process Engineers’ in their set-up of the correct reflow process. It is also up to CEM sales teams to ask
for set up boards as part of a professional NPI build. Our two examples below show X-ray and optical views of non-
reflowed solder paste.
Incomplete Reflow
Incomplete reflow of solder paste is most commonly a profiling issue so every effort must be made to make sure
the set up of a robust profile is not skipped during assembly. Incomplete or non-reflow can be due to reflow soldering
small volumes of solder paste as they oxidise more quickly. In this case the balance of the profile is incorrect, and
the paste is exposed to a long period of preheat before reaching reflow temperature. In the case below, the flux
reaction part of the paste is exhausted leading to what engineers now refer to as “grapping”. This type of defect is
most commonly seen on small passive chip components. You will often find that some of the particles have reflowed
and the particles have bonded together on the pad and termination. Reflowing a second time will not overcome the
problem, just exaggerate the poor wetting issue.
The problem with this type of joint failure it will be conductive but have little strength so will in time become an
intermittent connection and extremely difficult to find.
Misalignment of BGA
Contrary to popular belief, light PBGAs will normally reflow and realign back into position if slightly misplaced, even
with lead-free solder. However, the termination must be in contact with at least some of the solder paste on the
pads to benefit from the maximum surface tension force during reflow. Most misaligned parts are related to the
original placement, in some cases where components are under the BGA when placed.
Misalignment may also be caused by vibration of the board assembly during placement and poor handling of loose
or parts in waffle trays prior to reflow but this is less common with 100% automation. The placement or insertion of
second stage components like through-hole connectors or odd form surface mount parts could cause package
movement before entering reflow. Our, all-time, favourite cause for misplacement are when the nitrogen curtains
on reflow ovens are not cut down to clear the board height passing through the oven!
The example image below shows BGA misalignment with complete reflow of the paste on the pad but with the
terminations separated. There are a couple of joints which have formed but they are distorted in shape due to the
misaligned position of the package to the pad. The second optical image also shows misalignment.
Deformed Joints
PBGA solder joints in the X-ray image will normally be slightly oval in shape after reflow. They may be depressed
by the weight of the component heat sink or package stiffener when compared to parts with the same ball size and
paste volume. Reliable joints can still be a different shape and caused by warpage of the board or the package, this
variation can be determined by measuring joint size variations across the package. Often if there is warpage when
the joints have already formed and the difference in height of the package from the board remains the joints will
appear to be stretched or compressed. There are also cases of elongated joints where a stray 0201 or 01005 chip
components were misplaced under a package before reflow.
On second side reflow it is possible for joints to be slightly extruded if the solder is in a liquid or semi liquid state.
This will be based on the package body weight and most PBGAs weigh only a couple of grams and so do not have
much impact. It is more likely for joints to be deformed after soldering. This can be seen after temperature cycling,
with and without underfill or conformal coating, under area array packages.
The X-ray image below shows good wetting to the pads at the device and PCB interfaces - these are the darker
circular regions seen at the top and bottom of the joints and identify the pad outlines. This example also shows ball
diameter variation between the top and bottom rows caused by joint compression. A microsection image also shows
joint distortion
Area array components found to be lifted on the board, normally on one side, are most likely to be caused by an
obstruction located beneath. The most common cause would be stray components under the package not allowing
the collapse and coalescence of the paste and balls to form joints during reflow.
Large fine-pitch packages are normally the last parts to be placed on a board and often on side two on a double
sided design. Any small passive component misplaced or dropped onto the board where a device is to be placed
can cause a short, lift the device and cause open joints. Equally, it is possible the chip component may reflow to
the pad surface in place of the correct solder ball. Checking the number of missed placements or the number of
dropped parts from the placement machine logs will highlight an issue in the process
Lifted Pads
Lifted pads on a printed circuit board are uncommon unless they are associated with some form of environmental
testing after assembly to test product reliability. Optical and X-ray inspection can be used to establish possible
failure prior to destructive testing of the board assembly.
The optical example below shows the pad lifted from the PCB but still attached to the joint on this BGA package.
The problem was caused by popcorning during rework. The force produced was high and with the adhesion of the
copper pads to the substrate lowering during heating, separation could have occurred. Examination showed that
tracks were also lifted on some areas under the package. The second and third example is probably more common,
mechanical strain has been applied to the board which has caused pad separation, this may be intermittent if a
track is still attached to the pad. This type of defect is commonly referred to as pad cratering.
Pad Cratering
Pad cratering is the partial or complete separation of the copper termination pad. This is typically seen on area
array devices after mechanical strain has been applied to them. This failure is different to pad lifting which occurs
when heat is applied during rework. Pad cratering has been reported on board assemblies with large BGA packages
directly after reflow soldering and is assumed to have occurred during cooling when strain is exerted on the pads.
Using some different PCB laminate materials has contributed to this type of failure due to their sometimes-brittle
epoxy construction.
Pad lifting has also been seen on boards which have been reworked but this may be due to popcorning of devices.
In these cases, the copper pads were retained on the solder sphere and separated from the PCB. It is easier to see
pad cratering on area array devices with optical inspection than x-ray although pad separation and track breaks
have been investigated in the past with x-ray using adjacent copper features to measure the separation. One of the
main problems with pad cratering is it can be left undetected until a break in electrical connection occurs.
Ball separation from the area array package is uncommon during assembly. In most cases, the pads on the device
are solder mask defined and on the printed circuit board they are most commonly copper defined. Basically, the
pad on the circuit board is more likely to separate from the laminate. Pad separation with the ball has been
experienced during popcorning, where a lot of pressure is applied while the solder is normally in a liquid state.
Separation could occur with poor ball attachment during manufacture but unlikely due to the quality control
procedures in semiconductor manufacturing operations. It would be more likely from the reballing process where
expensive devices are refurbished for remounting the devices to board assemblies.
The first example image shows ball separation from a device package where the copper pad can be seen still
attached to the BGA. There is also some evidence of mechanical damage to the ball probably where the joint has
been probed, which should not normally occur. The second microsection shows ball separation from the device.
This is most likely to occur with popcorning or warpage when the joint is in a liquid state in nitrogen due to the clean
separation of the ball to the pad. The dropped ball defect is sometimes related to the BGA package design where
the solder mask thickness is too thick putting pressure on the ball as the two expand
Champagne Voids
Substantial micro voiding present at the circuit board pad and solder ball interface is often referred to a “Champagne
Voiding”, Basically, this type of defect was associated with a surface finish reaction during soldering with either
silver or copper Organic Solderability Protector (OSP) board finishes. After much research by suppliers, this problem
has been practically eliminated. Measurement of the shear strength of reflowed balls on boards exhibiting this
problem did show that significant amounts of micro-voiding would decrease the strength of the joints.
The reaction between the soldering process and the surface of the pads created its own volatile reaction. The
examples have been mechanically separated and show both the pad and ball interfaces with the micro-voids.
If the solder paste volume is consistent, the pad design is consistent and both package and PCB remain parallel,
all solder joints should be uniform. The only other thing that would impact on the joint size is if any substantial
voiding is present. Experience shows that substantial voiding in joints will increase the ball size and affect the
package stand-off height if the voiding is excessive.
The X-ray image below is taken from the top down and shows a difference in the size and shape between the centre
of the package and the edge. The corner joint on the package may be an open joint. Changing to an oblique angle
of view shows a difference in the ball shapes between the centre of the package and the edge which may indicate
warping has occurred during reflow. The corner joint on this modified view confirms an open circuit joint, likely HoP.
BGA Popcorning
Package popcorning is fairly unusual today due to the factory controls in place for Moisture Sensitive Devices
(MSD). Many large plastic area array and fine pitch leaded devices are prone to absorbing moisture if not correctly
stored or handled prior to, or during, assembly. Fully populated boards that are not protected or have been returned
by a customer for rework can experience popcorning when reflowed. During inspection after soldering, devices that
have popped can exhibit minor ball size variations where the package has distorted due to expansion by moisture
out-gassing. Cracking can often be seen on the edge of a device where vapour has escaped.
The optical images below show where water vapour has escaped from the side and corner between the encapsulant
and the solder mask, leaving a crack. Both examples were intermittent in operations and showed solder ball
displacement.
Wetting Indicators
Basically, wetting indicators are changes to the typical round shape of area array pads at user-selected positions
on a board design. Normally wetting indicators are located as one on each corner of the package footprint and four
in the centre area under the die. The pad may be modified or the connected track leading out from the pad is
partially left uncovered with solder mask. When the board is printed with solder paste all apertures in the stencil are
common. When reflowed the solder paste can wet out along the specially exposed areas of the tracks, changing
the shape when viewed under X-ray inspection.
The first X-ray image shows the shape of the PCB pad and how the solder has extended slightly away from the
joint illustrating good wetting during reflow. The second optical image shows the change in shape of the solder joint
on the second row of a BGA. Why use wetting indicators, simple it makes validation of satisfactory reflow easier to
see!
Alignment Marks
Copper features in the shape of chevrons are normally placed around two or four corners of area array packages.
These are best placed on the board in the copper layer. They simply show a package has been correctly placed
with the edge of the device aligning with the edge of the copper on the printed board or positioned half over the
copper mark.
It is still very common even on mobile phones to see these alignment marks, in most cases today they are just a
straight line on two opposite corners of the footprint. They are beneficial during prototype assembly or during rework
and repair and are still good design practice to assist QC and cost nothing
During soldering of flip chip devices, open circuit joints can be the most common defect. Normally caused by poor
flux application, which makes soldering to pads more difficult, devices can float if too much flux is applied to the
device or substrate. When reflow starts, any volatile gassing can also cause displacement of the device.
Many flip chip and small area array devices are used on thin flexible substrates which can be prone to vibration
during reflow. This can be caused by the air, or nitrogen convection rate during reflow or the vibration created by
turbulence between different zones inside the reflow oven. Thin substrates should be held on pallets for the
complete assembly process to get the best yields.
X-ray images show opens between substrate pads plus a few successful joints on this 0.3mm pitch device.
A Package On Package (PoP) structure is basically a plastic BGA soldered on top of another PBGA package on
the main board assembly. The bottom PoP is soldered directly to the circuit board during reflow. Prior to reflow, and
after the bottom package placement, a second device is mounted on the top of the first. In this case the balls of the
second package are dipped into dip paste or dip flux to allow reflow. The first package has either mounting pads on
the top of the device or contains Through Solder Vias (TSV). TSVs are created by solder balls inside the bottom
package vias which when reflowed with the balls on the top package become a solder column rather than a typical
oval joint.
Provided the process is conducted correctly, solder joints are formed on both levels simultaneously during reflow
soldering. If there is an issue with the paste or flux application, open connections can occur. This is also true if
either the top or bottom package warps during reflow, which was common in the early days of PoP assembly.
The first X-ray image shown below highlights two open connections on the TSVs. If a solder joint is formed, it should
appear like a solder column, as in the other adjacent joints in the examples. The third image is a CT or 3D X-ray
image that has been reconstructed from a series of 2D X-ray images taken around the object and shows the open
connection between both solder balls.
Shorts on PoP
It is more common for shorts to form on the bottom PoP device due to it often having fine pitch of 0.3 – 0.4mm. It is
less likely for shorts to form between the top and bottom package as the pitch is much larger. If shorts do form it is
more likely that dip paste was used for assembly and too much was transferred to the bottom balls of the top device
during placement.
The X-ray image below shows two solder shorts inside the TSV cavities on the bottom package and this would not
be visible to any optical inspection. The second image shows solder shorts in two locations on the bottom PoP
package on one of the 0.3 mm pitch balls inner rows that could also not be seen optically and therefore needs X-
ray inspection to allow for fault finding.
The most well know failure is “Black Pad”. This is where the solder joints on the area array packages appear to
form perfectly when viewed optically and under x-ray. However, the interface between the solder and the nickel has
not formed a reliable tin/nickel joint after the gold has dissolved in to the solder. This problem is related to the plating
process used for the gold over nickel and has been very well researched. Although the joints can look perfectly
formed with solder flowing across and around the edges of the pads, they are still mechanically weak. The reason
the defect is referred to as Black Pad is the dark grey surface left on the pads when the joint separates. Often at
high magnification the surface of the pad also looks like a dried-up mud bank. The images below show the surface
of nickel after stripping gold and microsections of failed joints.
Two images are shown of balls separated from a reflowed BGA which itself has been mechanically removed from
the surface of a PCB. The joints on the board were investigated after environmental testing and showed intermittent
electrical resistance with cracking suspected. X-ray and optical inspection can sometimes find it difficult to determine
these types of faults.
Using a dye penetrant fluid to detect cracks on a board prior to breaking off the BGA can be very revealing. The
“Dye and Pry” test is often used for joint assessment to quickly, but destructively, assess joints. The first example
below illustrates the test using a red dye and shows 75% coverage, where virtually all the joint has cracked away
from the pad. The dye used on the second example shows no penetration between pad and ball. Temperature
cycling, vibration or drop testing can show up different failure modes. It should be borne in mind that although lead-
free alloys are stronger than tin/lead, mechanical shock can still be an issue as they are harder.
The following documents are available to purchase from the relevant publishers or distributors. Please check that
you have the latest revision.
IPC-4552 Specification for Electroless Nickel/Immersion Gold (ENIG) Plating for Printed Circuit Boards
IPC-4553 Specification for Immersion Silver Plating for Printed Boards
IPC-4554 Specification for Immersion Tin Plating for Printed Circuit Boards
IPC-4555 Specification for Organic Solderability Preservative (OSP) for Printed Circuit Boards (Committee Draft)
IPC-4556 Electroless Nickel/Electroless Palladium/Immersion Gold (ENEPIG) Plating for Printed Circuit Boards
In addition, specifications for solder levelled & OSP boards are still required for the industry. IPC have drafted
documents but have never passed out of the committee stages. The following are text books on printed board
manufacture and design which include details on the use of area array packaging
Printed Circuit Handbook (7th Edition and the PCB Manufacturing Bible)
Clyde Coombs, Jr. - McGraw Hill
A wide range of text books are available to purchase from the SMTA and can be seen on line at [Link]
The length or delivery method of the training can be adapted to suit your team and location. The
course content can also be changed to suit your company requirements
Text and images remain the copyright of Keith Bryant & Bob Willis unless stated in the text and should not be copied
or transmitted through any medium without prior agreement in writing from the author Keith Bryant.
Although the author has made every effort to achieve accuracy of the content, no responsibility is assumed for
errors or omissions to any of the text or references to other publications and documents by SMTA.
This book may include hyperlinks to other websites owned and operated by third parties. These links are not
recommendations. We have no control over the contents of third-party websites, and we accept no responsibility
for them or for any loss or damage that may arise from your use of them.
The following are gratefully acknowledged, Yxlon for sponsoring the guide and Peter Koch, Yxlon International for
providing many of the x-ray images included. Also Dr David Bernard for his contribution and editing the guide.
Author’s Profile
Keith Bryant
A fully qualified engineer, Keith has over thirty years’ experience in Electronics Manufacturing. He
is well known and respected for presenting technical papers at many high-profile events around
the world and for his many published articles and interviews.
Keith started his career in this industry with bare printed circuit boards in the early days of multi-
layer technology, moving through to contract manufacturing. He had 10 years’ experience with
advanced materials and soldering systems before working with high technology X-ray and AOI
Systems, again for 10 years.
Then for almost 3 years Keith worked as a technology and business consultant, assisting many of
the major industry names as well as being Technology Editor for an Industry magazine for part of
that time. From 2017 to 2019 Keith was Global Sales Director of the leading X-ray manufacturer.
Recently he has reverted to a Consultancy role allowing him more freedom to pursue other(new)
projects, including i4.0.
He was Chairman of the SMART Group for 11 years and is now Chairman of the recently formed
SMTA Europe. Last year he was presented with the SMTA International Leadership award.
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