class Uart
{
private:
uint32_t pwrEmuReg=0; // rw regx
uint32_t modDefReg=0; // rw regx
uint32_t fifoConReg=0; // w regx
uint32_t linConReg=0; // rw regx
uint32_t linStatReg=0; // r regx
uint32_t transHoldreg=0 // r regx
uint32_t resBuffreg=0// r regx
uint32_t tmpTxReg=0 // for storing/holding temporary data from Tx,[we
may consider scratch pad regx]
uint32_t tmpRxReg=0 // for storing/holding temporary data from Rx,[we
may consider scratch pad regx]
/*
*) Enable tranmiter and receiver for UART
*) selecting baurd rate by calucating divisor value, oversampling mode
*) select the FIFO mode or non-FIFO mode and configure respective FIFO
regex
*) setup the intial settings for data transfers like word length, parity
modes, num of stop bits
*/
public:
void uartInit()
{
pwrEmuReg =(1<<0)|(1<<13)|(1<<14); // free mode, tx and rx enabled -->
0x6001
modDefReg =(1<<1); // as of now choosing 13x over sampling
fifoConReg =(1<<0)|(xx<<6); //choose the trigger value in fifo/ non
fifo mode
linConReg =(3<<0)|(x<<7); // x value can change based on address shared
by rbr, thr regex
}
/*
In THR regx, data is resided and TSR is not memnory mapped, it is considered
by configuring with interbnal h/w regex
==== FIFO Interrupt mode =======
*) In FCR, check the status of FIFOEN and TXCLR
====FIFO polling mode ========
*) THRE bit indicates when THR is empty
*) TEMT bit indicates that both THR and TSR empty
char uartTransmit()
{
while (!(linStatReg&(1<<5)) // checking THR is not empty
{
if (linStatReg&(1<<6) // Here we are checcking both TSR and THR are
empty i.e, which tells that tx is idle for transmitting
{
break;
}
}
if (linStatReg&((1<<3)|(1<<4)|(1<<5))) //check any errors before
transmit [0x38]
{
// if yes , remind the user the data is corrupted and need to
share the data frame again
return false;
}
tmpTxReg = transHoldreg // 0 t0 7 bits contains data which are read
only
return tmpTxReg;
}
char uartReceive()
{
while (!(linStatReg&(1<<0)) // here I am checking data is ready in rx
buffer regex which obtained from rx shift regex
{
if (linStatReg&((1<<3)|(1<<4)|(1<<5))) //[0x38]
{
return -1; // remind the user the data is corrupted and need to
share the data frame again on rx buffer
}
tmpRxReg = resBuffreg // 0 to 7 bits rx buffer regex contains receving
data
return tmpRxReg
};
main()
{
Uart uObj;
[Link]();
const char* msg = "uart_msg_data"; // uart string to pass
for (const char* p = msg; *p; ++p)
{
uObj.uart_transmit(/*memory_area_addr*/,*p); // here along with
charcter, we need to pass address of some memory area should be choosen to fetch
and send this each character
}
char rx_byte = uObj.uart_receive(/*memory_area_addr*/);
/* below code is for viewing the rx data on transmission part to cross check
the data is correct or not
if (rx_byte != -1)
{
uObj.uart_transmit(/*memory_area_addr*/,rx_byte);
}
*/
}
// Note: here we are considering regesiters as normal varaiables, once we get any
information for registers addresses we can assign a pointer
and perform needed operations on that respective registers