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ARM VDK Debugging Insights in Virtualizer Studio

The video provides an overview of the Virtualizer Studio's VDK Debug Interface, focusing on ARM-based SoCs and their components like CCI, GIC, and TZC. It highlights the VDK's structure, memory map, configuration management, and embedded software debugging workflow, showcasing features such as hierarchical browsing, breakpoint setup, and Linux boot interaction. The demo concludes with a fully booted Linux image, allowing for interactive debugging and inspection of system components.

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0% found this document useful (0 votes)
13 views2 pages

ARM VDK Debugging Insights in Virtualizer Studio

The video provides an overview of the Virtualizer Studio's VDK Debug Interface, focusing on ARM-based SoCs and their components like CCI, GIC, and TZC. It highlights the VDK's structure, memory map, configuration management, and embedded software debugging workflow, showcasing features such as hierarchical browsing, breakpoint setup, and Linux boot interaction. The demo concludes with a fully booted Linux image, allowing for interactive debugging and inspection of system components.

Uploaded by

kasikoduru
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© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as TXT, PDF, TXT or read online on Scribd

Here are **detailed notes covering every key point from the video "Insight into the

Virtualizer Studio – VDK Debug Perspective GUI | Synopsys"**[1]:

ARM Core Components -- CPU


CCI: Cache Coherent Interconnect
Used for providing cache coherency between clusters of CPUs and other components in
ARM-based SoCs (such as [Link] designs).
Example: CoreLink CCI-400, CCI-500, CCI-550

GIC: Generic Interrupt Controller


Manages, prioritizes, and routes interrupt signals from peripherals to processor
cores in ARM systems.
Ensures efficient handling of interrupts in multi-core environments.

TZC: TrustZone Address Space Controller


ARM’s TZC-400 or TZC-380 blocks secure and partition memory regions, providing
access control between secure and non-secure worlds for
ARM TrustZone-enabled SoCs.

BPC, which is a BOX Mini PC designed by the company ICOP specifically for high-
stability applications

**Introduction and Purpose**


- The video presents an overview of the Virtualizer Studio’s VDK (Virtual
Development Kit) Debug Interface using a Synopsys Armv8 Base VDK,
which simulates ARM’s v8 reference platform.
- The aim is to accelerate and streamline software development and debugging using
Virtualizer Studio.

**VDK Structure**
- In the **design browser window**, you can see the VDK models organized
hierarchically:
- Two main blocks: **CPU subsystem** and **Motherboard**.
- The **CPU subsystem** contains:
- CPUs
- Interrupt controller
- Coherent interconnect
- The **Motherboard** contains:
- UARTs
- Timers
- Memory components
- Interface components (Ethernet, MMC)
- The browser window lets users inspect system signals and registers. Clicking any
component on the left displays its details on the right pane.

**Memory Map Tab**


- The **memory map tab** provides a complete overview of the VDK’s memory
architecture.
- Users do not need to refer back to system specs while debugging.
- The tab makes it easy to inspect components and registers:
- Example: Select UART0 and view its register details in the memory map context.

**Configuration (VP Config) Management**


- Virtualizer Studio allows you to create multiple "**VP configs**" (Virtual
Platform Configurations) for different software stack setups.
- The demo VDK has two pre-packaged configs:
- A **stock Linaro image** for ARMv8
- A **bare-metal test base** (platform test base)
- Selecting a config and clicking **run** starts simulation, after which control
moves to the VDK debugger when initialization is complete.

**Embedded Software Debugging Workflow**


- The **VP disassembly window** displays execution status for each core during a
paused simulation.
- This shows where the code execution will begin for every core.

**Setting Up Debug Sessions**


- You can focus debugging on specific code sections:
- **Breakpoints** (software or hardware) and execution conditions
- **Setting a software breakpoint**:
- Example: At the beginning of the **start kernel** routine, search and double-
click the location.
- **Setting a hardware breakpoint**:
- Locate the device handling keyboard input.
- Set a breakpoint on accesses to its control register (KMICR).
- All breakpoints appear in a **breakpoints summary window**.

**Resuming and Monitoring Simulation**


- Clicking **resume** continues simulation.
- The **UART file window** displays boot sequence messages (Trusted Firmware boot),
showing progress until the software breakpoint is hit.
- Users can **single-step code execution** in the disassembly window and observe
the execution path.

**Linux Boot and Interaction**


- Once Linux boots (hardware breakpoint hit), users can:
- Inspect control registers and bit fields in the design browser.
- See which CPU routine accesses each register.
- **Edit register values** directly.
- Remove all breakpoints with one click and let the Linux image boot fully.
- The **virtual LCD panel** appears with a Linux prompt for terminal interaction.
- Standard Linux commands may be entered at the prompt.
- CPU subsystem details are printed, reflecting earlier information from the design
browser.

**Conclusion**
- The demo ends with a fully booted Linux image and the ability to interactively
debug and inspect system components.

**Summary of Features Highlighted**


- Hierarchical browsing of system hardware components and registers
- Complete memory map overview for easy debugging
- Flexible configuration management (multiple VP configs)
- Pausing, breakpoint setup, single-step execution, and direct register editing
- Visual boot and debug interface including terminal interaction

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