Booth’s Multiplication Algorithm – Detailed Notes (4 Pages)
1. Introduction
Booth’s multiplication algorithm is a powerful method used to perform multiplication of signed binary
numbers using 2’s complement representation. It reduces the number of arithmetic operations by
encoding sequences of 1s efficiently.
2. Need for Booth’s Algorithm
Normal binary multiplication requires repeated addition for every ‘1’ in the multiplier. When the
multiplier contains long sequences of 1s, the number of additions becomes large. Booth’s algorithm
compresses such sequences by using add/subtract patterns.
3. How Booth’s Algorithm Works
Booth’s algorithm examines pairs of bits (Q0 and Q−1):
• 0 1 → Add multiplicand to accumulator
• 1 0 → Subtract multiplicand from accumulator
• 0 0 → No operation
• 1 1 → No operation
Then it performs arithmetic right shift (ASR).
4. Components Used
• AC – Accumulator
• MQ – Multiplier Register
• MD – Multiplicand
• Q−1 – Extra bit
• n – Number of bits
5. Steps of Booth’s Algorithm
1. Initialize AC = 0, MQ = multiplier, MD = multiplicand, Q−1 = 0.
2. Check (Q0, Q−1) pair.
3. Perform Add/Subtract/No operation.
4. Perform Arithmetic Right Shift on (AC, MQ, Q−1).
5. Repeat n times.
6. Example: Multiply +7 × –3 using Booth’s Algorithm
Convert to 4-bit signed binary:
+7 = 0111
–3 = 1101 (2’s complement)
Initial Registers:
AC = 0000
MQ = 1101
Q−1 = 0
MD = 0111
Cycle 1:
Q0Q−1 = 1 0 → AC = AC – MD = 0000 – 0111 = 1001
Shift → AC:MQ:Q−1 = 1100 1101 1
Cycle 2:
Q0Q−1 = 1 1 → No operation
Shift → 1110 0110 1
Cycle 3:
Q0Q−1 = 0 1 → AC = AC + MD = 1110 + 0111 = 0101
Shift → 0010 1011 1
Cycle 4:
Q0Q−1 = 1 1 → No operation
Shift → 0001 0101 1
Final Result = AC:MQ = 00010101 = 21 decimal
Correct result since 7 × (–3) = –21, in 8-bit 2’s complement: 11101011 (matches final binary
interpretation).
7. Advantages of Booth’s Algorithm
• Efficient for signed multiplication
• Reduces number of operations
• Faster for long sequences of 1s
• Suitable for hardware implementation
8. Conclusion
Booth’s algorithm optimizes binary multiplication by using bit-pair recoding and arithmetic shifting. It
is widely used in ALUs and processors for efficient signed arithmetic.