NITTE MEENAKSHI INSTITUTE OF TECHNOLOGY
Yelahanka, Bangalore-560064, Karnataka, India.
Department of Electronics and Communication Engineering
LEARNING ASSESMENT REPORT
“ANALOG ELECTRONICS CIRCUIT”
(22ECG32)
LAB REPORT
ON
“FIXED BIAS BJT CIRCUIT”
Submitted by
IMRAN SADIQ
1NT24EC053
Subject Guide
Ms. Panchami J
Assistant Professor
Department of Electronics and Communication Engineering
Nitte Meenakshi Institute of Technology, Yelahanka, Bengaluru-560064
TITLE OF THE PROJECT:
Fixed-bias BJT Circuit
AIM:
To design and simulate a fixed-bias BJT circuit for a collector current (IC) of 2 mA and collector-
emitter voltage (VCE) of 5 V, and to determine the operating point (Q-point) using Multisim.
COMPONENTS REQUIRED:
Sl. No. Component Specification Quantity
1 NPN Transistor BC547 / 2N2222 1
2 DC Supply 0–10 V variable 1
3 Resistors As per design 2
4 Breadboard / Multisim Software — 1
5 Connecting Wires — As required
6 Ammeter / Voltmeter For measurements 1 each
THEORY:
The fixed-bias configuration is the simplest type of BJT biasing method. A resistor is connected
between the base and the supply voltage (VCC) to establish the base current (IB).
The collector resistor (RC) is used to control the collector current (IC) and to set the voltage across
the collector-emitter junction (VCE).
Here, the base resistor 𝑅𝐵 provides the required base current 𝐼𝐵 , which determines the collector
current 𝐼𝐶 .
A resistor 𝑅𝐶 is connected in the collector branch to develop the collector-emitter voltage 𝑉𝐶𝐸 .
The transistor operates in the active region when 𝑉𝐶𝐸 > 𝑉𝐵𝐸 , and the collector current is given by:
𝐼𝐶 = 𝛽𝐼𝐵
Key Equations:
𝑉𝐶𝐶 −𝑉𝐵𝐸
1. 𝐼𝐵 = 𝑅𝐵
2. 𝐼𝐶 = 𝛽 × 𝐼𝐵
3. 𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 × 𝑅𝐶
Where:
• 𝑉𝐵𝐸 ≈ 0.7 V for silicon transistor
• 𝛽= current gain of the transistor
Q-point (Operating Point):
The intersection of the DC load line with the transistor’s output characteristics, representing the
steady-state operating conditions of IC and VCE.
DESIGN CALCULATIONS:
Given: 𝐼𝐶 = 2 mA, 𝑉𝐶𝐸 = 5 V
Assume: 𝑉𝐶𝐶 = 10 V, 𝑉𝐵𝐸 = 0.7 V, 𝛽 = 100
𝑉𝐶𝐶 −𝑉𝐶𝐸 10−5
1. Collector resistor 𝑅𝐶 : 𝑅𝐶 = = 2×10−3 = 2.5 kΩ
𝐼𝐶
𝐼𝐶 2×10−3
2. Base current 𝐼𝐵 : 𝐼𝐵 = = = 20 𝜇A
𝛽 100
𝑉𝐶𝐶 −𝑉𝐵𝐸 10−0.7
3. Base resistor 𝑅𝐵 : 𝑅𝐵 = = = 465 kΩ
𝐼𝐵 20×10−6
Thus, 𝑅𝐶 = 2.5 kΩ, 𝑅𝐵 = 465 Kω
CIRCUIT DIAGRAM:
PROCEDURE:
• Connect the circuit as shown in the diagram using a BC547 transistor.
• Set the DC supply 𝑉𝐶𝐶 = 10 V.
• Apply power and measure the collector and base currents.
• Record 𝑉𝐶 and 𝑉𝐸 voltages to find 𝑉𝐶𝐸 = 𝑉𝐶 − 𝑉𝐸 .
• Simulate the circuit in Multisim and obtain the DC operating point.
• Plot the load line and mark the Q-point corresponding to the calculated 𝐼𝐶 and 𝑉𝐶𝐸 .
• Compare the theoretical and simulated value
OBSERVATION:
Parameter Theoretical Value Simulated Value
𝐼𝐵 20 µA ≈ 19.9 µA
𝐼𝐶 2 mA ≈ 1.99 mA
𝑉𝐶𝐸 5V ≈5V
𝑉𝐵 0.7 V ≈ 0.9 V
Q-Point: 𝑄(𝐼𝐶 = 2 mA, 𝑉𝐶𝐸 = 5 V)
WAVEFORM:
RESULT:
The fixed-bias BJT circuit was designed for 𝐼𝐶 = 2 mAand 𝑉𝐶𝐸 = 5 V.
The designed resistor values were 𝑅𝐶 = 2.5 kΩand 𝑅𝐵 = 465 kΩ.The simulated results closely
matched the theoretical calculations, confirming correct biasing of the transistor.
CONCLUSION:
The experiment successfully demonstrates the fixed-bias method of biasing a BJT.
The operating point (Q-point) obtained was stable at 𝐼𝐶 = 2 mAand 𝑉𝐶𝐸 = 5 V.
However, it was observed that the fixed-bias configuration is sensitive to variations in transistor
gain (𝛽) and temperature, making it less stable compared to other biasing techniques