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Indian Institute of Technology Kharagpur
Course Name: Computer Architecture and Organization
Assignment- Week 8
TYPE OF QUESTION: MCQ/MSQ/SA
Number of questions: 10 Total mark: 10 x 1 = 10
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QUESTION 1:
The binary number 110.1 represents the decimal value 6.5. If the binary point is shifted left by 2
positions to get the new binary number 1.101, the new decimal value will be _______.
Correct Answer: 1.625
Detailed Solution:
Left shift by 2 is equivalent to divide by 22 ➔ 6.5 / 4 = 1.625
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QUESTION 2:
Which of the following fractions can be represented exactly in binary?
a. 1/64
b. 7/60
c. 25/100
d. 3/10
Correct Answer: a, c
Detailed Solution:
A fraction can be exactly represented in binary if its simplified denominator is a power of 2.
Which is true for option (a) :: 1/64 → (denominator is 2^6), and option c (as after simplification
it will become 1/4).
Thus options (a) and (c) are correct.
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NPTEL Online Certification Courses
Indian Institute of Technology Kharagpur
QUESTION 3:
In IEEE floating point representation, what is the range of normalized mantissa (significand)?
a. [0.0, 1.0)
b. [1.0, 2.0)
c. [-1.0, +1.0)
d. Power of 2
Correct Answer: b
Detailed Solution:
The normalized mantissa range is [1.0, 2.0): it includes 1.0 but excludes 2.0.
Thus option (b) is correct.
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QUESTION 4:
If the exponent bits are all 0 in IEEE 754 standard, and the mantissa is non-zero, what does the
number represent?
a. Zero
b. Not a Number (NaN)
c. Infinity
d. Number close to 0
e. None of these.
Correct Answer: d
Detailed Solution:
In IEEE 754 standard
If Exponent = 0
Mantissa = 0 ➔ Zero
Mantissa != 0 ➔ Denormalized Number (value close to 0)
If Exponent 255 (all 1’s)
Mantissa = 0 ➔ Infinity
Mantissa != 0 ➔ NaN
Otherwise normalized number.
NPTEL Online Certification Courses
Indian Institute of Technology Kharagpur
Thus option (d) is correct.
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QUESTION 5:
Which of the following floating-point operations require exponent alignment before the actual
computation?
a. Addition
b. Subtraction
c. Multiplication
d. Division
Correct Answer: a, b
Detailed Solution:
For addition and subtraction, exponents must be aligned before mantissas can be operated.
For multiplication/division, alignment is not required.
Thus correct options are (a) and (b).
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QUESTION 6:
What does the 32-bit IEEE 754 binary number 01111111100000000000000000000000
represent?
a. +Infinity
b. -Infinity
c. NaN
d. Zero
Correct Answer: a
Detailed Solution:
Sign bit is 0, E = 11111111 (all 1’s), M = 00000…. (all 0)
This indicates + Infinity.
Thus correct option is (a).
____________________________________________________________________________
NPTEL Online Certification Courses
Indian Institute of Technology Kharagpur
QUESTION 7:
Implement the instruction execution process in a CPU as a pipeline:
a. Reduces memory usage
b. Increases instruction throughput
c. Increases clock speed
d. Decreases power consumption
Correct Answer: b
Detailed Solution:
Pipelining allows overlapped execution of multiple instructions by dividing the instruction
processing into distinct stages (like fetch, decode, execute, etc.). This significantly increases
instruction throughput (i.e., the number of instructions completed per unit time).
Thus correct option is (b)
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QUESTION 8:
A 5-stage pipeline has stage delays of 20, 25, 15, 30, and 18 ns. Each latch adds 4 ns delay.
What is the total time to execute 800 instructions?
a. 27.34 Seconds
b. 27.34 Milliseconds
c. 27.34 Microseconds
d. 27.34 Nanoseconds
Correct Answer: c
Detailed Solution:
Max stage delay = 30 ns
Clock Cycle time = 30ns + 4ns (latch delay)
Total time to process 800 instructions = (5 – 1 + 800) × 34 ns = 804 × 34 = 27200 ns = 27.20 μs
Thus correct option is (c).
____________________________________________________________________________
NPTEL Online Certification Courses
Indian Institute of Technology Kharagpur
QUESTION 9:
A non-pipelined processor takes 50 ns to execute each instruction. A pipelined processor has 5
stages with each stage taking 25 ns. If 100 instructions are executed, the speedup of the
pipelined processor compared to the non-pipelined one is approximately ___________.
(Assume no stall or skew delay)
Correct Answer: 1.90 to 1.95
Detailed Solution:
Execution Time:
Non-Pipelined ➔ 50ns x 100 = 5000 ns.
Pipelined ➔ (5-1 + 100) x 25 = 2600 ns
Speedup ➔ Tnon-pipe/Tpipe = 5000/2600 ➔ 1.923
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QUESTION 10:
Given the reservation table below, which of the following is the correct set of forbidden
latencies?
a. {2}
b. {2, 3}
c. {3}
d. {1, 3}
Correct Answer: c
Detailed Solution:
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Indian Institute of Technology Kharagpur
The distance between two checkmarks in a row defines a forbidden latency. In the given
reservation table, the only forbidden latency is 3.
Thus correct option is (c).
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