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Cache Access Methods Explained

The document explains cache access methods, detailing how a byte address is divided into Tag, Index/Set, and Offset for cache lookups. It provides a numeric example of a direct-mapped cache with a 32-bit address format and highlights common pitfalls in cache access calculations. Key concepts include the importance of using powers of two for sizes and understanding potential collisions in direct-mapped caches.

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6 views2 pages

Cache Access Methods Explained

The document explains cache access methods, detailing how a byte address is divided into Tag, Index/Set, and Offset for cache lookups. It provides a numeric example of a direct-mapped cache with a 32-bit address format and highlights common pitfalls in cache access calculations. Key concepts include the importance of using powers of two for sizes and understanding potential collisions in direct-mapped caches.

Uploaded by

jerwincute
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd

Laboratory Module: Cache Access

Methods
Callout Box: Tag, Index, and Offset — Quick Guide
How a byte address is split in a cache lookup

[ Tag | Index / Set | Offset ]


(high bits) (middle) (low bits)

What they mean:

• Offset: Selects the byte position inside a cache block (line).


• Index / Set: Selects which set (DM: the exact line) to probe.
• Tag: Identifies which memory block is currently stored in that set/line.

Field Selects # bits Formula (byte- Hardware use


addressed)
Offset Byte inside log2(B) offset = addr & Pick the exact
block (B-1) byte/word
from the
fetched line
Index / Set Set (DM: line) log2(S) (DM: set = (addr >> Choose which
log2(L); FA: 0) log2(B)) & (S- set to read;
1) compare only
here
Tag Which block is AddrWidth - tag = addr >> Compare
here (Index/Set + (log2(B) + against stored
Offset) log2(S)) tag(s) for
hit/miss

Numeric mini-example (Direct-Mapped)


• Assume 32-bit addresses, C=8 KiB, B=32 B → L=256 lines.
• Bits: Offset=log2(32)=5; Index=log2(256)=8; Tag=32-(5+8)=19.
• Address format: [ Tag19 | Index8 | Offset5 ].
• Let X = 0x00401034.
• offset = X & 0x1F = 0x14 (20)
• index = (X >> 5) & 0xFF = 0x81 (129)
• tag = X >> 13 = 0x200 (512)
• On access, line=index=129 is probed; tag must match 0x200 (and valid=1) for a hit.

Common pitfalls
• Always compute Offset in BYTES (convert word-addressed problems to bytes first).
• Sizes should be powers of two for simple shift/mask formulas.
• DM collisions: addresses separated by 2^(Index+Offset) bytes map to the same line
(ping-pong conflicts).
• VIPT L1 rule: SetBits + Offset ≤ PageOffset (e.g., ≤12 for 4 KiB pages).

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