MICROPROCESSOR:

A Microprocessor is an important part of a computer architecture without which you will not
be able to perform anything on your computer. It is a programmable device that takes in input
perform some arithmetic and logical operations over it and produce desired output. In simple
words, a Microprocessor is a digital device on a chip which can fetch instruction from
memory, decode and execute them and give results.
Basics of Microprocessor –
A Microprocessor takes a bunch of instructions in machine language and executes them, telling
the processor what it has to do. Microprocessor performs three basic things while executing the
instruction:
1. It performs some basic operations like addition, subtraction, multiplication, division and
some logical operations using its Arithmetic and Logical Unit (ALU). New
Microprocessors also perform operations on floating point numbers also.
2. Data in Microprocessor can move from one location to another.
3. It has a Program Counter (PC) register that stores the address of next instruction based on
the value of PC, Microprocessor jumps from one location to another and takes decision.
BIT:

BYTE:

WORD:

NIBBLE:
Buses:

These are the group of lines used for interconnecting various building blocks within a computing
system. These lines transmit electrical signals over them and provide a common means of
communication between these blocks. Each line is capable of transmitting one electrical pulse,
representing a binary bit.

Buses can be

 Unidirectional
 Bidirectional
 Address Bus:
 It is unidirectional (bits flow in one direction) i.e. from microprocessor to memory or
peripheral devices.
 Each peripheral or memory location is identified by a binary number called an
ADDRESS.
 If the number of address lines are ‘n’ then microprocessor is capable of addressing ‘2n’
memory location.
No. of address pins(n) No. of memory Locations(2n)
8 28 = 256
9 29 =512
10 210 =1k
11 211=2k
12 212 =4k
13 213 =8k
14 214 =16k
15 215 =32k
16 216 =64k

Data Bus:

 It is a group lines used for data flow.

 These lines are bidirectional i.e. data can flow in both directions, between CPU and
peripheral devices.

Control Bus:

 The control bus carry control signals, which consists of signals for selection
of memory or I/O device from the given address, direction of data transfer
and synchronization of data transfer in case of slow devices.
 8085 microprocessor
The salient features of 8085 μp are:
• It is a 8 bit microprocessor.
• It is manufactured with N-MOS technology.
• It has 16-bit address bus and hence can address up to 216 = 65536 bytes (64KB) memory
locations through A -A .
0 15
• The first 8 lines of address bus and 8 lines of data bus are multiplexed AD – AD .
0 7
• Data bus is a group of 8 lines D – D .
0 7
• It supports external interrupt request.
• A 16 bit program counter (PC)
• A 16 bit stack pointer (SP)
• Six 8-bit general purpose register arranged in pairs: BC, DE, HL.
• It requires a signal +5V power supply and operates at 3.2 MHZ single phase clock.
• It is enclosed with 40 pins DIP (Dual in line package).

Memory organization
Suppose you have 2 address lines, then no. of memory locations will be: 22 =4(00,01,10,11)

8 bit data 00
01
10
11

Similarly 8085 has 16 bit address bus, then no. of memory locations will be: 216
(64k x 8bit)
Note: 8 bit data means: it has shift registers having 8 flip flops each storing 1 bit.
Registers in 8085:

(a) General Purpose Registers –

The 8085 has six general-purpose registers to store 8-bit data; these are identified as- B,
C, D, E, H, and L. These can be combined as register pairs – BC, DE, and HL, to perform
some 16-bit operation. These registers are used to store or copy temporary data, by using
instructions, during the execution of the program.

(b) Specific Purpose Registers –

 Accumulator:
The accumulator is an 8-bit register (can store 8-bit data) that is the part of the
arithmetic and logical unit (ALU). After performing arithmetical or logical operations,
the result is stored in accumulator. Accumulator is also defined as register A.
 Flag registers:
 The flag register is a special purpose register and it is completely different from other
registers in microprocessor. It consists of 8 bits and only 5 of them are useful. The
other three are left vacant and are used in the future Intel [Link] 5 flags are
set or reset (when value of flag is 1, then it is said to be set and when value is 0, then
it is said to be reset) after an operation according to data condition of the result in the
accumulator and other registers. The 5 flag registers are:
1. Sign Flag: It occupies the seventh bit of the flag register, which is also known as
the most significant bit. It helps the programmer to know whether the number
stored in the accumulator is positive or negative. If the sign flag is set, it means
that number stored in the accumulator is negative, and if reset, then the number is
positive.
2. Zero Flag:: It occupies the sixth bit of the flag register. It is set, when the
operation performed in the ALU results in zero(all 8 bits are zero), otherwise it is
reset. It helps in determining if two numbers are equal or not.
3. Auxiliary Carry Flag: It occupies the fourth bit of the flag register. In an
arithmetic operation, when a carry flag is generated by the third bit and passed on
to the fourth bit, then Auxiliary Carry flag is set. If not flag is reset. This flag is
used internally for BCD(Binary-Coded decimal Number) operations.
Note – This is the only flag register in 8085 which is not accessible by user.
4. Parity Flag: It occupies the second bit of the flag register. This flag tests for
number of 1’s in the accumulator. If the accumulator holds even number of 1’s,
then this flag is set and it is said to even parity. On the other hand if the number of
1’s is odd, then it is reset and it is said to be odd parity.
5. Carry Flag: It occupies the zeroth bit of the flag register. If the arithmetic
operation results in a carry(if result is more than 8 bit), then Carry Flag is set;
otherwise it is reset.
(c) Memory Registers –
There are two 16-bit registers used to hold memory addresses. The size of these registers
is 16 bits because the memory addresses are 16 bits. They are :-
 Program Counter: This register is used to sequence the execution of the
instructions. The function of the program counter is to point to the memory
address from which the next byte is to be fetched. When a byte (machine
 code) is being fetched, the program counter is incremented by one to point
to the next memory location.
 Stack Pointer: It is used as a memory pointer. It points to a memory
location in read/write memory, called the stack. It is always
incremented/decremented by 2 during push and pop operation.
Example –
Here two binary numbers are added. The result produced is stored in the
accumulator. Now lets check what each bit means. Refer to the below
explanation simultaneously to connect them with the example.

 Sign Flag (7th bit): It is reset(0), which means number stored in the
accumulator is positive.
 Zero Flag (6th bit): It is reset(0), thus result of the operations
performed in the ALU is non-zero.
 Auxiliary Carry Flag (4th bit): We can see that b3 generates a carry
which is taken by b4, thus auxiliary carry flag gets set (1).
 Parity Flag (2nd bit): It is reset(0), it means that parity is odd. The
accumulator holds odd number of 1’s.
 Carry Flag (0th bit): It is set(1), output results in more than 8 bit.

Pin Diagram of 8085

The pins of a 8085 microprocessor can be classified into seven groups −

1. Address bus

A15-A8, it carries the most significant 8-bits of memory/IO address.

2. Data bus

AD7-AD0, it carries the least significant 8-bit address and data bus.

3. Control and status signals

These signals are used to identify the nature of operation. There are 3 control signal and 3 status
signals.

Three control signals are RD, WR & ALE.

 RD − This signal indicates that the selected IO or memory device is to be read and is
ready for accepting data available on the data bus.

 WR − This signal indicates that the data on the data bus is to be written into a selected
memory or IO location.

 ALE − It is a positive going pulse generated when a new operation is started by the
microprocessor. When the pulse goes high, it indicates address. When the pulse goes
down it indicates data.

4. Three status signals are IO/M, S0 & S1.

IO/M
This signal is used to differentiate between IO and Memory operations, i.e. when it is high
indicates IO operation and when it is low then it indicates memory operation.

S1 & S0

These signals are used to identify the type of current operation.

5. Power supply

There are 2 power supply signals − VCC & VSS. VCC indicates +5v power supply and VSS
indicates ground signal.

6. Clock signals

There are 3 clock signals, i.e. X1, X2, CLK OUT.

 X1, X2 − A crystal (RC, LC N/W) is connected at these two pins and is used to set
frequency of the internal clock generator. This frequency is internally divided by 2.

 CLK OUT − This signal is used as the system clock for devices connected with the
microprocessor.

Interrupts & externally initiated signals

Interrupts are the signals generated by external devices to request the microprocessor to perform
a task. There are 5 interrupt signals, i.e. TRAP, RST 7.5, RST 6.5, RST 5.5, and INTR. We will
discuss interrupts in detail in interrupts section.

 INTA − It is an interrupt acknowledgment signal.

 RESET IN − This signal is used to reset the microprocessor by setting the program
counter to zero.

 RESET OUT − This signal is used to reset all the connected devices when the
microprocessor is reset.

 READY − This signal indicates that the device is ready to send or receive data. If
READY is low, then the CPU has to wait for READY to go high.

 HOLD − This signal indicates that another master is requesting the use of the address
and data buses.

 HLDA (HOLD Acknowledge) − It indicates that the CPU has received the HOLD
request and it will relinquish the bus in the next clock cycle. HLDA is set to low after the
HOLD signal is removed.

7. Serial I/O signals

There are 2 serial signals, i.e. SID and SOD and these signals are used for serial communication.

 SOD (Serial output data line) − The output SOD is set/reset as specified by the SIM
instruction.

 SID (Serial input data line) − The data on this line is loaded into accumulator whenever a
RIM instruction is executed.

INSTRUCTION AND DATA FORMATS

Intel 8085 is an 8-bit microprocessor. It handles 8-bit data at a time. One byte consists of 8-
bits.A memory location for Intel 8085 microprocessor is designed to accumulate 8-bit data. If 16-
bit data are to be stored, they are stored in consecutive memory locations. The address of
memory location is 0f 16-bit i.e. 2 bytes.
The various techniques to specify data for instructions are:
(1) 8-bit or 16-bit data may be directly given in the instruction itself.
(2) The address of the memory location, I/O port or I/O device, where data resides, may
be given in the instruction itself.
(3)In some instructions only one register is specified. The content of the specified register
is one of the operand and other operand is the accumulator.
(4) Some instructions specify two registers. The contents of the registers are the required
data.
Due to different ways of specifying data for instruction are not of same length.
So there are three types of instructions of Intel 8085:
(1)Single byte instruction
(2)2-byte instruction
(3)3-byte instruction
Single-Byte instruction.
The content information regarding operands in the opcode itself .These are of one byte.
Ex-MOV A,B ; Move the content of register B to A
78H is opcode for MOV A,B. The binary form of opcode 78H is 01111000. The first two
bit i.e. 01 for MOV operation; the next 3 bits i.e. 111 for register A and last 3 bits 000 are for
register B.
Two-Byte instruction.
In case of two byte instruction the 1st byte of the instruction is opcode and 2nd byte is either data
or address.
Both bytes are stored in two consecutive memory locations.
Ex-MVI B,05; Move 05 to register B
06,05; MVI B,05 in the code form
Here in this case the 1st byte i.e. 06 is the opcode for MVI B and 2nd byte i.e. 05 is the data
which is to be moved to register B.
Three-Byte instruction.
In case of three bytes instruction the 1st byte of instruction is opcode and 2nd and 3rd byte of
instruction are either 16-bit data or 16-bit address.
They are stored in three consecutive memory locations.
Ex-LXI H, 2400H ; load H-L pair with 2400H
21,00,24; LXI H, 2400H in code form.
Here 1st byte i.e. 21 is the opcode for instruction LXI H. The 2nd byte i.e. 00 is 8 LSBs of data
which is loaded in to register L. The 3rd byte i.e. 24 is 8 MSBs of data which is loaded in to
register H.

ADDRESSING MODES OF 8085 :

Addressing mode: These are various technique to specify data for instruction
a) Direct addressing mode
b) Register addressing mode
c) Register addressing mode
d) Immediate addressing mode
e) Implicit addressing mode.
a) Direct addressing mode:
In this addressing mode the address of the operand is given in the instruction.
Ex: STA 2000H
IN 02H
b) Register addressing mode:
In this addressing mode the operands are in the general purpose register.
The opcode specify the address of the register and the operation to be
Perform.
Ex: MOV A,B
ADD B
c) Register indirect addressing mode:
i. In this addressing mode the address of the operand is specify by a register
pair.
Ex: LXI H,2000H
MOV A,M
d) Immediate addressing mode:
i. In this adressing mode operand is specify with in the instruction.
ii. Ex: MVI A,05H // Move immediate data 05H to Accumulator.
e) Implicit addressing mode:
I. This instruction operates on the content of the accumulator.
II. They don’t required operand address.
III. EX: CMA //Complement

Timing Diagram

Timing Diagram is a graphical representation. It represents the execution

time taken by each instruction in a graphical format. The execution time is
represented in T-states.

Instruction Cycle:
 The time required to execute an instruction is called instruction cycle.

Machine Cycle:

The time required to access the memory or input/output devices is called

machine cycle.

T-State:

 The machine cycle and instruction cycle takes multiple clock periods.
 A portion of an operation carried out in one system clock period is called as
T-state.


1 Machine cycles of 8085

The 8085 microprocessor has 5 (seven) basic machine cycles. They are

 Opcode fetch cycle (4T)

 Memory read cycle (3 T)
 Memory write cycle (3 T)
 I/O read cycle (3 T)
 I/O write cycle (3 T)
Signal [Link] fetch machine cycle of 8085 :
  Each instruction of the processor has one byte opcode.
 The opcodes are stored in memory. So, the processor executes the opcode
fetch machine cycle to fetch the opcode from memory.
 Hence, every instruction starts with opcode fetch machine cycle.
 The time taken by the processor to execute the opcode fetch cycle is 4T.
 In this time, the first, 3 T-states are used for fetching the opcode from
memory and the remaining T-states are used for internal operations by the
processor.

2. Memory Read Machine Cycle of 8085:

 The memory read machine cycle is executed by the processor to read a data
byte from memory.
 The processor takes 3T states to execute this cycle.

The instructions which have more than one byte word size will use the machine
cycle after the opcode fetch machine cycle.
Cycle 3. Memory Write Machine Cycle of 8085

 The memory write machine cycle is executed by the processor to write a data
byte in a memory location.
 The processor takes, 3T states to execute this machine cycle.

4. I/O Read Cycle of 8085

 The I/O Read cycle is executed by the processor to read a data byte from I/O
port or from the peripheral, which is I/O, mapped in the system.

 The processor takes 3T states to execute this machine cycle.
 The IN instruction uses this machine cycle during the execution.
Cycle 1.4.2 Timing diagram for STA 526AH

 STA means Store Accumulator -The contents of the accumulator is stored in

the specified address (526A).

 The opcode of the STA instruction is said to be 32H. It is fetched from the
memory 41FFH (see fig). - OF machine cycle

 Then the lower order memory address is read (6A). - Memory Read Machine
Cycle
 Read the higher order memory address (52).- Memory Read Machine Cycle

 The combination of both the addresses are considered and the content from
accumulator is written in 526A. - Memory Write Machine Cycle

 Assume the memory address for the instruction and let the content of
accumulator is C7H. So, C7H from accumulator is now stored in 526A.


3 Timing diagram for INR M

 Fetching the Opcode 34H from the memory 4105H. (OF cycle)
 Let the memory address (M) be 4250H. (MR cycle -To read Memory address
and data)
 Let the content of that memory is 12H.
 Increment the memory content from 12H to 13H. (MW machine cycle)
Interrupts

Interrupt is signals send by an external device to the processor, to request the

processor to perform a particular task or work.

 Mainly in the microprocessor based system the interrupts are used for data
transfer between the peripheral and the microprocessor.

 The processor will check the interrupts always at the 2nd T-state of last
machine cycle.

 If there is any interrupt it accept the interrupt and send the INTA (active low)
signal to the peripheral.

 The vectored address of particular interrupt is stored in program counter.
 The processor executes an interrupt service routine (ISR) addressed in
program counter.
 It returned to main program by RET instruction.

Types of Interrupts:

It supports two types of interrupts.

 Hardware
 Software

1 Software interrupts:
 The software interrupts are program instructions. These instructions are
inserted at desired locations in a program. The 8085 has eight software interrupts
from RST 0 to RST 7. The vector address for these interrupts can be calculated as
follows.

 Interrupt number * 8 = vector address

 For RST 5,5 * 8 = 40 = 28H

 Vector address for interrupt RST 5 is 0028H

Table 1.4 Vector addresses of all interrupts.

2 Hardware interrupts:

An external device initiates the hardware interrupts and placing an appropriate

signal at the interrupt pin of the processor. If the interrupt is accepted then the
processor executes an interrupt service routine.
The 8085 has five hardware interrupts

 TRAP
  RST 7.5

 RST 6.5
 RST 5.5
 INTR

TRAP:

 This interrupt is a non-maskable interrupt. It is unaffected by any mask or

interrupt enable.
 TRAP bas the highest priority and vectored interrupt.

 TRAP interrupt is edge and level triggered. This means that the TRAP must
go high and remain high until it is acknowledged.

 In sudden power failure, it executes a ISR and send the data from main
memory to backup memory.

 The signal, which overrides the TRAP, is HOLD signal. (i.e., If the processor
receives HOLD and TRAP at the same time then HOLD is recognized first
and then TRAP is recognized).
 There are two ways to clear TRAP interrupt.

1. By resetting microprocessor (External signal)

2. By giving a high TRAP ACKNOWLEDGE (Internal signal)

RST 7.5:
  The RST 7.5 interrupt is a maskable interrupt.
 It has the second highest priority.

 It is edge sensitive. ie. Input goes to high and no need to maintain high state
until it recognized.

 Maskable interrupt. It is disabled by,

[Link] instruction

[Link] or processor reset. [Link] reorganization of interrupt.

 Enabled by EI instruction.

RST 6.5 and 5.5:

 The RST 6.5 and RST 5.5 both are level triggered. . ie. Input goes to high and
stay high until it recognized.

 Maskable interrupt. It is disabled by,

[Link], SIM instruction [Link] or processor reset.

[Link] reorganization of interrupt.

 Enabled by EI instruction.
 The RST 6.5 has the third priority whereas RST 5.5 has the fourth priority.

INTR:
INTR is a maskable interrupt. It is disabled by,

[Link], SIM instruction

[Link] or processor reset. [Link] reorganization of interrupt

 Enabled by EI instruction.

 Non- vectored interrupt. After receiving INTA (active low) signal, it has to
supply the address of ISR.

 It has lowest priority.

 It is a level sensitive interrupts. ie. Input goes to high and it is necessary to
maintain high state until it recognized.

The following sequence of events occurs when INTR signal goes high.

1. The 8085 checks the status of INTR signal during execution of each instruction.

2. If INTR signal is high, then 8085 complete its current instruction and sends
active low interrupt acknowledge signal, if the interrupt is enabled.

3. In response to the acknowledge signal, external logic places an instruction

OPCODE on the data bus. In the case of multibyte instruction, additional interrupt
acknowledge machine cycles are generated by the 8085 to transfer the additional
bytes into the microprocessor.
4. On receiving the instruction, the 8085 save the address of next instruction on
stack and execute received instruction.

Memory Interfacing

The memory is made up of semiconductor material used to store the

programs and data. Three types of memory is,

 Process memory
 Primary or main memory
 Secondary memory


1 Typical EPROM and Static RAM

  A typical semiconductor memory IC will have n address pins, m data pins (or
output pins).

 Having two power supply pins (one for connecting required supply voltage
(V and the other for connecting ground).

 The control signals needed for static RAM are chip select (chip enable), read
control (output enable) and write control (write enable).

 The control signals needed for read operation in EPROM are chip select (chip
enable) and read control (output enable).
2 Example for Memory Interfacing

Consider a system in which the full memory space 64kb is utilized for
EPROM memory. Interface the EPROM with 8085 processor. The memory
capacity is 64 Kbytes. i.e 2^n = 64 x 1000 bytes where n = address lines. So, n =
16.

In this system the entire 16 address lines of the processor are connected to address
input pins of memory IC in order to address the internal locations of memory. The
chip select (CS) pin of EPROM is permanently tied to logic low (i.e., tied to
ground).
Since the processor is connected to EPROM, the active low RD pin is connected to
active low output enable pin of EPROM. The range of address for EPROM is
0000H to FFFFH.
Main Differences between 8085 and 8086 Microprocessor
8085 Microprocessor 8086 Microprocessor

It is an 8-bit microprocessor. It is a 16-bit microprocessor.

It has an 8-bit wide data bus. It has 16-bit wide data bus.

It can address 28 = 256 I/O ports. It can address 216 = 65,536 I/O ports.

It has 16-bit wide address bus. It has 20-bit wide address bus.

It has an 8-bit ALU (Arithmetic Logic Unit). It has a 16-bit ALU.

It can process an 8-bit of data in one machine It can process 16-bit of data in one machine
cycle. cycle

The maximum accessible memory (RAM) it can The maximum accessible memory of 8086 is
access is 216 = 64KB. 220 = 1MB.

Its memory is segmented into four blocks of

Its memory is not segmented.
64KB.

It is available in 3 versions with a clock

It has an on-chip oscillator of 3 MHz.
frequency of 5 MHz, 8 MHz and 10 MHz.

It is a General Purpose Register based

It is an Accumulator based Microprocessor.
Microprocessor.

It does not have Multiplication and division

Its ALU can perform multiplication and division.
instruction.

It has 5 flags (carry, auxiliary carry, parity, zero It has 9 flags (carry, auxiliary carry, parity, zero,
and sign flag). sign, trap, interrupt, direction and overflow flag).
 It has an instruction queue of 6 bytes that is
It does not have an instruction queue.
stored in FIFO (First In First Out) register.

The 8085 does not support the pipelined It supports pipelined architecture which
architecture. increases the execution speed.

It has two modes of operation; minimum (single

It supports only the single mode of operation.
Processor mode) and maximum mode
i.e. a single processor mode. It does not support
(Multiprocessor mode) which supports external
external processors.
processors.

It is cheaper than the 8086 microprocessor. It is expensive than the 8085 microprocessor.