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Applied Electronics Tutorial Exercises

This document contains detailed corrections for several exercises on electronic circuits using capacitors and transistors. The exercises focus on calculating voltages and currents in capacitor charging and discharging circuits, using transistors for switching and controlling resistive loads. The corrections are presented in a structured and pedagogical manner.

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0% found this document useful (0 votes)
6 views25 pages

Applied Electronics Tutorial Exercises

This document contains detailed corrections for several exercises on electronic circuits using capacitors and transistors. The exercises focus on calculating voltages and currents in capacitor charging and discharging circuits, using transistors for switching and controlling resistive loads. The corrections are presented in a structured and pedagogical manner.

Translated by

ScribdTranslations
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

Democratic and Popular Algerian Republic

Ministry of Higher Education and Scientific Research

Université Frères Mentouri – Constantine 1


Faculty of Science and Technology
Department of Electronics

Tutorials
MASTER 1, Automation and Industrial Computing

Applied Electronics

Created and presented by:

Dr. Salah ABADLI

Academic Year: 2019 / 2020 (Semester 2)


Academic Year: 2019/2020 TD, Applied Electronics. Presented by Dr. S. ABADLI

Frères Mentouri University - CONSTANTINE 1


Faculty ST Department of Electronics

TD: the capacitor and the transistor in switching


1
Exercise 1 R

The capacitor being charged to 5 V, we then close K. 56 k


After how much time the voltage UC= 2 V. K C
UC
What is the value of I?Cat the moment. 470 nF

Exercise 2
Consider the following circuit (at t = 0, UC = 5 V):
R

47 k

E C
UC
100 nF

Calculate the values of Uc at the times: t1, t2, t3, t4, t5. Complete the Uc timeline.

Exercise 3
We want to reset a circuit when powering on.
Vdd
For this, we use the setup below.
The integrated circuit is in CMOS technology. R
10 k
The current entering the RESET input is zero.
RESET Integrated circuit
The RESET input is active at a low logic level. CMOS

We give: Logical level '1' for Vin > 70% Vdd C


100 nF
Logical level '0' for Vin < 70% Vdd.
From the moment it is powered on, after how long can we be sure that the input
RESET is no longer active.

Exercise 4
An NPN transistor is powered with a voltage of 9 V.
We give: RV50 , VCE_sat= 0.2 V, VBE0.7 V
200 < < 300 and the control voltage VOH= 5 V.
We take a safety factor of 2, for
to be sure that the transistor will be well saturated.

Calculate the value of the resistance Rb?


Attention: the voltage VCE_satis close to 0 but not zero
(VCE_sat 0.2 V.

Master 1 Automatic and Industrial Computing; Semester 2 1


Academic Year: 2019/2020 TD, Applied Electronics. Presented by Dr. S. ABADLI

Exercise 5
Consider the assembly in the following figure:

We give: Ve = 0 or 10 V, Irel= 55 mA, Vrelay= VCC24 V


VCE_sat0.4 V, VBE= 0.7 V, = 200, supersaturation with k = 2
Calculate the components of the assembly (Rb, RrelayIB,IB_sat).

Exercise 6
5V
The characteristics of the bipolar transistor used are:
RC
VBE_sat= 0.7 V ; VCE_sat= 0.2 V ; 70 < < 300
We supposeC 0 when the transistor is blocked. The LED is present.
a voltage VFof the order of 1.8 V.
IC
The control voltage 'e' is a square wave 0V / 5V. RB
IB
Deduce the value that R must [Link] that the current in
the LED should be on the order of 10 mA when the transistor is saturated.
e
Determine the limit value of RBwhich allows to saturate the transistor,
certainly, with a supersaturation coefficient greater than
or equal to 2.

Exercise 7
In order to control a resistive load of 10 in a all-or-nothing manner under 300 V 300 V
We want to implement the MOS transistor shown here.
When the MOS transistor operates in the ohmic region (VDSRDSxID), R = 10
it behaves like a resistor RDS 0,1 .
ID
Calculate in this case, the values of IDand VDS. D

G VDS

VGS S

Master 1 Automation and Industrial Computing; Semester 2 2


Academic Year: 2019/2020 TD, Applied Electronics. Presented by Dr. S. ABADLI

Exercise 1: Corrected
dU C i
In this case:0 U C U Rand so:0 U C RC
dt

t

t
UC C
The solution to this equation is: U C Itsi RC 5e RC
UR
t
 R
We are then looking for:2 5and RC

Exercise 2: Correction
t

In general cases,U C A B e RC

t

to you0= 0: we have the tensionUC(t0)= E = 5 V and thereforeU C 5e RC
(equation of discharge)

-2.103
t1
 3 9

of t0to you1= 2 ms: we have the voltage U C(t1) 5e RC 5e47.10 .100.10 3,267 V

of t1to t24 ms: we have the voltage (UC(0) = 3,267 V and UC( 10
charge

of t2to you3= 6 ms: we have the voltage (UC(0) = 5.60 V and UC( ) = 0) (discharge)

Master 1 Automatic and Industrial Computing; Semester 2 3


Academic Year: 2019/2020 TD, Applied Electronics. Presented by Dr. S. ABADLI

of t3at t4= 8 ms: we have the voltage (UC(0) = 3,659 V and UC( ( = 10) ( a load)

of t4at t5= 10 ms: we have the voltage (UC(0) = 5,856 V and UC( = 0) ( a charge)

Master 1 Automatic and Industrial Computer Science; Semester 2 4


Academic Year: 2019/2020 TD, Applied Electronics. Presented by Dr. S. ABADLI

Exercise 3: Correction

Master 1 Automation and Industrial Computing; Semester 2 5


Academic Year: 2019/2020 TD, Applied Electronics. Presented by Dr. S. ABADLI

Exercise 4: Correction

Exercice 5 : Corrigé
1. When Ve is at 0 V, IB= 0 A, the transistor will be blocked, the relay (a coil) will not be
active.
2. When Ve reaches 10V, the transistor must conduct for the relay to be active.
We start from the exit: ICIrelay= 55 mA
Calculation of IBlike IC= / βI = 55.10-3150 = 3.67 x 10-4A
β Bso IBIC×
A supersaturation coefficient of 2 is applied: IBsat2 × 3.67 × 10-4=7,33.10-4A
Input loop equation: VBE+VRb-Ve=0 that is to say VBE+(Rb × IBsat) - Ve = 0

Master 1 Automation and Industrial Computing; Semester 2 6


Academic Year: 2019/2020 TD, Applied Electronics. Presented by Dr. S. ABADLI

Exercise 6: Corrected

When the transistor is saturated: 5V , VBE 0.7V , VCE 0etV F 1.8V, so


saturday sat
VRc 5 1.8 0 3.2Vwith I 10mA c .
3.2
We deduce that R C 320
0.01
IC
IB
For the transistor to be saturated, it is necessary .

For the relationship to always be verified, regardless of 70 300, we must consider the most
unfavorable
IC
It is necessary to take B .
min

We propose to take a supersaturation coefficient of 2.


IC 0.01
I B 2. I B2. I B2,861.0  4 A 286µA
min 70

4.3 4.3
Ohm's Law: I B 286μA R B R B 15k
RB 286.10  6

Exercice 7 : Corrigé

300 V
ID VGS = constant
R = 10

ID
D 29.7A
RDS
0.1 VDS
G
0 vDS
VGS S

Zone Pinch zone:


300 300 ohmic I D constant à
ID 29.7A VDS R.I.
R R DS 10 0,1 DS D Given
GS

VDS Rhode
DS DIsland 2.97V
.

Master 1 Automation and Industrial Computing; Semester 2 7


Academic Year: 2019/2020 TD, Applied Electronics. Presented by Dr. S. ABADLI

Brothers Mentouri University - CONSTANTINE 1


Faculty ST Department of Electronics

TD: The operational amplifier (Op-Amp) and circuits based on the Op-Amp
2
Exercise 1
+12 V
We consider the following amplifier circuit:
1) Without doing any calculations, is this amplifier inverting? +
or not inverter and why? 
-12 V
2) V is a sinusoidal signal with an amplitude of 0.8 V, we want to
And Vs
for Vs a signal with an amplitude of 5 V.
R2 i
Calculate the voltage gain Av. R1

3) Calculate the voltage gain Av in dB


4) Calculate the resistances R1 and R2, so that the current
effectiveiit is 0.1 mA.

Exercise 2
In the following, Ve is a sinusoidal signal with an amplitude of 0.5 V and Vs is a signal with an amplitude of 6 V.

1) Calculate the voltage gain Av



2) Calculate the voltage gain in dB 
+
3) Calculate the value of R2 for R1 = 2 K +
4) The resistance R3 serves to compensate for the deviations between the
And Vs
input currents in the AOP. Calculate R3.

Exercise 3 R3

1) In the assembly opposite, we give: R1


V1 
R1 = R2 = 1 K , R3 = 12 k R4 = 15 K
+
R2 Vs
V1 = 3 V et V2 = 1,5 V. Trouvez la sortie Vs ? V2
2) In the following assembly, we give:
R4
R1 = 10 K , R2 = 20 K , R = 20 k
Calculate the output voltage Vs for: V1 = 5 V and V2 = 1 V.
R2 R
V2

V1 
R1
+
Vs R2

i
R1 +15 V
Exercise 4 ie
Determine the gain VSAnd see the AOP below: n +
And 
-15 V Vs

Master 1 Automation and Industrial Computing; Semester 2 1


Academic Year: 2019/2020 TD, Applied Electronics. Presented by Dr. S. ABADLI

Exercise 5
Consider the non-inverting voltage amplifier shown in the following figure:
1) Find the gain of the amplifier as a function of the resistances R.1, R2, R3and R4.
2) Deduce the gain of the circuit for R1= .
+
Make the digital application for:
R2= 10 k , R3100 k , R4= 10 k 
3) Deduce the gain of the circuit for R2= 0.
R3
Make the digital application for: R2
And
Vs
R1= 10 k , R3= 100 k , R4= 10 k

R1 R4

Exercise 6

1) Briefly explain the operating principle of the circuit below:


What could be the function of this circuit?
What is the role of the LDR component (light-dependent resistor)?

4) What is the role of transistor T?1?


5) What is the role of the relay RL1/12V?
6) Suggest a reference for the circuit IC1?

D
D11

Relay

Photoresistance

Master 1 Automation and Industrial Computing; Semester 2 2


Academic Year: 2019/2020 TD, Applied Electronics. Presented by Dr. S. ABADLI

Exercise 1: Correction

Exercise 2: Correction

Exercise 3: Correction

Master 1 Automation and Industrial Computing; Semester 2 3


Academic Year: 2019/2020 TD, Applied Electronics. Presented by Dr. S. ABADLI

Exercise 4: Correction

Exercise 5: Corrected
To calculate the gain of the operational amplifier, we will refer to the following figure:

 I1

R3
And R2 I3
x y Vs

R1 R4

I3 I2

Master 1 Automation and Industrial Computer Science; Semester 2 4


Academic Year: 2019/2020 TD, Applied Electronics. Presented by Dr. S. ABADLI

Exercise 6: Correction

1-Operating principle of the given circuit:


The most remarkable component in the circuit is the LDR photoresistor. The value of this
Resistance depends on the brightness; when it is illuminated. The voltage available at (+) of the
IC1 (AOP) will therefore vary according to the brightness of the LDR. The voltage at the input () you
IC1 is adjustable using P1, which will allow for the modification of the circuit's sensitivity.

Master 1 Automation and Industrial Computing; Semester 2 5


Academic Year: 2019/2020 TD, Applied Electronics. Presented by Dr. S. ABADLI

Since the output of the op-amp circuit cannot provide much current to drive a stage
of power, the circuit is followed by a transistor mounted in emitter follower configuration to control the relay

(allowing the switching of the high power circuit).

The function of this circuit could be: control circuit for a power stage according to
of light. For example: the function of turning on and off the streetlights
as soon as the brightness falls below a certain value.

3-The role of the transistor T1Increased the relay control current.


The role of C1to avoid problems of poor contact.

4-Proposal of a reference for the circuit IC1: µA741, TL081,....

Master 1 Automation and Industrial Computing; Semester 2 6


Academic Year: 2019/2020 TD, Applied Electronics. Presented by Dr. S. ABADLI

Frères Mentouri University - CONSTANTINE 1


Faculty ST Department of Electronics

TD: The generation of signals


3
Exercise 1 R

We consider the following astable circuit:


+ VDD
The profit from the AOP is 100,000 and we feed it with VN

VDD+15 V andVDD= 1
 5 V. The tensions VP, VN
C
and VSare referenced in relation to the mass. +
-VDD
R = 10 k and C = 1µF. You VP Vs
1) we set ourselves at t=0 and assume that C is R
R
discharged and that VS= +VDD. Give the values of

VPand VN.

2) From t=0+, C starts to charge. Determine the expression for [Link] on the
time. Determine the expression of time t1, from which the voltage VSbecomes equal toVDD.
3) Starting from t=t1, the capacity starts to discharge and VS= VDDWe will take1like

origin of time, give the value of VPand the expression and the value of VNdepending on the time.
Determine the expression and the time t2from which the voltage VSbecomes equal to VDD.

Exercise 2
We consider the following astable circuit:
1) Determine the oscillation frequency of the signal
output for: Ra = Rb = 100 k and C = 10µF.
Determine the oscillation frequency of the signal
output for: Ra = 4.7 k Rb = 100 k
and C = 10µF.

Exercise 3
Consider the assembly in the following figure.

Determine the oscillation frequency of the signal from


Exit?
Determine the duty cycle of the output signal?

Master 1 Automation and Industrial Computing; Semester 2 1


Academic Year: 2019/2020 TD, Applied Electronics. Presented by Dr. S. ABADLI

Exercise 4
1) Briefly explain the operating principle of the circuit below:
2) What could be the function of this circuit?
3) Specify the role of the various levels of the global circuit?
4) What is the role of transistor T? Suggest a reference for this transistor?
5) Represent the output signal of the NE555? Calculate the duration of the signal?

Exercise 5
Here is the temperature control system in a car as follows:

What type of oscillator is created by the logic gates A and B in the circuit above?
2) Calculate the period T, the frequency f, and the duty cycle of the signal generated by this oscillator?
3) Represent the output signal of this oscillator (signal at point A)?
4) Represent the signal at point B?
5) What is the role of the oscillator created by logic gates C and D in the above circuit?

Master 1 Automation and Industrial Computing; Semester 2 2


Academic Year: 2019/2020 TD, Applied Electronics. Presented by Dr. S. ABADLI

Exercise 1: Correction
VDD= +15 V andVDD= 15 V. The voltages VP, VNand VSare referenced in relation to mass.
R = 10 k and C = 1µF.
1) We start at t=0 and assume that C is discharged and that VS= VDDThe values of VPand VN:

R dVc d VN
VP VR VS I C C
R R dt dt
d VN d VN
VP VS R I R C VS VN R C
dt dt
The voltage VPis therefore produced via the divider bridge, while the voltage VNrespond to a
first order differential equation (that of a 1 R C circuit)erorder).
At t = 0: the capacitor is completely discharged Vc = 0 and Vs = +VDD:
Vc > VR Vs =  Vsat & Vc < VR Vs = + Vsat
Vc = 0 and the current I = 0 VN= 0
R 1
VP VS VDD 7.5 V
R R 2

2) Starting at t=0+, C begins to charge. The expression for VNdepending on the time:

At t = 0+, the capacitor begins to charge. VN(t) = Vc(t) = A + B et / RC


to you 0 VC(0) 0 A B 0

to you VC( )  VDD A VDDlet B  VDD


t

VN(t) VDD (1 e RC
)
The expression of time t1, from which the voltage VSbecomes equal toVDD(Vs = -VDD):

R 1
VN(t1) Vc(t1) VH VDD VDD see course, page 20.
R R 2
t1
 1
VN(t1) VDD(1 e ) RC VDD t 1 R C ln(2) 10 103 1 10 6ln(2) 6.93ms
2

3) From t=t1, the capacity starts to discharge and VS= VDDWe will take1like
origin of time. The value of VPand the expression and the value of VNdepending on the time are:
Vs = +VDD R VDD/ (R + R) = 7.5 V.
Discharge of C VN(t) = Vc(t) = A + B et / RC
1 1
to you 0 VC(0) VDD A B VDD
2 2
3
to you VC( )  VDD A  VDDlet B VDD
2
t
3 
VN(t) VDDe RC  VDD
2

Master 1 in Automation and Industrial Computing; Semester 2 3


Academic Year: 2019/2020 TD, Applied Electronics. Presented by Dr. S. ABADLI

The expression and the time t2, from which the voltage VSbecomes equal to +VDDare:
R 1
VN(t2) Vc(t2) VB  VDD  VDD see course, page 20.
R R 2
Play2 R C ln(3) 10 103 1 10 6 ln(3) 11µs

The frequency of the oscillator is therefore: f = 1/T = 1 / 2.t2= 1/(2 11 10-345.45 Hz1correspond
under the transitional regime).

Exercise 2: Correction
1) The oscillation frequency of the output signal for: Ra = Rb = 100 k and C = 10µF is :
T tc td (Ra R b) C ln(2) R bC ln(2) (Ra 2Ra) C ln(2)

T ( 3R a) C ln(2) 3 100 103 10 10-6ln(2) 2 sthus: F = 1 / T = 0.5 Hz

2) The oscillation frequency of the output signal for: Ra = 4.7 k Rb = 100 k and C = 10µF is :
T tc  td (Ra R b) C ln(2) R bC ln(2) (Ra 2Rb) C ln(2)

T ( 4,7 103 2 100 103) 10 10-6ln(2) 1.42 sSo: F = 1 / T = 0.7 Hz

Master 1 Automation and Industrial Computing; Semester 2 4


Academic Year: 2019/2020 TD, Applied Electronics. Presented by Dr. S. ABADLI

Exercise 3 : Correction
1) The oscillation frequency of the output signal is:
TH= 0.7 × (R1+ R2) × C10.7 × (47000 Ω + 47000 Ω) × 0.0001 F = 6.5 s
TB= 0.7 × R2 × C1= 0,7 × 47000 Ω × 0.0001 F = 3,3 s
T = TH+ TB= 6.5 + 3.3 = 9.8 s so: F = 1.1 Hz.
R 1 R 2
The cyclical report is: = THT = 6.5 / 9.8 = 0.66 = 66% or
R 1 2R2
Exercise 4: corrected
1) Briefly, the principle of operation of the circuit below is as follows:
We notice two main stages, connected through transistors. The first stage is based on
d’un AOP (CI 741), utilisé comme comparateur différentiel (1erafunction). The output of the comparator
US= U6depends on the input values U2and U3from AOP (U2 > U3 causes a shift).

U2 U2
U3

U3

US

The tension U2and U3will therefore follow the variations of light in the location where the circuit is used. We
note that the output only switches when U2 U3becomes negative. The detection will be effective.
as soon as any shape passes in front of the LDR1 photoresistor.
The 2emefloor, based on the NE555, used as a timer or monostable (2thfunction). The
the delay duration is: T = 1.1 R C.

The potentiometers allow for the adjustment of the detection level and the timing duration.
Transistors enable signal adaptation and the operation of the relay responsible for activation.
engine market.

What could be the function of this circuit?


This circuit can be used as a passing object detector (counting industrial products)
for example) or the command of an automatic staircase.

Master 1 Automation and Industrial Computing; Semester 2 5


Academic Year: 2019/2020 TD, Applied Electronics. Presented by Dr. S. ABADLI

3) Specification of the role of the various stages of the overall circuit:

There are a total of 4 floors in the overall circuit:


Detection stage (AOP, LDR, RA),
Output signal adaptation stage (1ertransistor and R1),
Monostable timing stage (NE555, R, C)1, C2),
Control and galvanic isolation floor (2thtransistor, R2, D, Rel).

4) Role of the transistor T and a proposal for a reference for this transistor?
Transistor T has a dual role: switching (electrical switch) and signal adaptation.
of order.

5) Representation of the output signal of the NE555? Calculate the duration of the signal?

The output signal of the NE555 (see figure above). The duration of the signal is: T = 1.1 R × C.

Exercise 5: corrected
Temperature regulation assembly:

What type of oscillator is created by the logical gates A and B in the circuit above?
Le type d’oscillateur réalisé par les portes logiques A et B est : Circuit Oscillateur Astable.
2) Calculate the period T, the frequency f, and the duty cycle of the signal generated by this oscillator?
The astable formed by NOR logic gates A and B delivers a square wave signal whose period ...
is essentially determined by the values of R2and C3T = t1+ t2= 2 ln(3) R2 C3=2,2 R2C3
T = 12 ms which corresponds to a frequency of around 83 Hz.
3) Represent the output signal of this oscillator (signal at point A)?

Master 1 Automation and Industrial Computing; Semester 2 6


Academic Year: 2019/2020 TD, Applied Electronics. Presented by Dr. S. ABADLI

4) Represent the signal at point B?


The capacity C4, the resistance R3and the diode D2form a derivative that takes fronts into account
amounts of slots issued by the astable. During transitions from the low state to the high state, the
capacity C4charges rapidly through R3This results in positive impulses. The diode D2
allows for the rapid discharge of C4.
5) What is the role of the oscillator made by the logic gates C and D in the circuit above?
The NOR logic gates C and D are set up in monostable mode.

Master 1 Automation and Industrial Computing; Semester 2 7


Academic Year: 2019/2020 TD, Applied Electronics. Presented by Dr. S. ABADLI

University of Frères Mentouri - CONSTANTINE 1


Faculty ST Department of Electronics

TD: The ADC and DAC converters


4
Exercise 1
We consider the following CNA (R-2R) setup:
A B C D
Express VA, VB, VC, VDdepending on ERef.
2) Deduce the value of the currents that are flowing
in the resistors 2R.
3)On notant a0, a1, a2, a3the related coefficients
to the switches, express VSdepending on
from: to0, a1, a2, a3R, ERef.
4) Let K be the decimal number corresponding to
binary name a0, a1, a2, a3What is the
shape of the response VSdepending on K?

Exercise 2
We consider a successive approximation 4-bit ADC configuration as follows:

Supposing VRef= 10 V and VE6.9 V.


What is the numerical result N of
the conversion (A3A2A1A0)?

Exercise 3
1) Let there be a 5-bit DAC, whose output is a current. When the natural binary digital input
At 10100, the output current is 10 mA. Calculate the output intensity for an input in
natural binary of 11101.

2) What is the maximum output voltage of a DAC if it provides 1 V when the input is
2

3) Let it be a 5-bit DAC, whose output voltage Vs = 0.2 V when the digital input is 00001.
Trouver la valeur de sortie si l’entrée vaut 11111, et si l’entrée vaut 10101.

4) Let it be an 8-bit DAC, with a full-scale output of 2 mA, and a precision of 0.5 %. Source
Is the possible output range corresponding to the input 10000000?

Master 1, Semester 2 1
Academic Year: 2019/2020 TD, Applied Electronics. Presented by Dr. S. ABADLI

Exercise 1: Correction
To simplify the reasoning, we will therefore study the following network:

R/2R Network.
The currents I3and IDare equal (current divider with two equal resistors).
So we have:

The branches where I circulate3and IDare actually two equal resistors (2R) in parallel, that is
the equivalent of a half resistance, therefore R. This equivalent resistance is in series with the one
where does it circulateCThe current ICcirculates in a resistance equivalent to 2R. The circuit becomes:

Equivalent reduced network.


We strictly fall back on the same type of network as before. We can easily deduce:

The final step of the reasoning gives the following network:

Final network.
We deduce the value of the currents:

The R/2R network provides us with currents in geometric progression with a ratio of 2: we end up
on the same thing as the weighted resistance converter.
The output voltage Vsthe converter will be equal to:

The result is therefore of the same kind as for the CNA with weighted resistances. We note a factor
1/4, but we can notice that it is enough to put a resistance equal to 4R in feedback.
to land back on the same result.

Master 1, Semester 2 2
Academic Year: 2019/2020 TD, Applied Electronics. Presented by Dr. S. ABADLI

Exercise 2: Correction

Exercise 3: Correction
10 mA = Q 20 so: Q = 0.5 mA
Io = 0.5 11101 = 0.5 29 = 14.5 mA
2)1 = Q . 00110010 = Q . 50
Q = 20 mV
Vomax = 20 mV. 11111111 = 20 mV. 255 = 5.1 V
3) Vs1 = 1.3,2 + 1.1,6 + 1.0.8 + 1.0,4 + 1.0,2 = 6,2 V
Vs2 = 1.3,2 + 0.1,6 + 1.0.8 + 0.0,4 + 1.0,2 = 4,2 V
4)

Master 1, Semester 2 3
Academic Year: 2019/2020 TD, Applied Electronics. Presented by Dr. S. ABADLI

Frères Mentouri University - CONSTANTINE 1


Faculty ST Department of Electronics

TD: Active Filters


5
Exercise 1
An active filter is created using the following circuit:
1) Explain the role of the operational amplifier. Give the expression of the transfer function Ve.1/ Ve.
2) Provide a simple relationship between Ve1and Vs1Give the expression of the function Vs / Vs1.
3) Then give the transfer function H = Vs / Ve. Write H in the form: H = 1 / [1 + j (w / w0) ]2.
Give the expression for w0the value of the T module, the value of the module when w , the
value of the module when w 0 and deduce the type of the filter.
4) Recall the definition of the cutoff frequency wCà 3 dB. Show that wCis wC 0.64 w0.
5) For a cutoff frequency fC= 10 Hz, calculate the value of w. Deduce the value of R.
when C = 1 pF. R
+ R

C
And Ve1 Vs1 C Vs

Exercise 2
An active filter is created using the following circuit:

R C1
R R

A B
+
And C2
Vs

1) By determining the output voltage of the low and high frequency filter, determine the nature
Why filters?
2) Using Millman's theorem at A and B, establish the expression for the transfer function H.
H0
of the assembly, which we will put in the form: H(jw)
w w 2
1 2 pm (j )
wC wC
3) Determine H0 as well as the expressions of w0and it in function of R, C1and C2.
w0 1
4) We want to obtain a frequency f0 and a damping factor m .
2π 2
We choose R = 470 Calculate the values of the capacities C1 and C2.

Master 1, Semester 2 1

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