MOKSHIT HARISH
1st SEM , CSE-3
Circuit designing
using circuit verse
ABOUT CIRCUITVERSE
Objective
CircuitVerse is an online digital logic simulator
that allows students to create, visualize, and
test digital circuits using a drag-and-drop
interface. It simplifies circuit learning by
providing real-time simulation and sharing
options.
Goals
To explore how basic and complex digital
circuits are created
using logic gates.
To provide hands-on experience with
combinational and
sequential logic design.
To make comfortable with using open-source
circuit
simulation tools for practical understanding
Project Outline
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Dept of CSE , DSATM
Circuit designing
using circuit verse
Open the CircuitVerse platform.
Create a new project and name it (e.g., Logic Gate
Implementation).
Drag logic components (AND, OR, NOT, NAND,
NOR, XOR,
XNOR) from the left panel to the canvas.
Connect inputs and outputs using wires.
Simulate and verify the circuit by toggling the input
switches.
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Dept of CSE , DSATM
Circuit designing
using circuit verse
DE - MORGAN’S THEOREM
Thrjtr AA A B (A.B)˜ or A˜+
B˜
0 0 1
0 1 1
1 0 1
1 1 0
Thrjtr AA A B (A.B)˜ or A˜+
B˜
0 0 1
0 1 0
1 0 0
1 1 0
Aim: To verify De Morgan’s Theorem using basic logic gates.
Theory: According to De Morgan’s Theorem:
1. (A · B)’ = A’ + B’
2. (A + B)’ = A’ · B’
The circuits prove that both expressions produce the same output truth table values.
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Dept of CSE , DSATM
Circuit designing
using circuit verse
1) F(A,B,C) = (A+B′)(A′+C)(B+C′)
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Dept of CSE , DSATM
Circuit designing
using circuit verse
This Boolean function combines AND and OR operations involving all three
inputs. It can be implemented using three OR gates feeding into a 3-input AND
gate. The output is high only for specific input combinations where these logical
conditions are simultaneously satisfied.
Thrjtr AA A B CCCC C F(A,B,C
)
0 0 0 1
0 0 1 0
0 1 0 0
0 1 1 0
1 0 0 0
1 0 1 0
1 1 0 0
1 1 1 1
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Dept of CSE , DSATM
Circuit designing
using circuit verse
2) F(A,B,C) = ((A⊕B)·(C + A′))+(B·C
′)
Thrjtr AA A B CCCC C F(A,B,C)
0 0 0 0
0 0 1 1
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 0
1 1 0 0
1 1 1 1
This function mixes XOR, AND, and OR gates. It produces high
output when either the XOR of A and B is valid with the condition
(C + A′), or when B is 1 and C is 0. It shows conditional switching
behavior often seen in control circuits.
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Dept of CSE , DSATM
Circuit designing
using circuit verse
3) F(A,B,C)=(A + BC’)⋅((A′+B)⊕C)+(A NAND
B)
Thrjtr AA A B CCCC C F(A,B,C)
0 0 0 1
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 0
This expression uses XOR and NAND along with basic gates, creating a hybrid
logic design. It outputs 1 for most input combinations except a few, making it a
highly active logic function useful for error detection or parity-like operations.
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Dept of CSE , DSATM
Circuit designing
using circuit verse
4) F(A,B,C) = (A NOR (B⊕C))+(A·B·C′)·(A⊕C)
Thrjtr AA A B CCCC C F(A,B,C)
0 0 0 0
0 0 1 1
0 1 0 1
0 1 1 0
1 0 0 0
1 0 1 0
1 1 0 1
1 1 1 1
This function involves NOR and XOR logic, combining complementary and
conditional behaviors. The output becomes 1 when A is low while (B⊕C) is
low, or when specific combinations of A, B, and C satisfy the second term. It
represents a selective control function.
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Dept of CSE , DSATM
Circuit designing
using circuit verse
5) F(A,B,C)=(A⊕B⊕C)(A′+B′+C)+(A NAND C)(B
NOR C)
Thrjtr AA A B CCCC C F(A,B,C)
0 0 0 1
0 0 1 0
0 1 0 1
0 1 1 0
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 0
This is a complex Boolean function combining parity (XOR), complement
logic, and mixed NAND–NOR operations. It produces high output under
multiple balanced input conditions and can be used for multi-condition
decision or error detection circuits.
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Dept of CSE , DSATM