Scribd
Upload
6 views2 pages

Digital Circuits Question Bank Guide

The document is a question bank for a Digital Circuits course, covering topics such as Boolean expression complements, simplification of Boolean functions, implementation of functions using different gate configurations, K-map simplifications, and combinational circuit design. It includes various tasks such as obtaining complements, simplifying expressions, and designing adders and converters. Additionally, it addresses concepts like universal gates, K-map advantages, and the analysis and design procedures for combinational circuits.

Uploaded by

srinivas.kollimarla
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
6 views2 pages

Digital Circuits Question Bank Guide

The document is a question bank for a Digital Circuits course, covering topics such as Boolean expression complements, simplification of Boolean functions, implementation of functions using different gate configurations, K-map simplifications, and combinational circuit design. It includes various tasks such as obtaining complements, simplifying expressions, and designing adders and converters. Additionally, it addresses concepts like universal gates, K-map advantages, and the analysis and design procedures for combinational circuits.

Uploaded by

srinivas.kollimarla
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd

Digital Circuits - Question Bank

Unit – 1
1) Obtain the complement of the following Boolean expressions:

(i) B’C’D + (B + C + D)’ + B’C’D’E


(ii) AB + (AC)’+ (AB + C)
(iii) A’B’C + A’BC’ + AB’C + ABC’
(iv) AB + (AC)’ + AB’C

2) Simplify the following Boolean functions to minimum number of literals:

(i) (AC)’ + ABC + AC’


(ii) X’Y’ + XYZ + X’Y
(iii) (A’ + C)(A‘+ C)(A + B + C’D)
(iv) XY + XY’
(v) (X + Y)(X + Y’)
(vi) X + Y(Z + (X + Z)’)

3) Implement the function F with two-level forms:

(i) NAND–AND (ii) AND–NOR (iii) NOR–OR (iv) OR–NAND

F(A, B, C, D) = Σ(0, 1, 2, 4, 8, 9, 12)

4) (a) What are universal gates? Why are they so called?

(b) State Duality Theorem.

(c) Realize XOR gate using minimum number of NAND gates.

(d) State and prove DeMorgan’s theorem.

5) (a) What do you mean by K-map?

(b) Name the advantages and disadvantages of K-map.

(c) What are the advantages of the tabulation method over K-map?

(d) Define: Implicant, Prime Implicant, Essential Prime Implicant

6) Simplify the following logical expressions using K-map:

(a) A’BC’D’ + A’BC’D + ABC’D’ + ABC’D + AB’C’D+A’B’CD’


(b) (A + B + C’) (A + B’ + C’) (A’ + B’ + C’) (A’ + B + C) (A + B + C)
(c) F(A, B, C, D) = Σm(1,3,7,11,15) + Σd(0,2,4)
(d) F(A,B,C,D) = Σm(5,6,7,12,13) + Σd(4,9,14,15)

7) Minimize the expression using QuinMacluskey Method:

Y = A’BC’D’ + A’BC’D + ABC’D + ABC’D’ + AB’C’D + A’B’CD’

F(A,B,C,D) = Σm(1,2,3,5,9,12,14,15) + Σd(4,8,11)


Unit – 2

1) Explain the analysis and design procedure of combinational circuits.

2) Define Half-Adder and Full-Adder.

3) Design Full Adder using NAND and NOR gates.

4) Define Half-Subtractor and Full-Subtractor.

5) Draw and explain the block diagram of an n-bit parallel adder.

6) Design Adder-Subtractor circuit.

7) Design 4-bit BCD to 7-segment display.

8) Design Binary to BCD code converters.

9) Implement the following Boolean function with Half-Adder: F = ABC’ + (A’ + B’)C

You might also like