Multicomputer: A multicomputer system is a computer system with multiple processors that are connected together to

solve a problem. Each processor has its own memory and it is accessible by that particular processor and those
processors can communicate with each other via an interconnection [Link] the multicomputer is capable of
messages passing between the processors, it is possible to divide the task between the processors to complete the task.
Hence, a multicomputer can be used for distributed computing. It is cost effective and easier to build a multicomputer
than a multiprocessor. Difference between multiprocessor and Multicomputer:
1. Multiprocessor is a system with two or more central processing units (CPUs) that is capable of performing

multiple tasks where as a multicomputer is a system with multiple processors that are attached via an
interconnection network to perform a computation task.
2. A multiprocessor system is a single computer that operates with multiple CPUs where as a multicomputer system
is a cluster of computers that operate as a singular computer.
3. Construction of multicomputer is easier and cost effective than a multiprocessor.
4. In multiprocessor system, program tends to be easier where as in multicomputer system, program tends to be
more difficult.
5. Multiprocessor supports parallel computing, Multicomputer supports distributed computing.
Advantages:
Improved performance: Multicomputer systems can execute tasks faster than single-computer systems, as the workload
can be distributed across multiple computers.
Better scalability: Multicomputer systems can be scaled more easily than single-computer systems, as additional
computers can be added to the system to handle increased workloads.
Increased reliability: Multicomputer systems can continue to operate even if one computer fails, as the remaining
computers can continue to execute tasks.
Reduced cost: Multicomputer systems can be more cost-effective than building a single large computer system to handle
the same workload.
Enhanced parallelism: Multicomputer systems allow for greater parallelism, as different computers can execute
different tasks simultaneously.
Disadvantages:
Increased complexity: Multicomputer systems are more complex than single-computer systems, and they require
additional hardware, software, and management resources.
Higher power consumption: Multicomputer systems require more power to operate than single-computer systems,
which can increase the cost of operating and maintaining the system.
Difficult programming: Developing software that can effectively utilize multiple computers can be challenging, and it
requires specialized programming skills.
Synchronization issues: Multicomputer systems require synchronization between computers to ensure that tasks are
executed correctly and efficiently, which can add complexity and overhead to the system.
Network latency: Multicomputer systems rely on a network to communicate between computers, and network latency
can impact system performance.
Difference Between Multiprocessor and Multicomputer
There are multiple different types of computers used for different purposes. Multiprocessors and multicomputers are
types of architectures used in the computer. Which multiprocessor is one where multiple processors are used that share
the same memory for operating and are connected to function together. While in multicomputer multiple computers that
have different processor are connected and each has their own different memory. They share the data to work together. In
this article, we will majorly discuss the difference between these two computer architectures and their working.
What is Multiprocessor Architecture?
To understand differences we need to have an understanding of what is a multiprocessor and multicomputer.
As the name suggests "Multiprocessor" in this architecture we have multiple processors that work together and are
connected to each other. They have a shared memory. This means they will make changes in the same memory and every
processor can access that memory. All of the processors are connected to memory by topology. Like the simplest
implementation for understanding Multiprocessor below.

Simple Multiprocessor
What is Multicomputer Architecture?
In multicomputer we link multiple processor to work together like we done in multiprocessor. But now each node have
its own memory connected to it. When multiple processors with there own memory are connected by a network it is
known as multicomputer. In this we do not require shared memory. With the help of connection they can communicate
with each other.
More info about multiprocessor and multicomputer

Muticomputer
Difference Between Multicomputer and Multiprocessor

Features Multiprocessor Multicomputer

In this multiple computers having

Architecture is based upon multiple processor and there own memory
System Architecture processor having shared memory are connected by a interconnected
are connected for working together to share data and have
communication.

Memory Access All the systems share single All have there own set of memory
common memory and they all for storing data and then the data is
Features Multiprocessor Multicomputer

performs operations in it. shared.

It uses implicit communication

It uses explicit message sharing
model because all the data
Communication Model model, which involves sending and
structures and variables are in
receiving messages.
common memory.

It is comparitively more expensive

It is easy and lesser expensive since
Construction and complex as they have multiple
single memory is used.
memories and all share data.

Its a dynamic network where data is

Network type read and write by all systems during Its a static network.
runtime

Speed its execution speed is fast It is comparitively slower

It have limited scalibility since It have higher scalibility and adding

Scalibility single memory is used. A large more nodes of processors is
network will create problems possible.

Faults can be handled individually

If there is fault on memory it will
Fault Tolerance by each node, it won't spoil the
affect all processors.
whole network.

Cluster computing, distributed

Symmetric Multiprocessing (SMP)
computing, grid computing, cloud
Examples systems, where the whole system
computing, parallel servers are
processes common tasks
some examples for Multicomputer

Easier programming as each

Programming It requires distributed computing
utilizing parallel programming.

How are multiprocessors and multi-computers classified?

Discuss different classification schemes for multiprocessors and multi-
computers, such as by memory coherence protocols, interconnection
networks, or number of processors.

Ans: 5.1 Multiprocessor: • A set of processors connected by a communications network Fig. 5.

• A multiprocessor system is an interconnection of two or more CPU’s with memory and input-output equipment.
• Multiprocessors system are classified as multiple instruction stream, multiple data stream systems(MIMD).
• There exists a distinction between multiprocessor and multicomputers that though both support concurrent operations.
• In multicomputers several autonomous computers are connected through a network and they may or may not
communicate but in a multiprocessor system there is a single OS Control that provides interaction between processors
and all the components of the system to cooperate in the solution of the problem.
• VLSI circuit technology has reduced the cost of the computers to such a low Level that the concept of applying
multiple processors to meet system performance requirements has become an attractive design possibility.

Characteristics of Multiprocessors:
Benefits of Multiprocessing:
1. Multiprocessing increases the reliability of the system so that a failure or error in one part has limited effect on the
rest of the system. If a fault causes one processor to fail, a second processor can be assigned to perform the functions of
the disabled one.
2. Improved System performance. System derives high performance from the fact that computations can proceed in
parallel in one of the two ways:
a) Multiple independent jobs can be made to operate in parallel.
b) A single job can be partitioned into multiple parallel tasks.
This can be achieved in two ways:
- The user explicitly declares that the tasks of the program be executed in parallel 3
- The compiler provided with multiprocessor s/w that can automatically detect parallelism in program. Actually it checks
for Data dependency
COUPLING OF PROCESSORS
Tightly Coupled System/Shared Memory: -
Tasks and/or processors communicate in a highly synchronized fashion
- Communicates through a common global shared memory
- Shared memory system. This doesn’t preclude each processor from having its own local memory(cache memory)
Loosely Coupled System/Distributed Memory
- Tasks or processors do not communicate in a synchronized fashion.
- Communicates by message passing packets consisting of an address, the data content, and some error detection code.
- Overhead for data exchange is high
- Distributed memory system
Loosely coupled systems are more efficient when the interaction between tasks is minimal, whereas tightly coupled
system can tolerate a higher degree of interaction between tasks.
Shared (Global) Memory
- A Global Memory Space accessible by all processors
- Processors may also have some local memory
Distributed (Local, Message-Passing) Memory
- All memory units are associated with processors
- To retrieve information from another processor's memory a message must be sent there
Uniform Memory
- All processors take the same time to reach all memory locations
Non-uniform (NUMA) Memory
- Memory access is not uniform

Characteristics
- All processors have equally direct access to one large memory address space
Limitations - Memory access latency; Hot spot problem
Interconnection Structures:
 The interconnection between the components of a multiprocessor System can have different physical
configurations depending n the number of transfer paths that are available between the processors and memory in
a shared memory system and among the processing elements in a loosely coupled system.
Some of the schemes are as:
- Time-Shared Common Bus
- Multiport Memory
- Crossbar Switch
- Multistage Switching Network
- Hypercube System
a. Time shared common Bus
- All processors (and memory) are connected to a common bus or busses
- Memory access is fairly uniform, but not very scalable
- A collection of signal lines that carry module-to-module communication
- Data highways connecting several digital system elements
- Operations of Bus Fig.

6 In the above figure we have number of local buses to its own local memory and to one or more processors.
Each local bus may be connected to a CPU, an IOP, or any combinations of processors. A system bus controller
links each local bus to a common system bus. The I/O devices connected to the local IOP, as well as the local
memory, are available to the local processor. The memory connected to the common system bus is shared by all
processors. If an IOP is connected directly to the system bus the I/O devices attached to it may be made available
to all processors
Disadvantage.:
• Only one processor can communicate with the memory or another processor at any given time.
• As a consequence, the total overall transfer rate within the system is limited by the speed of the single
path
b. Multiport Memory:
Multiport Memory Module
- Each port serves a CPU
Memory Module Control Logic
 - Each memory module has control logic
- Resolve memory module conflicts Fixed priority among CPUs
Advantages
- The high transfer rate can be achieved because of the multiple paths.
Disadvantages:
- It requires expensive memory control logic and a large number of cables and connections

c. Crossbar switch:
- Each switch point has control logic to set up the transfer path between a processor and a memory.
- It also resolves the multiple requests for access to the same memory on the predetermined priority basis.
- Though this organization supports simultaneous transfers from all memory modules because there is a separate path
associated with each Module.
- The H/w required to implement the switch can become quite large and complex

z
Advantage:
- Supports simultaneous transfers from all memory modules
Disadvantage:
- The hardware required to implement the switch can become quite large and complex.
d. Multistage Switching Network:
- The basic component of a multi stage switching network is a two-input, twooutput interchange switch.

Using the 2x2 switch as a building block, it is possible to build a multistage network to control the communication
between a number of sources and destinations.
- To see how this is done, consider the binary tree shown in Fig. below.
- Certain request patterns cannot be satisfied simultaneously. i.e., if P1 000~011, then P2 100~111 Fig 5.10

Fig. 5.11 8X8 Omega switching network 9 - Some request patterns cannot be connected simultaneously. i.e., any
two sources cannot be connected simultaneously to destination 000 and 001 - In a tightly coupled multiprocessor system,
the source is a processor and the destination is a memory module. - Set up the path transfer the address into memory
transfer the data - In a loosely coupled multiprocessor system, both the source and destination are Processsing elements.
e. Hypercube System: The hypercube or binary n-cube multiprocessor structure is a loosely coupled system composed of
N=2n processors interconnected in an n-dimensional binary cube. - Each processor forms a node of the cube, in effect it
contains not only a CPU but also local memory and I/O interface. - Each processor address differs from that of each of its
n neighbors by exactly one bit position. - Fig. below shows the hypercube structure for n=1, 2, and 3. - Routing messages
through an n-cube structure may take from one to n links from a source node to a destination node. - A routing procedure
can be developed by computing the exclusive-OR of the source node address with the destination node address. - The
message is then sent along any one of the axes that the resulting binary value will have 1 bits corresponding to the axes
on which the two nodes differ. - A representative of the hypercube architecture is the Intel iPSC computer complex. - It
consists of 128(n=7) microcomputers, each node consists of a CPU, a floating point processor, local memory, and serial
communication interface units 10 Fig. 5.12 Hypercube structures for n=1,2,3 5.3 Inter-processor Arbitration - Only one
of CPU, IOP, and Memory can be granted to use the bus at a time - Arbitration mechanism is needed to handle multiple
requests to the shared resources to resolve multiple contention - SYSTEM BUS: o A bus that connects the major
components such as CPU’s, IOP’s and memory o A typical System bus consists of 100 signal lines divided into three
functional groups: data, address and control lines. In addition there are power distribution lines to the components. -
Synchronous Bus o Each data item is transferred over a time slice o known to both source and destination unit o
Common clock source or separate clock and synchronization signal is transmitted periodically to synchronize the clocks
in the system - Asynchronous Bus o Each data item is transferred by Handshake mechanism Unit that transmits the data
transmits a control signal that indicates the presence of data Unit that receiving the data responds with another control
signal to acknowledge the receipt of the data 11 o Strobe pulse -supplied by one of the units to indicate to the other unit
when the data transfer has to occur Table 5.1 IEEE standard 796 multibus signals Fig. 5.13 Inter-processor arbitration
static arbitration 12 Interprocessor Arbitration Dynamic Arbitration - Priorities of the units can be dynamically
changeable while the system is in operation - Time Slice o Fixed length time slice is given sequentially to each
processor, roundrobin fashion - Polling o Unit address polling -Bus controller advances the address to identify the
requesting unit. When processor that requires the access recognizes its address, it activates the bus busy line and then
accesses the bus. After a number of bus cycles, the polling continues by choosing a different processor. - LRU o The
least recently used algorithm gives the highest priority to the requesting device that has not used bus for the longest
interval. - FIFO o The first come first serve scheme requests are served in the order received. The bus controller here
maintains a queue data structure. - Rotating Daisy Chain o Conventional Daisy Chain -Highest priority to the nearest unit
to the bus controller o Rotating Daisy Chain –The PO output of the last device is connected to the PI of the first one.
Highest priority to the unit that is nearest to the unit that has most recently accessed the bus(it becomes the bus
controller) 5.4 Inter processor communication and synchronization: - The various processors in a multiprocessor system
must be provided with a facility for communicating with each other. o A communication path can be established through
a portion of memory or a common input-output channels. 13 - The sending processor structures a request, a message, or a
procedure, and places it in the memory mailbox. o Status bits residing in common memory o The receiving processor can
check the mailbox periodically. o The response time of this procedure can be time consuming. - A more efficient
procedure is for the sending processor to alert the receiving processor directly by means of an interrupt signal. - In
addition to shared memory, a multiprocessor system may have other shared resources. o e.g., a magnetic disk storage
unit. - To prevent conflicting use of shared resources by several processors there must be a provision for assigning
resources to processors. i.e., operating system. - There are three organizations that have been used in the design of
operating system for multiprocessors: master-slave configuration, separate operating system, and distributed operating
system. - In a master-slave mode, one processor, master, always executes the operating system functions. - In the
separate operating system organization, each processor can execute the operating system routines it needs. This
organization is more suitable for loosely coupled systems. - In the distributed operating system organization, the
operating system routines are distributed among the available processors. However, each particular operating system
function is assigned to only one processor at a time. It is also referred to as a floating operating system. Loosely Coupled
System - There is no shared memory for passing information. - The communication between processors is by means of
message passing through I/O channels. - The communication is initiated by one processor calling a procedure that resides
in the memory of the processor with which it wishes to communicate. 14 - The communication efficiency of the
interprocessor network depends on the communication routing protocol, processor speed, data link speed, and the
topology of the network. Interprocess Synchronization - The instruction set of a multiprocessor contains basic
instructions that are used to implement communication and synchronization between cooperating processes. o
Communication refers to the exchange of data between different processes. o Synchronization refers to the special case
where the data used to communicate between processors is control information. - Synchronization is needed to enforce
the correct sequence of processes and to ensure mutually exclusive access to shared writable data. - Multiprocessor
systems usually include various mechanisms to deal with the synchronization of resources. o Low-level primitives are
implemented directly by the hardware. o These primitives are the basic mechanisms that enforce mutual exclusion for
more complex mechanisms implemented in software. o A number of hardware mechanisms for mutual exclusion have
been developed. A binary semaphore Mutual Exclusion with Semaphore - A properly functioning multiprocessor system
must provide a mechanism that will guarantee orderly access to shared memory and other shared resources. o Mutual
exclusion: This is necessary to protect data from being changed simultaneously by two or more processors. o Critical
section: is a program sequence that must complete execution before another processor accesses the same shared resource.
- A binary variable called a semaphore is often used to indicate whether or not a processor is executing a critical section.
15 - Testing and setting the semaphore is itself a critical operation and must be performed as a single indivisible
operation. - A semaphore can be initialized by means of a test and set instruction in conjunction with a hardware lock
mechanism. - The instruction TSL SEM will be executed in two memory cycles (the first to read and the second to write)
as follows: R  M[SEM], M[SEM]  1 5.5 Cache Coherence cache coherence is the consistency of shared resource data
that ends up stored in multiple local caches. When clients in a system maintain caches of a common memory resource,
problems may arise with inconsistent data, which is particularly the case with CPUs in a multiprocessing system. Fig.
5.14 cache coherence 16 Shared Cache -Disallow private cache -Access time delay Software Approaches * Read-Only
Data are Cacheable - Private Cache is for Read-Only data - Shared Writable Data are not cacheable - Compiler tags data
as cacheable and noncacheable - Degrade performance due to software overhead * Centralized Global Table - Status of
each memory block is maintained in CGT: RO(Read-Only); RW(Read and Write) - All caches can have copies of RO
blocks - Only one cache can have a copy of RW block - Hardware Approaches * Snoopy Cache Controller - Cache
Controllers monitor all the bus requests from CPUs and IOPs - All caches attached to the bus monitor the write
operations - When a word in a cache is written, memory is also updated (write through) - Local snoopy controllers in all
other caches check their memory to determine if they have a copy of that word; If they have, that location is marked
invalid(future reference to this location causes cache miss)