SIMULATION OF FIXED PWM, SINUSOIDAL PWM FOR AN INVERTER
Aim
To simulate the Fixed PWM, Sinusoidal PWM for an inverter
Software
MATLAB -2017
PULSE WIDTH MODULATION (PWM)
In Pulse Width Modulation (PWM) technique, pulses of constant amplitude but different duty cycles
are generated by modulating the time periods . This modulation is done by using one carrier and one
reference signal. These two signals are fed to a comparator and the corresponding signals are
generated based on the logic of the comparator. The reference wave is the desired signal output which
may be a sine wave or a square wave. The carrier wave , on the other hand , is generally saw tooth or
triangular wave having frequency significantly higher than that of the reference signal. The higher
order harmonics in the load current are eliminated using a series inductor. A selected range of lower
harmonics can be reduced by suitably choosing the number of pulses per half cycle. Advantages of
using PWM technique-
1. The output voltage can be controlled without using any additional component.
2. Significant reduction of lower order harmonics
There are three basic PWM techniques-
1. Single pulse
2. Multiple pulse
3. Sinusoidal
SINUSOIDAL PULSE WIDTH MODULATION (SPWM)
In Sinusoidal PWM, the width of each pulse is varied in proportion to the amplitude of the sine wave
evaluated at the centre of the same pulse. The gating signals are generated by comparing a sinusoidal
reference wave with a triangular carrier wave of frequency Fr and Fc respectively as shown in Figure
1. Fr determines the inverter output frequency foand its peak amplitude Ar controls the Modulation
Ratio (Ar/Ac) and hence the RMS output voltage Vo. Several pulses per half cycle are used and the
pulse width is a sinusoidal function of angular position of pulses in a cycle. A high frequency carrier
wave Vc is compared to a reference signal Vr having the desired frequency through a comparator.
When the sinusoidal wave has a higher magnitude, output is high otherwise it is low. The comparator
output is processed in a trigger pulse generator in such a way that the output voltage wave has a pulse
width in agreement with comparator pulse width.
Three phase inverter
The inverter is fed by a fixed dc voltage Vdc and has three phase-legs each comprising two IGBTs.
With SPWM control, the switches of the inverter are controlled by comparing a sinusoidal signal and
a triangular signal. The sinusoidal wave determines the desired fundamental frequency of the inverter
output, while the triangular wave decides the switching frequency of the inverter. Each transistor
conducts for 180 degrees. Three of the transistors conduct at a time in the order 612,123,234,345 and
so on. When T1 is switched on, terminal Y is connected to the positive terminal of the DC supply
voltage. When T4 is on, terminal Y is connected to the negative terminal of the input voltage. There
are six modes of operation and each mode operates for a period of 60 degrees
Simulink Model
The gate pulses given to the three phase inverter are shown in Figure . The frequency of the carrier
wave is kept 1000 Hz whereas for reference sine wave, it is 50 Hz.
Gate pulses for T1
Gate pulses for T3
Gate pulses for T5
The resultant phase and line voltages
Phase voltage
Line voltage
RESULT
The simulation of Fixed PWM, Sinusoidal PWM for an inverter was carried out and the output
waveforms where verified.
SIMULATION OF H BRIDGE INVERTER WITH R LOAD
Aim
To simulate of H bridge inverter with R load
Software
MATLAB -2017
SYSTEM DESCRIPTION OF SINGLE PHASE FULL BRIDGE INVERTER
Single phase h-bridge inverter is shown in figure1. The inverter uses two pair of controlled switches
(S1S2and S3S4).The turn on device of one pair operate simultaneously in order to develop a positive
voltage (+v0) across the load, switch s1 and S2are turned on simultaneously whereas to have negative
voltage (-v0) across the load, we need to turn-on the switches s3 and s4.
OPERATION WITH RESISTIVE LOAD
Voltage and current waveform with resistive load are shown in figure given below. The bridge-
inverter operates in two modes in one cycle of output.
a) Mode-1: In this mode, switch S1 and S2 conducts simultaneously. The load voltage is +V0. The
equivalent circuit for mode-1 is shown in figure below in equivalent circuit, S1 and S2 are turned-off
and S3 and S4 are turned-on.
b) Mode-2:At t=t/2, switches S3 and S4 are turned-on and S1 and S2 are [Link] load voltage
is –[Link] switch,S3 and S4 are turned-off and S1 and S2 are turned-on again.
DETERMINATION OF SWITCHING ANGLES:
Phase delay The delay before the pulse is generated specified in seconds if the pulse type is time-
based or as number of sample times if the pulse type is sample-based. Here the period is set at 0.02
sec. For phase delay Values can be obtained as follows
MATLAB SIMULINK MODEL OF SINGLE PHASE INVERTER:
Simulink Model of H Bridge Inverter with R Load
OUTPUT WAVEFORM
The complete circuit is simulated on the software MATLAB/SIMULINK. Figure shows the voltage
across load when load is purely resistive with input voltage 100V which is pure square wave.
Output Voltage Waveform of H Bridge Inverter with R load((When R=10Ω, Vdc=100V)
Output Voltage and current Waveform of H Bridge Inverter with R load (When R=10Ω,
Vdc=100V)
RESULT
H bridge inverter was simulated and the voltage and current waveforms were obtained.
SIMULATION OF THREE LEVEL DIODE CLAMPED MLI WITH R LOAD
Aim
To Simulate three level diode clamped MLI with R load.
Software
MATLAB -2017
Diode Clamped Multilevel Inverter
This inverter is to use diodes and provides the multiple voltage levels through the various phases to
the electrical device banks that are in series . A diode transfers a restricted quantity of voltage, thereby
reducing the strain on different electrical devices. The most output voltage is half the input DC
voltage. It's the most downside of the diode clamped structure electrical converter. This drawback
may be resolved by increasing the switches, diodes, capacitors. Attributable to the capacitor
equalization problems, these are restricted to the three-levels. This kind of inverters provides the high
efficiency as a result of the fundamental frequency used for all the change devices and it's a simple
technique of the rear to back power transfer systems.
An m level inverter leg requires 2·(m– 1) switching devices and (m– 1)·(m– 2) clamping diodes. For a
three-level inverter, m = 3, so it needs four switching devices and two clamping diodes per leg as
shown in Figure 1. 1. For an output voltage of Va = Vdc, all the upper-half switches of a-phase leg are
turned ON, i.e., S1 and S2 are ON. 2. For output voltage of Va = Vdc/2, only S2 and S3 are ON 3. For
output voltage of Va = 0, all the lower-half switches of a- phase leg are turned ON, i.e., S3 and S4 are
ON.
Three-level diode clamped inverter
Table1 shows the voltage levels and their corresponding switch states. State condition “1”means the
switch is ON, and state “0” suggests that the switch is OFF. It should be noticed that there are two
complementary switch pairs. These pairs for one leg of the inverter are (S1, S3) and (S2, S4). Table 1.
Switch states for various voltages of a phase leg.
Table 1. Switch states for various voltages of a phase leg
PWM Techniques
1. Sinusoidal Pulse Width Modulation (SPWM)
2. Space Vector Modulation (SVM or SVPWM)
3. Selective Harmonic Elimination (SHE)
Simulink Model of three level diode clamped MLI with R load.
Three level diode clamped MLI with R load
Output waveform
Output waveform for SPWM
SVM circuit in MATLAB
Output waveform for SVM
RESULT
Three level diode clamped MLI with R load was simulated.
SIMULATION OF THREE LEVEL CAPACITOR CLAMPED MLI WITH R LOAD
Aim
To Simulate of three level capacitor clamped MLI with R load
Software
MATLAB -2017
FLYING CAPACITOR MULTI LEVEL INVERTER
The three phase three level flying capacitor inverter is shown in the figure. This inverter is called so
because the capacitor’s floats with respect to earth potential. Flying capacitor Multi level inverter is
also known as Capacitor clamped [Link] m level flying capacitor inverter consists of 2(m-1)
switches, (m-1) main capacitors and (m-1)*(m-2)/2 auxiliary capacitors are required in each phase
leg. Thus a three level flying capacitor inverter consists of four switches, two main capacitors & one
auxiliary capacitor in each leg.
Three phase three level flying capacitor inverter
The possible switching states are four in 3 level FCMLI. When the switches SW1, SW2 are ON and
SW3, SW4 are OFF the output voltage is positive. When switches SW3, SW4 are ON and SW1, SW2
are OFF the output voltage is negative. Zero level can be obtained in two ways that is either SW1,
SW3 are ON or SW2, SW4 are ON.
Table : Switching states and Output voltage of leg1 of three level flying capacitor inverter
PD-SPWM & POD-SPWM CONTROL TECHNIQUES
Phase disposition sinusoidal pulse width modulation In SPWM technique , sinusoidal reference wave
is compared with triangular carrier waveform to generate pulses to switches of inverter. This
traditional SPWM technique is applied to multilevel inverter by using multiple carriers. For m level
inverter (m-1) carriers are required. Phase disposition SPWM has carriers in same phase above
andbelow zero reference line. All the carrier signals are of same frequency and same amplitude in PD-
SPWM. It is most widely used method as it provides low harmonic distortion in load voltage and
current.
Phase disposition sinusoidal pulse width modulation (for leg-1)
Phase opposition disposition sinusoidal pulse width modulation
Phase Opposition disposition sinusoidal pulse width modulation (for leg-1)
Simulation & THD analysis of PD-SPWM & POD-SPWM controlled three phase three level
flying capacitor inverter
A Three phase three level flying capacitor inverter using PDSPWM & POD-SPWM Controlled
Strategies is simulated in MATLAB Simulink.
MATLAB Simulation parameters are
1. Carrier Frequency=1000 Hz
2. System Frequency=50 Hz
3. Load resistance(R) =10 Ohm
4. Load Inductance (L) =50e-3 Henry
5. Input D.C voltage=440V
6. Modulating index (M.I) =0.6 to 1
Simulink model for PWM based Three phase three level flying capacitor Inverter
Simulink model for PD-SPWM switching signal generation (Phase A)
Simulink model for POD-SPWM switching signal generation (Phase A)
Output waveform
Pulses for triggering switches of 3 phase 3 Ievel flying capacitor inverter using PD-SPWM
Strategy
Line voltage waveforms of POD-SPWM controlled 3 phase 3 level flying capacitor Inverter
Phase current waveforms of POD-SPWM controlled 3 phase 3 level flying capacitor Inverter
Result
Simulation of FLCML was done successfully.
SIMULATION OF MLI WITH REDUCED SWITCH CONFIGURATION
Aim
Simulation of MLI with reduced switch configuration.
Software
MATLAB -2017
Reduced switch multilevel inverter (RS MLI)
The conventional CHB MLI is one of the important topology in the family of MLIs. In CHB MLI all
DC sources are considered to be identical since all of them are either fuel cells or PV arrays and
batteries etc. It requires less no. of components as compared to NPC MLI and FC MLI and gives
better performance. The significant component in MLIs is switches which define the size of circuit,
reliability, area of installation, control complexity and cost. In conventional MLIs when the output
voltage level increases, then the size, cost, and volume of inverters also increase. In this paper work,
RS MLI is used for provide a large no. of output levels with less switching components and reduced
cost. The proposed RS MLI circuit reduces the voltage stress on the switches and enhances the
protection from over voltage and dV/dt breakdown consideration. The configuration of PV RS MLI
scheme is shown in Fig 1 the proposed RS MLI output voltage waveform with corresponding
switching states. In RS MLI configuration seven switches (SW1–SW4 and T1–T3) with two diodes
(D1 and D2) are used. The H-bridge switches (or polarity generation switches) operate at low
switching frequency whereas the level generation switches T1–T3 operate at high switching
frequency. Hence a cost-effective solution is to choose low switching power components for the H-
bridge and high switching power components for the level generation.
The working principle of RS MLI is summarized in following cases.
Case A T1 is ON, flow of current is through diode D1 and D2, and switches SW1 and SW2. The
output voltage across the load is + Vdc1. Correspondingly when SW3 and SW4 are switched ON,
output voltage across load is −Vdc1.
Case B Switch T2 is on in this case, current flows through diode D2 and switches SW1 and SW2. The
output voltage across load is + Vdc2. correspondingly when SW3 and SW4 are switched ON, output
voltage across load is −Vdc2.
Case C In this mode T3 is ON, current fows through SW1 and SW2. The output voltage across load is
+Vdc3 and D1 and D2 reverse biased. Correspondingly when SW3 and SW4 are switched ON,
voltage output is −Vdc3.
Case D In this mode both SW1 and SW3 or SW2 and SW4 are ON making T1, T2 and T3 OFF,
voltage gives zero output across the load.
F 7-level reduced switch multilevel inverter
7-level based RS MLI output voltage waveform with corresponding switching states
Simulation module of MLI with reduced Switches
phase 7-level RS MLI
Output waveform
PWM signals for level generation of RS MLI switches T1, T2 and T3
Result
The simulation of MLI with reduced switch configuration was carried out successfully and output was
verified.